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##
## This file is part of the coreboot project.
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##

config NORTHBRIDGE_INTEL_I440BX
	bool
	select HAVE_DEBUG_RAM_SETUP
	select LATE_CBMEM_INIT

config SDRAMPWR_4DIMM
	bool
	depends on NORTHBRIDGE_INTEL_I440BX
	default n
	help
	  This option affects how the SDRAMC register is programmed.
	  Memory clock signals will not be routed properly if this option
	  is set wrong.

	  If your board has 4 DIMM slots, you must use select this option, in
	  your Kconfig file of the board. On boards with 3 DIMM slots,
	  do _not_ select this option.