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* Remove address from GPLv2 headersPatrick Georgi2015-05-2125-38/+25
* northbridge/intel/gm45/gma: Minor cleanupTimothy Pearson2015-05-081-8/+5
* northbridge/intel/gm45/gma: Add backlight control register fieldTimothy Pearson2015-05-081-2/+6
* kbuild: automatically include northbridgesStefan Reinauer2015-04-291-0/+4
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-157-24/+29
* CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki2015-01-271-1/+0
* CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEMKyösti Mälkki2015-01-271-1/+6
* northbridge/intel: Do not define include guard as 1Edward O'Callaghan2015-01-062-4/+4
* northbridge/intel/*/acpi/igd.asl: Trivial indent style fixEdward O'Callaghan2014-12-061-2/+2
* Replace hlt with halt()Patrick Georgi2014-12-021-1/+2
* Make acpi_fill_dmar into parameterVladimir Serbinenko2014-11-271-2/+2
* gm45: Don't crash if less than 4G of RAM are present.Vladimir Serbinenko2014-11-121-1/+1
* northbridge/intel: Use DEVICE_NOOP macro over dummy symbolEdward O'Callaghan2014-11-011-7/+3
* ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko2014-10-161-1/+1
* gm45: Convert to per-device ACPIVladimir Serbinenko2014-10-154-0/+35
* intel/gma: consolidate vbt codeVladimir Serbinenko2014-09-132-117/+16
* lenovo/x200: Move video ASL code to northbridge.Vladimir Serbinenko2014-08-222-8/+100
* gm45: Declare BIOS memory as RAM.Vladimir Serbinenko2014-08-171-4/+2
* gm45: Decrease MTRR usageVladimir Serbinenko2014-08-164-25/+69
* gm45: Make UMA size configurable.Vladimir Serbinenko2014-08-161-3/+9
* gm45: Recognize 48MiB gfx UMA.Vladimir Serbinenko2014-08-161-0/+2
* intel/gm45: native gfx init.Vladimir Serbinenko2014-08-163-1/+524
* gm45: Set acpi_slp_type only once.Vladimir Serbinenko2014-08-141-17/+16
* gm45: Allow skiping voltage config.Vladimir Serbinenko2014-08-132-3/+3
* gm45: Move S3 detection to enable stage.Vladimir Serbinenko2014-08-121-0/+18
* gm45: Reserve RAM for ME if it's active.Vladimir Serbinenko2014-08-121-3/+5
* gm45: Allow coexistance with ME firmware.Vladimir Serbinenko2014-08-121-0/+11
* gm45: Ensure that brightness register in gma contains sane value.Vladimir Serbinenko2014-08-122-0/+100
* gm45: Declare brightness variables for ACPI use.Vladimir Serbinenko2014-08-111-0/+16
* gm45: Set default VGA PCIID.Vladimir Serbinenko2014-08-111-0/+4
* gm45: Move spd address map to board-specific config.Vladimir Serbinenko2014-07-292-38/+44
* northbridge,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-173-4/+0
* src: Make use of 'CEIL_DIV(a, b)' macro across treeEdward O'Callaghan2014-07-111-1/+1
* northbridge: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-083-3/+0
* stdlib: Drop duplicates of min() and max()Kyösti Mälkki2014-07-011-1/+1
* gm45 boards: Switch to use DYNAMIC_CBMEMKyösti Mälkki2014-06-251-0/+1
* northbridge/intel: Drop use of set_top_of_ram()Kyösti Mälkki2014-06-181-2/+0
* CBMEM: Unify get_top_of_ram()Kyösti Mälkki2013-09-112-2/+2
* CBMEM northbridges: Remove references to global high_tables_baseKyösti Mälkki2013-09-111-3/+1
* intel/gm45: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki2013-09-103-5/+31
* Add pci_devfn_t and use with __SIMPLE_DEVICE__Kyösti Mälkki2013-08-241-1/+1
* Add directive __SIMPLE_DEVICE__Kyösti Mälkki2013-08-011-3/+3
* Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki2013-07-101-5/+1
* Move select MMCONF_SUPPORT under northbridge (fix)Kyösti Mälkki2013-07-041-0/+1
* Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c`Paul Menzel2013-07-021-3/+2
* Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`Ronald G. Minnich2013-05-251-12/+0
* intel/gm45: Add more debug output to read/write trainingNico Huber2013-05-221-6/+22
* intel/gm45: Handle overflows during DDR3 write trainingNico Huber2013-05-221-28/+63
* intel/gm45: Refactor DDR3 write trainingNico Huber2013-05-221-31/+54
* intel/gm45: Handle overflows during DDR3 read trainingNico Huber2013-05-221-28/+60
generated by cgit (git 2.34.1) at 2023-01-31 17:10:52 +0000