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* Remove address from GPLv2 headersPatrick Georgi2015-05-2120-23/+20
* arm64: Make SPSR exception masking on EL2 transition explicitJulius Werner2015-05-191-12/+5
* arm64: Add support for using ARM Trusted Firmware as secure monitorJulius Werner2015-05-192-0/+141
* arm64: Reorganize payload entry code and related KconfigsJulius Werner2015-05-191-3/+3
* arm64: Reorganize payload entry code and related KconfigsJulius Werner2015-05-192-12/+3
* arm64: psci: add cpu_suspend supportJoseph Lo2015-05-181-1/+35
* arch/arm64: update mmu translation table granule size, logic and macrosJimmy Huang2015-04-271-41/+17
* arm64: save/restore cptr_el3 and cpacr_el1 registersJoseph Lo2015-04-272-1/+13
* arm64: implement CPU power down sequence as per A57/A53/A72 TRMJoseph Lo2015-04-271-0/+14
* arm64: introduce data cache ops by set/way to the level specifiedJoseph Lo2015-04-272-1/+51
* armv8/secmon: Correct PSCI function idsFurquan Shaikh2015-04-221-1/+0
* arm64: save and restore cntfrq for secondary cpusJimmy Huang2015-04-222-1/+14
* arm64: add arm64_arch_timer_init functionJoseph Lo2015-04-221-0/+6
* arm64: Correct shareability option for normal memoryFurquan Shaikh2015-04-221-0/+6
* arch/arm64: allow floating-point registers accessYen Lin2015-04-221-0/+22
* arm64: provide icache_invalidate_all()Aaron Durbin2015-04-221-0/+11
* Unify byte order macros and clrsetbitsJulius Werner2015-04-213-118/+4
* arm(64): Change write32() argument order to match x86Julius Werner2015-04-212-5/+5
* arm64: Add support for save/restore registers for CPU startup.Furquan Shaikh2015-04-102-0/+57
* arm64: Add macro to invalidate stage 1 TLB entries at current ELFurquan Shaikh2015-04-101-0/+15
* arm64: Add conditional read/write from/to EL3 assembly macros.Furquan Shaikh2015-04-101-0/+25
* arm64: Add function for reading TCR register at current ELFurquan Shaikh2015-04-101-0/+4
* arm64: Implement PSCI command supportAaron Durbin2015-04-101-0/+35
* arm64: secmon: add entry point for turned on CPUsAaron Durbin2015-04-103-14/+26
* arm64: secmon: pass online CPUs to secmonAaron Durbin2015-04-102-0/+4
* arm64: psci: use struct cpu_action to track startup entryAaron Durbin2015-04-101-3/+2
* arm64: secmon: prepare for passing more state into secmonAaron Durbin2015-04-101-2/+2
* arm64: psci: add node hierarchyAaron Durbin2015-04-091-0/+82
* arm64: add mpidr field to cpu_info structAaron Durbin2015-04-092-0/+67
* arm: Include types.h in clock.hPatrick Georgi2015-04-071-0/+2
* New mechanism to define SRAM/memory map with automatic bounds checkingJulius Werner2015-04-062-0/+67
* arm64: remove EL and mode from secmon_paramsAaron Durbin2015-03-281-2/+0
* arm64: add psci support to secmonAaron Durbin2015-03-281-0/+115
* arm64: add smc layer to secmonAaron Durbin2015-03-281-0/+122
* arm64: provide entry points for BSP and non-BSPAaron Durbin2015-03-281-3/+15
* arm64: split cpu.cAaron Durbin2015-03-281-0/+20
* arm64: exception handler registrationAaron Durbin2015-03-282-0/+49
* arm64: add spin table supportAaron Durbin2015-03-281-0/+50
* arm64: add cpu_is_bsp() conceptAaron Durbin2015-03-281-0/+13
* arm64: provide run on all cpu but self semanticsAaron Durbin2015-03-281-0/+2
* arm64: Add support for secure monitorFurquan Shaikh2015-03-281-0/+43
* arm64: initialize SCR_EL3 on all CPUsAaron Durbin2015-03-281-1/+36
* arm64: Make exceptions use the transition libraryFurquan Shaikh2015-03-281-11/+0
* arm64: Add support for transition libraryFurquan Shaikh2015-03-281-0/+188
* arm64: Add useful macro definitions for register bitsFurquan Shaikh2015-03-281-0/+58
* arm64 libhelpers: Add helper functions for writing sp_elxFurquan Shaikh2015-03-281-0/+2
* arm64 libhelpers: Add helper functions with el argumentFurquan Shaikh2015-03-281-34/+63
* arm64: Add support for read and write registers at current EL in assemblyFurquan Shaikh2015-03-281-0/+97
* arm64: remove soc_secondary_cpu_init()Aaron Durbin2015-03-271-13/+0
* arm64: add devicetree based CPU startupAaron Durbin2015-03-271-14/+69
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