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Diffstat (limited to 'src/mainboard/google/link/romstage.c')
-rw-r--r--src/mainboard/google/link/romstage.c44
1 files changed, 22 insertions, 22 deletions
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index 66d206757..2f178800f 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -157,32 +157,32 @@ void main(unsigned long bist)
u16 pm1_sts;
struct pei_data pei_data = {
- pei_version: PEI_VERSION,
- mchbar: DEFAULT_MCHBAR,
- dmibar: DEFAULT_DMIBAR,
- epbar: DEFAULT_EPBAR,
- pciexbar: CONFIG_MMCONF_BASE_ADDRESS,
- smbusbar: SMBUS_IO_BASE,
- wdbbar: 0x4000000,
- wdbsize: 0x1000,
- hpet_address: CONFIG_HPET_ADDRESS,
- rcba: DEFAULT_RCBABASE,
- pmbase: DEFAULT_PMBASE,
- gpiobase: DEFAULT_GPIOBASE,
- thermalbase: 0xfed08000,
- system_type: 0, // 0 Mobile, 1 Desktop/Server
- tseg_size: CONFIG_SMM_TSEG_SIZE,
- ts_addresses: { 0x00, 0x00, 0x00, 0x00 },
- ec_present: 1,
- ddr3lv_support: 1,
+ .pei_version = PEI_VERSION,
+ .mchbar = DEFAULT_MCHBAR,
+ .dmibar = DEFAULT_DMIBAR,
+ .epbar = DEFAULT_EPBAR,
+ .pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
+ .smbusbar = SMBUS_IO_BASE,
+ .wdbbar = 0x4000000,
+ .wdbsize = 0x1000,
+ .hpet_address = CONFIG_HPET_ADDRESS,
+ .rcba = DEFAULT_RCBABASE,
+ .pmbase = DEFAULT_PMBASE,
+ .gpiobase = DEFAULT_GPIOBASE,
+ .thermalbase = 0xfed08000,
+ .system_type = 0, // 0 Mobile, 1 Desktop/Server
+ .tseg_size = CONFIG_SMM_TSEG_SIZE,
+ .ts_addresses = { 0x00, 0x00, 0x00, 0x00 },
+ .ec_present = 1,
+ .ddr3lv_support = 1,
// 0 = leave channel enabled
// 1 = disable dimm 0 on channel
// 2 = disable dimm 1 on channel
// 3 = disable dimm 0+1 on channel
- dimm_channel0_disabled: 2,
- dimm_channel1_disabled: 2,
- max_ddr3_freq: 1600,
- usb_port_config: {
+ .dimm_channel0_disabled = 2,
+ .dimm_channel1_disabled = 2,
+ .max_ddr3_freq = 1600,
+ .usb_port_config = {
/* Empty and onboard Ports 0-7, set to un-used pin OC3 */
{ 0, 3, 0x0000 }, /* P0: Empty */
{ 1, 0, 0x0040 }, /* P1: Left USB 1 (OC0) */