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-rw-r--r--src/arch/x86/init/crt0_romcc_epilogue.inc5
-rw-r--r--src/arch/x86/init/prologue.inc2
2 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/x86/init/crt0_romcc_epilogue.inc b/src/arch/x86/init/crt0_romcc_epilogue.inc
index 3bd1b3699..b19f9687e 100644
--- a/src/arch/x86/init/crt0_romcc_epilogue.inc
+++ b/src/arch/x86/init/crt0_romcc_epilogue.inc
@@ -5,11 +5,12 @@
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of the License.
*/
+#include <cpu/x86/post_code.h>
/* clear boot_complete flag */
xorl %ebp, %ebp
__main:
- post_code(0x11)
+ post_code(POST_PREPARE_RAMSTAGE)
cld /* clear direction flag */
movl %ebp, %esi
@@ -20,7 +21,7 @@ __main:
call copy_and_run
.Lhlt:
- post_code(0xee)
+ post_code(POST_DEAD_CODE)
hlt
jmp .Lhlt
diff --git a/src/arch/x86/init/prologue.inc b/src/arch/x86/init/prologue.inc
index 8947f20de..b85c5c0fa 100644
--- a/src/arch/x86/init/prologue.inc
+++ b/src/arch/x86/init/prologue.inc
@@ -25,5 +25,5 @@
/* This is the entry code. The code in the .reset section jumps here. */
- post_code(0x01)
+ post_code(POST_RESET_VECTOR_CORRECT)