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-rw-r--r--src/arch/riscv/include/arch/header.ld33
-rw-r--r--src/arch/riscv/include/arch/memlayout.h31
-rw-r--r--src/arch/riscv/include/arch/stages.h2
3 files changed, 65 insertions, 1 deletions
diff --git a/src/arch/riscv/include/arch/header.ld b/src/arch/riscv/include/arch/header.ld
new file mode 100644
index 000000000..3c4209990
--- /dev/null
+++ b/src/arch/riscv/include/arch/header.ld
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* We use ELF as output format. So that we can debug the code in some form. */
+OUTPUT_ARCH(riscv)
+
+PHDRS
+{
+ to_load PT_LOAD;
+}
+
+#ifdef __BOOTBLOCK__
+ENTRY(_start)
+#else
+ENTRY(stage_entry)
+#endif
+
diff --git a/src/arch/riscv/include/arch/memlayout.h b/src/arch/riscv/include/arch/memlayout.h
new file mode 100644
index 000000000..b6f4cba21
--- /dev/null
+++ b/src/arch/riscv/include/arch/memlayout.h
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* This file contains macro definitions for memlayout.ld linker scripts. */
+
+#ifndef __ARCH_MEMLAYOUT_H
+#define __ARCH_MEMLAYOUT_H
+
+/* TODO: Double-check that that's the correct alignment for our ABI. */
+#define STACK(addr, size) REGION(stack, addr, size, 8)
+
+/* TODO: Need to add DMA_COHERENT region like on ARM? */
+
+#endif /* __ARCH_MEMLAYOUT_H */
+
diff --git a/src/arch/riscv/include/arch/stages.h b/src/arch/riscv/include/arch/stages.h
index 2d1192ae3..3b8543da7 100644
--- a/src/arch/riscv/include/arch/stages.h
+++ b/src/arch/riscv/include/arch/stages.h
@@ -22,7 +22,7 @@
extern void main(void);
-void stage_entry(void) __attribute__((section(".text.stage_entry.riscv")));
+void stage_entry(void) __attribute__((section(".text.stage_entry")));
void stage_exit(void *);
void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size);