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-rw-r--r--src/arch/arm/Makefile.inc29
-rw-r--r--src/arch/arm/armv4/bootblock.S20
-rw-r--r--src/arch/arm/armv7/bootblock.S20
-rw-r--r--src/arch/arm/armv7/mmu.c5
-rw-r--r--src/arch/arm/include/arch/header.ld (renamed from src/arch/arm/bootblock.ld)37
-rw-r--r--src/arch/arm/include/arch/memlayout.h38
-rw-r--r--src/arch/arm/include/arch/stages.h2
-rw-r--r--src/arch/arm/ramstage.ld134
-rw-r--r--src/arch/arm/romstage.ld79
-rw-r--r--src/arch/arm/stages.c8
-rw-r--r--src/arch/arm/verstage.ld66
11 files changed, 66 insertions, 372 deletions
diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc
index cd6c4a4e2..4b8b473cb 100644
--- a/src/arch/arm/Makefile.inc
+++ b/src/arch/arm/Makefile.inc
@@ -63,11 +63,9 @@ bootblock-y += memmove.S
bootblock-y += div0.c
bootblock-y += clock.c
-bootblock-y += bootblock.ld
-
-$(objcbfs)/bootblock.debug: $(obj)/arch/arm/bootblock.bootblock.ld $$(bootblock-objs) $$(VERSTAGE_LIB)
+$(objcbfs)/bootblock.debug: $$(bootblock-objs) $$(VERSTAGE_LIB)
@printf " LINK $(subst $(obj)/,,$(@))\n"
- $(LD_bootblock) --gc-sections -static -o $@ -L$(obj) -T $(obj)/arch/arm/bootblock.bootblock.ld --start-group $(bootblock-objs) --end-group
+ $(LD_bootblock) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.bootblock.ld --start-group $(filter-out %.ld,$(bootblock-objs)) --end-group
endif # CONFIG_ARCH_BOOTBLOCK_ARM
@@ -75,9 +73,9 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM
# verification stage
###############################################################################
-$(objcbfs)/verstage.debug: $$(verstage-objs) $(obj)/arch/arm/verstage.verstage.ld $$(VB2_LIB)
+$(objcbfs)/verstage.debug: $$(verstage-objs) $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $$(VB2_LIB)
@printf " LINK $(subst $(obj)/,,$(@))\n"
- $(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/arch/arm/verstage.verstage.ld --start-group $(verstage-objs) --end-group
+ $(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld --start-group $(verstage-objs) --end-group
verstage-y += div0.c
verstage-y += eabi_compat.c
@@ -86,8 +84,6 @@ verstage-y += memcpy.S
verstage-y += memmove.S
verstage-y += stages.c
-verstage-y += verstage.ld
-
###############################################################################
# romstage
###############################################################################
@@ -107,13 +103,11 @@ rmodules_arm-y += memcpy.S
rmodules_arm-y += memmove.S
rmodules_arm-y += eabi_compat.c
-romstage-y += romstage.ld
-
VBOOT_STUB_DEPS += $(obj)/arch/arm/eabi_compat.rmodules_arm.o
-$(objcbfs)/romstage.debug: $$(romstage-objs) $(obj)/arch/arm/romstage.romstage.ld
+$(objcbfs)/romstage.debug: $$(romstage-objs)
@printf " LINK $(subst $(obj)/,,$(@))\n"
- $(LD_romstage) -nostdlib --gc-sections -static -o $@ -L$(obj) -T $(obj)/arch/arm/romstage.romstage.ld --start-group $(romstage-objs) --end-group
+ $(LD_romstage) -nostdlib --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.romstage.ld --start-group $(filter-out %.ld,$(romstage-objs)) --end-group
endif # CONFIG_ARCH_ROMSTAGE_ARM
@@ -133,20 +127,15 @@ ramstage-y += memset.S
ramstage-y += memcpy.S
ramstage-y += memmove.S
ramstage-y += clock.c
+
rmodules_arm-y += memset.S
rmodules_arm-y += memcpy.S
rmodules_arm-y += memmove.S
rmodules_arm-y += eabi_compat.c
ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
-ramstage-y += ramstage.ld
-
-$(objcbfs)/ramstage.debug: $$(ramstage-objs) $(obj)/arch/arm/ramstage.ramstage.ld
- @printf " CC $(subst $(obj)/,,$(@))\n"
- $(LD_ramstage) -nostdlib --gc-sections -o $@ -L$(obj) -T $(obj)/arch/arm/ramstage.ramstage.ld --start-group $(ramstage-objs) --end-group
-
-$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs)
+$(objcbfs)/ramstage.debug: $$(ramstage-objs)
@printf " CC $(subst $(obj)/,,$(@))\n"
- $(LD_ramstage) -nostdlib --gc-sections -r -o $@ --start-group $(ramstage-objs) --end-group
+ $(LD_ramstage) -nostdlib --gc-sections -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.ramstage.ld --start-group $(filter-out %.ld,$(ramstage-objs)) --end-group
endif # CONFIG_ARCH_RAMSTAGE_ARM
diff --git a/src/arch/arm/armv4/bootblock.S b/src/arch/arm/armv4/bootblock.S
index e4d43029f..1a30dda65 100644
--- a/src/arch/arm/armv4/bootblock.S
+++ b/src/arch/arm/armv4/bootblock.S
@@ -44,10 +44,8 @@ ENTRY(_start)
* Initialize the stack to a known value. This is used to check for
* stack overflow later in the boot process.
*/
- ldr r0, .Stack
- ldr r1, .Stack_size
- sub r0, r0, r1
- ldr r1, .Stack
+ ldr r0, =_stack
+ ldr r1, =_estack
ldr r2, =0xdeadbeef
init_stack_loop:
str r2, [r0]
@@ -57,7 +55,7 @@ init_stack_loop:
/* Set stackpointer in internal RAM to call bootblock main() */
call_bootblock:
- ldr sp, .Stack /* Set up stack pointer */
+ ldr sp, =_estack /* Set up stack pointer */
ldr r0,=0x00000000
/*
* The current design of cpu_info places the
@@ -75,15 +73,3 @@ call_bootblock:
*/
bl main
ENDPROC(_start)
-
-/* we do it this way because it's a 32-bit constant and
- * in some cases too far away to be loaded as just an offset
- * from IP
- */
-.align 2
-.Stack:
- .word CONFIG_STACK_TOP
-.align 2
-/* create this size the same way we do in coreboot_ram.ld: top-bottom */
-.Stack_size:
- .word CONFIG_STACK_TOP - CONFIG_STACK_BOTTOM
diff --git a/src/arch/arm/armv7/bootblock.S b/src/arch/arm/armv7/bootblock.S
index a15d1672c..b468e15c9 100644
--- a/src/arch/arm/armv7/bootblock.S
+++ b/src/arch/arm/armv7/bootblock.S
@@ -62,10 +62,8 @@ ENTRY(_thumb_start)
* Initialize the stack to a known value. This is used to check for
* stack overflow later in the boot process.
*/
- ldr r0, .Stack
- ldr r1, .Stack_size
- sub r0, r0, r1
- ldr r1, .Stack
+ ldr r0, =_stack
+ ldr r1, =_estack
ldr r2, =0xdeadbeef
init_stack_loop:
str r2, [r0]
@@ -75,7 +73,7 @@ init_stack_loop:
/* Set stackpointer in internal RAM to call bootblock main() */
call_bootblock:
- ldr sp, .Stack /* Set up stack pointer */
+ ldr sp, =_estack /* Set up stack pointer */
ldr r0,=0x00000000
/*
* The current design of cpu_info places the struct at the top of the
@@ -89,15 +87,3 @@ wait_for_interrupt:
wfi
mov pc, lr @ back to my caller
ENDPROC(_thumb_start)
-
-/* we do it this way because it's a 32-bit constant and
- * in some cases too far away to be loaded as just an offset
- * from IP
- */
-.align 2
-.Stack:
- .word CONFIG_STACK_TOP
-.align 2
-/* create this size the same way we do in coreboot_ram.ld: top-bottom */
-.Stack_size:
- .word CONFIG_STACK_TOP - CONFIG_STACK_BOTTOM
diff --git a/src/arch/arm/armv7/mmu.c b/src/arch/arm/armv7/mmu.c
index bd12946d2..e9c681530 100644
--- a/src/arch/arm/armv7/mmu.c
+++ b/src/arch/arm/armv7/mmu.c
@@ -31,6 +31,7 @@
#include <config.h>
#include <stdlib.h>
#include <stdint.h>
+#include <symbols.h>
#include <cbmem.h>
#include <console/console.h>
@@ -90,7 +91,7 @@ typedef uint32_t pmd_t;
static const unsigned int denom = 1;
#endif /* CONFIG_ARM_LPAE */
-static pmd_t *const ttb_buff = (pmd_t *)CONFIG_TTB_BUFFER;
+static pmd_t *const ttb_buff = (pmd_t *)_ttb;
/*
* mask/shift/size for pages and blocks
@@ -186,7 +187,7 @@ void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
void mmu_init(void)
{
if (CONFIG_ARM_LPAE) {
- pgd_t *const pgd_buff = (pgd_t*)(CONFIG_TTB_BUFFER + 16*KiB);
+ pgd_t *const pgd_buff = (pgd_t*)(_ttb + 16*KiB);
pmd_t *pmd = ttb_buff;
int i;
diff --git a/src/arch/arm/bootblock.ld b/src/arch/arm/include/arch/header.ld
index 091e3ebdd..2138c774b 100644
--- a/src/arch/arm/bootblock.ld
+++ b/src/arch/arm/include/arch/header.ld
@@ -1,8 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2006 Advanced Micro Devices, Inc.
- * Copyright (C) 2008-2010 coresystems GmbH
+ * Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,34 +26,8 @@ PHDRS
to_load PT_LOAD;
}
+#ifdef __BOOTBLOCK__
ENTRY(_start)
-SECTIONS
-{
- . = CONFIG_BOOTBLOCK_BASE;
-
- .bootblock . : {
- *(.text._start);
- KEEP(*(.id));
- *(.text);
- *(.text.*);
- *(.rodata);
- *(.rodata.*);
- *(.data);
- *(.data.*);
- *(.bss);
- *(.bss.*);
- *(.sbss);
- *(.sbss.*);
- _end = .;
- } : to_load = 0xff
-
- preram_cbmem_console = CONFIG_CONSOLE_PRERAM_BUFFER_BASE;
-
- /DISCARD/ : {
- *(.comment)
- *(.note)
- *(.comment.*)
- *(.note.*)
- *(.ARM.*)
- }
-}
+#else
+ENTRY(stage_entry)
+#endif
diff --git a/src/arch/arm/include/arch/memlayout.h b/src/arch/arm/include/arch/memlayout.h
new file mode 100644
index 000000000..9f5b38316
--- /dev/null
+++ b/src/arch/arm/include/arch/memlayout.h
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* This file contains macro definitions for memlayout.ld linker scripts. */
+
+#ifndef __ARCH_MEMLAYOUT_H
+#define __ARCH_MEMLAYOUT_H
+
+#define TTB(addr, size) \
+ REGION(ttb, addr, size, 16K) \
+ _ = ASSERT(size >= 16K + IS_ENABLED(CONFIG_ARM_LPAE) * 32, \
+ "TTB must be 16K (+ 32 for LPAE)!");
+
+/* ARM stacks need 8-byte alignment and stay in one place through ramstage. */
+#define STACK(addr, size) REGION(stack, addr, size, 8)
+
+#define DMA_COHERENT(addr, size) \
+ REGION(dma_coherent, addr, size, (1 + IS_ENABLED(CONFIG_ARM_LPAE)) * 1M) \
+ _ = ASSERT(size % ((1 + IS_ENABLED(CONFIG_ARM_LPAE)) * 1M) == 0, \
+ "DMA coherency buffer must fit exactly in full superpages!");
+
+#endif /* __ARCH_MEMLAYOUT_H */
diff --git a/src/arch/arm/include/arch/stages.h b/src/arch/arm/include/arch/stages.h
index 39fed990c..1a0dcc1f8 100644
--- a/src/arch/arm/include/arch/stages.h
+++ b/src/arch/arm/include/arch/stages.h
@@ -22,7 +22,7 @@
extern void main(void);
-void stage_entry(void) __attribute__((section(".text.stage_entry.arm")));
+void stage_entry(void);
void stage_exit(void *);
#endif
diff --git a/src/arch/arm/ramstage.ld b/src/arch/arm/ramstage.ld
deleted file mode 100644
index 7daa8cbbb..000000000
--- a/src/arch/arm/ramstage.ld
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * Memory map:
- *
- * CONFIG_RAMSTAGE_BASE : text segment
- * : rodata segment
- * : data segment
- * : bss segment
- * : stack
- * : heap
- */
-/*
- * Bootstrap code for the STPC Consumer
- * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
- */
-
-/*
- * Written by Johan Rydberg, based on work by Daniel Kahlin.
- * Rewritten by Eric Biederman
- * 2005.12 yhlu add ramstage cross the vga font buffer handling
- */
-
-ENTRY(stage_entry)
-
-PHDRS
-{
- to_load PT_LOAD;
-}
-
-SECTIONS
-{
- . = CONFIG_RAMSTAGE_BASE;
- /* First we place the code and read only data (typically const declared).
- * This could theoretically be placed in rom.
- */
- .text : {
- _text = .;
- _start = .;
- *(.text.stage_entry.arm);
- *(.text);
- *(.text.*);
- . = ALIGN(16);
- _etext = .;
- } : to_load
-
- .ctors : {
- . = ALIGN(0x100);
- __CTOR_LIST__ = .;
- KEEP(*(.ctors));
- LONG(0);
- __CTOR_END__ = .;
- }
-
- .rodata : {
- _rodata = .;
- . = ALIGN(4);
- pci_drivers = . ;
- KEEP(*(.rodata.pci_driver));
- epci_drivers = . ;
- cpu_drivers = . ;
- KEEP(*(.rodata.cpu_driver));
- ecpu_drivers = . ;
- _bs_init_begin = .;
- KEEP(*(.bs_init));
- LONG(0);
- _bs_init_end = .;
- *(.rodata)
- *(.rodata.*)
- /* kevinh/Ispiri - Added an align, because the objcopy tool
- * incorrectly converts sections that are not long word aligned.
- */
- . = ALIGN(4);
-
- _erodata = .;
- }
- /* After the code we place initialized data (typically initialized
- * global variables). This gets copied into ram by startup code.
- * __data_start and __data_end shows where in ram this should be placed,
- * whereas __data_loadstart and __data_loadend shows where in rom to
- * copy from.
- */
- .data : {
- _data = .;
- *(.data)
- *(.data.*)
- _edata = .;
- }
-
- /* bss does not contain data, it is just a space that should be zero
- * initialized on startup. (typically uninitialized global variables)
- * crt0.S fills between _bss and _ebss with zeroes.
- */
- .bss . : {
- _bss = .;
- *(.bss)
- *(.bss.*)
- *(.sbss)
- *(.sbss.*)
- _ebss = .;
- }
- _end = .;
-
- /* coreboot really "ends" here. Only heap and stack are placed after
- * this line.
- */
-
- .heap . : {
- _heap = .;
- /* Reserve CONFIG_HEAP_SIZE bytes for the heap */
- . = CONFIG_HEAP_SIZE ;
- . = ALIGN(4);
- _eheap = .;
- }
-
- /* The ram segment. This includes all memory used by the memory
- * resident copy of coreboot, except the tables that are produced on
- * the fly, but including stack and heap.
- */
- _ram_seg = _text;
- _eram_seg = _eheap;
-
- /* The stack lives in SRAM in a different location, so keep
- * it out of ram_seg
- */
- _stack = CONFIG_STACK_BOTTOM;
- _estack = CONFIG_STACK_TOP;
-
- /* Discard the sections we don't need/want */
-
- /DISCARD/ : {
- *(.comment)
- *(.note)
- *(.note.*)
- }
-}
diff --git a/src/arch/arm/romstage.ld b/src/arch/arm/romstage.ld
deleted file mode 100644
index d107687c9..000000000
--- a/src/arch/arm/romstage.ld
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Memory map:
- *
- * CONFIG_ROMSTAGE_BASE : text segment
- * : rodata segment
- * : data segment
- * : bss segment
- * : stack
- * : heap
- */
-/*
- * Bootstrap code for the STPC Consumer
- * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
- */
-
-/*
- * Written by Johan Rydberg, based on work by Daniel Kahlin.
- * Rewritten by Eric Biederman
- * 2005.12 yhlu add ramstage cross the vga font buffer handling
- */
-
-/* We use ELF as output format. So that we can debug the code in some form. */
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-
-ENTRY(stage_entry)
-
-PHDRS
-{
- to_load PT_LOAD;
-}
-
-SECTIONS
-{
- . = CONFIG_ROMSTAGE_BASE;
-
- .romtext . : {
- _start = .;
- *(.text.stage_entry.arm);
- *(.text.startup);
- *(.text);
- *(.text.*);
- } : to_load
-
- .romdata . : {
- *(.rodata);
- *(.rodata.*);
- *(.data);
- *(.data.*);
- . = ALIGN(8);
- }
-
- /* bss does not contain data, it is just a space that should be zero
- * initialized on startup. (typically uninitialized global variables)
- * crt0.S fills between _bss and _ebss with zeroes.
- */
- .bss . : {
- . = ALIGN(8);
- _bss = .;
- *(.bss)
- *(.bss.*)
- *(.sbss)
- *(.sbss.*)
- _ebss = .;
- }
-
- _end = .;
-
- preram_cbmem_console = CONFIG_CONSOLE_PRERAM_BUFFER_BASE;
-
- /* Discard the sections we don't need/want */
- /DISCARD/ : {
- *(.comment)
- *(.note)
- *(.comment.*)
- *(.note.*)
- *(.eh_frame);
- }
-}
diff --git a/src/arch/arm/stages.c b/src/arch/arm/stages.c
index 47f13fa71..11acc9bd7 100644
--- a/src/arch/arm/stages.c
+++ b/src/arch/arm/stages.c
@@ -22,10 +22,10 @@
* execution (bootblock entry and ramstage exit will depend on external
* loading).
*
- * Entry points must be placed at the location the previous stage jumps
- * to (the lowest address in the stage image). This is done by giving
- * stage_entry() its own section in .text and placing it first in the
- * linker script.
+ * Entry points should be set in the linker script and honored by CBFS,
+ * so text section layout shouldn't matter. Still, it doesn't hurt to put
+ * stage_entry first (which XXXstage.ld will do automatically through the
+ * .text.stage_entry section created by -ffunction-sections).
*/
#include <arch/stages.h>
diff --git a/src/arch/arm/verstage.ld b/src/arch/arm/verstage.ld
deleted file mode 100644
index 88d4bc8df..000000000
--- a/src/arch/arm/verstage.ld
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Memory map:
- *
- * CONFIG_VERSTAGE_BASE : text segment
- * : rodata segment
- * : data segment
- * : bss segment
- */
-
-/* We use ELF as output format. So that we can debug the code in some form. */
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-
-PHDRS
-{
- to_load PT_LOAD;
-}
-
-ENTRY(stage_entry)
-
-SECTIONS
-{
- . = CONFIG_VERSTAGE_BASE;
-
- .romtext . : {
- _start = .;
- *(.text.stage_entry.arm);
- *(.text.startup);
- *(.text);
- *(.text.*);
- } : to_load
-
- .romdata . : {
- *(.rodata);
- *(.rodata.*);
- *(.data);
- *(.data.*);
- . = ALIGN(8);
- }
-
- /* bss does not contain data, it is just a space that should be zero
- * initialized on startup. (typically uninitialized global variables)
- */
- .bss . : {
- . = ALIGN(8);
- _bss = .;
- *(.bss)
- *(.bss.*)
- *(.sbss)
- *(.sbss.*)
- _ebss = .;
- }
-
- _end = .;
-
- preram_cbmem_console = CONFIG_CONSOLE_PRERAM_BUFFER_BASE;
-
- /* Discard the sections we don't need/want */
- /DISCARD/ : {
- *(.comment)
- *(.note)
- *(.comment.*)
- *(.note.*)
- *(.eh_frame);
- }
-}