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-rw-r--r--src/drivers/intel/gma/i915.h1
-rw-r--r--src/northbridge/intel/gm45/gma.c8
2 files changed, 7 insertions, 2 deletions
diff --git a/src/drivers/intel/gma/i915.h b/src/drivers/intel/gma/i915.h
index 0d5b8af8e..36ac5fc6d 100644
--- a/src/drivers/intel/gma/i915.h
+++ b/src/drivers/intel/gma/i915.h
@@ -291,6 +291,7 @@ struct i915_gpu_controller_info
int lvds_dual_channel;
int link_frequency_270_mhz;
int lvds_num_lanes;
+ u32 backlight;
};
int i915lightup(unsigned int physbase, unsigned int mmio,
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 4cf277616..b08422a02 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -446,12 +446,13 @@ static void gma_func0_init(struct device *dev)
/* Init graphics power management */
gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ struct northbridge_intel_gm45_config *conf = dev->chip_info;
+
#if !CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
/* PCI Init, will run VBIOS */
pci_dev_init(dev);
#else
u32 physbase;
- struct northbridge_intel_gm45_config *conf = dev->chip_info;
struct resource *lfb_res;
struct resource *pio_res;
@@ -475,7 +476,10 @@ static void gma_func0_init(struct device *dev)
/* Post VBIOS init */
/* Enable Backlight */
gtt_write(BLC_PWM_CTL2, (1 << 31));
- gtt_write(BLC_PWM_CTL, 0x06100610);
+ if (conf->gfx.backlight == 0)
+ gtt_write(BLC_PWM_CTL, 0x06100610);
+ else
+ gtt_write(BLC_PWM_CTL, conf->gfx.backlight);
}
static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)