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authorPaul Menzel <paulepanter@users.sourceforge.net>2015-01-14 16:53:05 +0100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2015-01-14 19:28:19 +0100
commit5780d6f3876723b94fbe3653c9d87dad6330862e (patch)
treefd2b065af5706b8216ead4a9f12ae32de4cb2946 /toolchain.inc
parent3bde659445a70443b444cfdd9473db2639641233 (diff)
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Revert "vboot2: add verstage"
This reverts commit 320647abdad1ea6cdceb834933507677020ea388, because it introduced the following regression. $ LANG=C make V=1 Warning: no suitable GCC for arm. Warning: no suitable GCC for aarch64. Warning: no suitable GCC for riscv. /bin/sh: --: invalid option Usage: /bin/sh [GNU long option] [option] ... /bin/sh [GNU long option] [option] script-file ... GNU long options: --debug --debugger --dump-po-strings --dump-strings --help --init-file --login --noediting --noprofile --norc --posix --rcfile --restricted --verbose --version Shell options: -ilrsD or -c command or -O shopt_option (invocation only) -abefhkmnptuvxBCHP or -o option make: -print-libgcc-file-name: Command not found It also introduced trailing whitespace. Change-Id: I50ec00a38e24c854fa926357cd24f9286bf4f66f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/8223 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'toolchain.inc')
-rw-r--r--toolchain.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/toolchain.inc b/toolchain.inc
index bd8da8336..b54d95935 100644
--- a/toolchain.inc
+++ b/toolchain.inc
@@ -51,7 +51,7 @@ HOSTCXX:=CCC_CXX="$(HOSTCXX)" $(CXX)
ROMCC=CCC_CC="$(ROMCC_BIN)" $(CC)
endif
-COREBOOT_STANDARD_STAGES := bootblock verstage romstage ramstage
+COREBOOT_STANDARD_STAGES := bootblock romstage ramstage
ARCHDIR-i386 := x86
ARCHDIR-x86_32 := x86