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authorGabe Black <gabeblack@google.com>2013-09-30 23:00:33 -0700
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-09-08 18:59:23 +0200
commit51edd54738b2248e92580caa317aa4e8e1694d40 (patch)
treed10c6be921f2d3656d9f504f4572a1c73f7860e3 /src
parent94b4a266fb4df1f2f59ed8052c150ee4bf3e6d41 (diff)
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ARM: Generalize armv7 as arm.
There are ARM systems which are essentially heterogeneous multicores where some cores implement a different ARM architecture version than other cores. A specific example is the tegra124 which boots on an ARMv4 coprocessor while most code, including most of the firmware, runs on the main ARMv7 core. To support SOCs like this, the plan is to generalize the ARM architecture so that all versions are available, and an SOC/CPU can then select what architecture variant should be used for each component of the firmware; bootblock, romstage, and ramstage. Old-Change-Id: I22e048c3bc72bd56371e14200942e436c1e312c2 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/171338 Reviewed-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 8423a41529da0ff67fb9873be1e2beb30b09ae2d) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> ARM: Split out ARMv7 code and make it possible to have other arch versions. We don't always want to use ARMv7 code when building for ARM, so we should separate out the ARMv7 code so it can be excluded, and also make it possible to include code for some other version of the architecture instead, all per build component for cases where we need more than one architecture version at a time. The tegra124 bootblock will ultimately need to be ARMv4, but until we have some ARMv4 code to switch over to we can leave it set to ARMv7. Old-Change-Id: Ia982c91057fac9c252397b7c866224f103761cc7 Reviewed-on: https://chromium-review.googlesource.com/171400 Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 799514e6060aa97acdcf081b5c48f965be134483) Squashed two related patches for splitting ARM support into general ARM support and ARMv7 specific pieces. Change-Id: Ic6511507953a2223c87c55f90252c4a4e1dd6010 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6782 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
-rw-r--r--src/Kconfig6
-rw-r--r--src/arch/arm/Kconfig (renamed from src/arch/armv7/Kconfig)10
-rw-r--r--src/arch/arm/Makefile.inc (renamed from src/arch/armv7/Makefile.inc)60
-rw-r--r--src/arch/arm/armv7/Kconfig11
-rw-r--r--src/arch/arm/armv7/Makefile.inc71
-rw-r--r--src/arch/arm/armv7/bootblock.S (renamed from src/arch/armv7/bootblock.S)0
-rw-r--r--src/arch/arm/armv7/bootblock_simple.c (renamed from src/arch/armv7/bootblock_simple.c)2
-rw-r--r--src/arch/arm/armv7/cache.c (renamed from src/arch/armv7/cache.c)2
-rw-r--r--src/arch/arm/armv7/exception.c (renamed from src/arch/armv7/exception.c)0
-rw-r--r--src/arch/arm/armv7/exception_asm.S (renamed from src/arch/armv7/exception_asm.S)0
-rw-r--r--src/arch/arm/armv7/mmu.c (renamed from src/arch/armv7/mmu.c)0
-rw-r--r--src/arch/arm/armv7/thread.c (renamed from src/arch/armv7/thread.c)0
-rw-r--r--src/arch/arm/boot.c (renamed from src/arch/armv7/boot.c)0
-rw-r--r--src/arch/arm/bootblock.ld (renamed from src/arch/armv7/bootblock.ld)0
-rw-r--r--src/arch/arm/cpu.c (renamed from src/arch/armv7/cpu.c)0
-rw-r--r--src/arch/arm/div0.c (renamed from src/arch/armv7/div0.c)0
-rw-r--r--src/arch/arm/eabi_compat.c (renamed from src/arch/armv7/eabi_compat.c)0
-rw-r--r--src/arch/arm/id.S (renamed from src/arch/armv7/id.S)0
-rw-r--r--src/arch/arm/include/arch/boot/boot.h (renamed from src/arch/armv7/include/arch/boot/boot.h)0
-rw-r--r--src/arch/arm/include/arch/byteorder.h (renamed from src/arch/armv7/include/arch/byteorder.h)0
-rw-r--r--src/arch/arm/include/arch/early_variables.h (renamed from src/arch/armv7/include/arch/early_variables.h)0
-rw-r--r--src/arch/arm/include/arch/exception.h (renamed from src/arch/armv7/include/arch/exception.h)0
-rw-r--r--src/arch/arm/include/arch/hlt.h (renamed from src/arch/armv7/include/arch/hlt.h)0
-rw-r--r--src/arch/arm/include/arch/io.h (renamed from src/arch/armv7/include/arch/io.h)43
-rw-r--r--src/arch/arm/include/arch/pci_ops.h (renamed from src/arch/armv7/include/arch/pci_ops.h)4
-rw-r--r--src/arch/arm/include/arch/stages.h (renamed from src/arch/armv7/include/arch/stages.h)2
-rw-r--r--src/arch/arm/include/armv7.h (renamed from src/arch/armv7/include/armv7.h)0
-rw-r--r--src/arch/arm/include/armv7/arch/arch_io.h68
-rw-r--r--src/arch/arm/include/armv7/arch/cache.h (renamed from src/arch/armv7/include/arch/cache.h)12
-rw-r--r--src/arch/arm/include/armv7/arch/cpu.h (renamed from src/arch/armv7/include/arch/cpu.h)0
-rw-r--r--src/arch/arm/include/armv7/arch/types.h (renamed from src/arch/armv7/include/arch/types.h)0
-rw-r--r--src/arch/arm/include/assembler.h (renamed from src/arch/armv7/include/assembler.h)0
-rw-r--r--src/arch/arm/include/bootblock_common.h (renamed from src/arch/armv7/include/bootblock_common.h)0
-rw-r--r--src/arch/arm/include/clocks.h (renamed from src/arch/armv7/include/clocks.h)0
-rw-r--r--src/arch/arm/include/smp/spinlock.h (renamed from src/arch/armv7/include/smp/spinlock.h)0
-rw-r--r--src/arch/arm/include/stdint.h (renamed from src/arch/armv7/include/stdint.h)0
-rw-r--r--src/arch/arm/include/utils.h (renamed from src/arch/armv7/include/utils.h)0
-rw-r--r--src/arch/arm/memcpy.S (renamed from src/arch/armv7/memcpy.S)0
-rw-r--r--src/arch/arm/memmove.S (renamed from src/arch/armv7/memmove.S)0
-rw-r--r--src/arch/arm/memset.S (renamed from src/arch/armv7/memset.S)0
-rw-r--r--src/arch/arm/ramstage.ld (renamed from src/arch/armv7/ramstage.ld)2
-rw-r--r--src/arch/arm/romstage.ld (renamed from src/arch/armv7/romstage.ld)2
-rw-r--r--src/arch/arm/stages.c (renamed from src/arch/armv7/stages.c)0
-rw-r--r--src/arch/arm/tables.c (renamed from src/arch/armv7/tables.c)0
-rw-r--r--src/console/Kconfig2
-rw-r--r--src/cpu/ti/am335x/Makefile.inc2
-rw-r--r--src/device/oprom/yabel/device.h8
-rw-r--r--src/drivers/uart/Kconfig2
-rw-r--r--src/include/cbfs_core.h2
-rw-r--r--src/soc/nvidia/tegra124/bootblock_asm.S2
-rw-r--r--src/vendorcode/google/chromeos/fmap.c2
51 files changed, 208 insertions, 107 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 45a215593..97a479919 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -210,12 +210,12 @@ config ARCH_X86
default n
select PCI
-config ARCH_ARMV7
+config ARCH_ARM
bool
default n
source src/arch/x86/Kconfig
-source src/arch/armv7/Kconfig
+source src/arch/arm/Kconfig
source src/vendorcode/Kconfig
@@ -273,7 +273,7 @@ config TPM
bool
default n
select LPC_TPM if ARCH_X86
- select I2C_TPM if ARCH_ARMV7
+ select I2C_TPM if ARCH_ARM
help
Enable this option to enable TPM support in coreboot.
diff --git a/src/arch/armv7/Kconfig b/src/arch/arm/Kconfig
index e27247460..050cd62a2 100644
--- a/src/arch/armv7/Kconfig
+++ b/src/arch/arm/Kconfig
@@ -1,16 +1,18 @@
-config ARCH_BOOTBLOCK_ARMV7
+config ARCH_BOOTBLOCK_ARM
bool
default n
- select ARCH_ARMV7
+ select ARCH_ARM
-config ARCH_ROMSTAGE_ARMV7
+config ARCH_ROMSTAGE_ARM
bool
default n
-config ARCH_RAMSTAGE_ARMV7
+config ARCH_RAMSTAGE_ARM
bool
default n
+source src/arch/arm/armv7/Kconfig
+
# If a custom bootblock is necessary, this option should be "select"-ed by
# the thing that needs it, probably the CPU.
config ARM_BOOTBLOCK_CUSTOM
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/arm/Makefile.inc
index 2022f2078..8838edfd4 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/arm/Makefile.inc
@@ -23,98 +23,86 @@
###############################################################################
# Take care of subdirectories
###############################################################################
-subdirs-y += boot/
-subdirs-y += lib/
+subdirs-y += armv7/
###############################################################################
# ARM specific options
###############################################################################
-ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y)
-CBFSTOOL_PRE1_OPTS = -m armv7 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET)
+ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y)
+CBFSTOOL_PRE1_OPTS = -m arm -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET)
CBFSTOOL_PRE_OPTS = -b 0
endif
-ifeq ($(CONFIG_ARCH_ARMV7),y)
-stages_c = $(src)/arch/armv7/stages.c
-stages_o = $(obj)/arch/armv7/stages.o
+ifeq ($(CONFIG_ARCH_ARM),y)
+stages_c = $(src)/arch/arm/stages.c
+stages_o = $(obj)/arch/arm/stages.o
$(stages_o): $(stages_c) $(obj)/config.h
@printf " CC $(subst $(obj)/,,$(@))\n"
- $(CC_armv7) -I. $(CPPFLAGS_armv7) -c -o $@ $< -marm
+ $(CC_arm) -I. $(CPPFLAGS_arm) -c -o $@ $< -marm
-endif # CONFIG_ARCH_ARMV7
+endif # CONFIG_ARCH_ARM
###############################################################################
# bootblock
###############################################################################
-ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y)
+ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARM),y)
-ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y)
-bootblock-y += bootblock.S
-bootblock-$(CONFIG_BOOTBLOCK_SIMPLE) += bootblock_simple.c
-endif
bootblock-y += id.S
$(obj)/arch/arm/id.bootblock.o: $(obj)/build.h
bootblock-y += stages.c
-bootblock-y += cache.c
bootblock-y += eabi_compat.c
bootblock-y += memset.S
bootblock-y += memcpy.S
bootblock-y += memmove.S
-bootblock-y += mmu.c
-$(objcbfs)/bootblock.debug: $(src)/arch/armv7/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $(obj)/config.h
+$(objcbfs)/bootblock.debug: $(src)/arch/arm/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $(obj)/config.h
@printf " LINK $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
- $(LD_bootblock) -m armelf_linux_eabi -static -o $@ -L$(obj) $< -T $(src)/arch/armv7/bootblock.ld
+ $(LD_bootblock) -m armelf_linux_eabi -static -o $@ -L$(obj) $< -T $(src)/arch/arm/bootblock.ld
else
- $(CC_bootblock) $(CFLAGS_bootblock) -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(src)/arch/armv7/bootblock.ld -Wl,--start-group $(bootblock-objs) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group
+ $(CC_bootblock) $(CFLAGS_bootblock) -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(src)/arch/arm/bootblock.ld -Wl,--start-group $(bootblock-objs) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group
endif
-endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
+endif # CONFIG_ARCH_BOOTBLOCK_ARM
###############################################################################
# romstage
###############################################################################
-ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y)
+ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y)
romstage-y += stages.c
-romstage-y += cache.c
romstage-y += div0.c
romstage-y += eabi_compat.c
romstage-y += memset.S
romstage-y += memcpy.S
romstage-y += memmove.S
-VBOOT_STUB_DEPS += $(obj)/arch/armv7/eabi_compat.rmodules_arm.o
+VBOOT_STUB_DEPS += $(obj)/arch/arm/eabi_compat.rmodules_arm.o
-$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/armv7/romstage.ld $(obj)/ldoptions
+$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/arm/romstage.ld $(obj)/ldoptions
@printf " LINK $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
- $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/armv7/romstage.ld
+ $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/arm/romstage.ld
else
- $(CC_romstage) $(CFLAGS_romstage) -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/romstage.ld -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group
+ $(CC_romstage) $(CFLAGS_romstage) -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/arm/romstage.ld -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group
endif
-endif # CONFIG_ARCH_ROMSTAGE_ARMV7
+endif # CONFIG_ARCH_ROMSTAGE_ARM
###############################################################################
# ramstage
###############################################################################
-ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV7),y)
+ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM),y)
ramstage-y += stages.c
-ramstage-y += exception.c
-ramstage-y += exception_asm.S
ramstage-y += div0.c
-ramstage-y += cache.c
ramstage-y += cpu.c
-ramstage-y += mmu.c
ramstage-y += eabi_compat.c
ramstage-y += boot.c
ramstage-y += tables.c
@@ -123,12 +111,12 @@ ramstage-y += memcpy.S
ramstage-y += memmove.S
ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
-$(objcbfs)/ramstage.debug: $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) $(src)/arch/armv7/ramstage.ld $(obj)/ldoptions
+$(objcbfs)/ramstage.debug: $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) $(src)/arch/arm/ramstage.ld $(obj)/ldoptions
@printf " CC $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
- $(LD_ramstage) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld
+ $(LD_ramstage) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/arm/ramstage.ld
else
- $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group -T $(src)/arch/armv7/ramstage.ld
+ $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group -T $(src)/arch/arm/ramstage.ld
endif
$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage)
@@ -139,4 +127,4 @@ else
$(CC_ramstage) $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
endif
-endif # CONFIG_ARCH_RAMSTAGE_ARMV7
+endif # CONFIG_ARCH_RAMSTAGE_ARM
diff --git a/src/arch/arm/armv7/Kconfig b/src/arch/arm/armv7/Kconfig
new file mode 100644
index 000000000..f8e0205c4
--- /dev/null
+++ b/src/arch/arm/armv7/Kconfig
@@ -0,0 +1,11 @@
+config ARCH_BOOTBLOCK_ARMV7
+ def_bool n
+ select ARCH_BOOTBLOCK_ARM
+
+config ARCH_ROMSTAGE_ARMV7
+ def_bool n
+ select ARCH_ROMSTAGE_ARM
+
+config ARCH_RAMSTAGE_ARMV7
+ def_bool n
+ select ARCH_RAMSTAGE_ARM
diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc
new file mode 100644
index 000000000..bcd7d9e46
--- /dev/null
+++ b/src/arch/arm/armv7/Makefile.inc
@@ -0,0 +1,71 @@
+################################################################################
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2013 The ChromiumOS Authors
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+###############################################################################
+
+armv7_flags = -march=armv7-a -mthumb -mthumb-interwork \
+ -I$(src)/arch/arm/include/armv7/
+
+###############################################################################
+# bootblock
+###############################################################################
+
+ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y)
+
+ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y)
+bootblock-y += bootblock.S
+bootblock-$(CONFIG_BOOTBLOCK_SIMPLE) += bootblock_simple.c
+endif
+
+bootblock-y += cache.c
+bootblock-y += mmu.c
+
+CFLAGS_bootblock += $(armv7_flags)
+CPPFLAGS_bootblock += $(armv7_flags)
+
+endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
+
+###############################################################################
+# romstage
+###############################################################################
+
+ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y)
+
+romstage-y += cache.c
+
+CFLAGS_romstage += $(armv7_flags)
+CPPFLAGS_romstage += $(armv7_flags)
+
+endif # CONFIG_ARCH_ROMSTAGE_ARMV7
+
+###############################################################################
+# ramstage
+###############################################################################
+
+ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV7),y)
+
+ramstage-y += cache.c
+ramstage-y += exception.c
+ramstage-y += exception_asm.S
+ramstage-y += mmu.c
+
+CFLAGS_ramstage += $(armv7_flags)
+CPPFLAGS_ramstage += $(armv7_flags)
+
+endif # CONFIG_ARCH_RAMSTAGE_ARMV7
diff --git a/src/arch/armv7/bootblock.S b/src/arch/arm/armv7/bootblock.S
index b28a78783..b28a78783 100644
--- a/src/arch/armv7/bootblock.S
+++ b/src/arch/arm/armv7/bootblock.S
diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/arm/armv7/bootblock_simple.c
index bcd83b8c3..f44703402 100644
--- a/src/arch/armv7/bootblock_simple.c
+++ b/src/arch/arm/armv7/bootblock_simple.c
@@ -39,7 +39,7 @@ void main(void)
sctlr &= ~(SCTLR_M | SCTLR_C | SCTLR_Z | SCTLR_I);
write_sctlr(sctlr);
- armv7_invalidate_caches();
+ arm_invalidate_caches();
/*
* Re-enable icache and branch prediction. MMU and dcache will be
diff --git a/src/arch/armv7/cache.c b/src/arch/arm/armv7/cache.c
index 1f466ce23..acd1f9aef 100644
--- a/src/arch/armv7/cache.c
+++ b/src/arch/arm/armv7/cache.c
@@ -276,7 +276,7 @@ void dcache_mmu_enable(void)
write_sctlr(sctlr);
}
-void armv7_invalidate_caches(void)
+void arm_invalidate_caches(void)
{
uint32_t clidr;
int level;
diff --git a/src/arch/armv7/exception.c b/src/arch/arm/armv7/exception.c
index 3b32e8bbb..3b32e8bbb 100644
--- a/src/arch/armv7/exception.c
+++ b/src/arch/arm/armv7/exception.c
diff --git a/src/arch/armv7/exception_asm.S b/src/arch/arm/armv7/exception_asm.S
index 163fdbd52..163fdbd52 100644
--- a/src/arch/armv7/exception_asm.S
+++ b/src/arch/arm/armv7/exception_asm.S
diff --git a/src/arch/armv7/mmu.c b/src/arch/arm/armv7/mmu.c
index cc915a6a3..cc915a6a3 100644
--- a/src/arch/armv7/mmu.c
+++ b/src/arch/arm/armv7/mmu.c
diff --git a/src/arch/armv7/thread.c b/src/arch/arm/armv7/thread.c
index d0c23ff92..d0c23ff92 100644
--- a/src/arch/armv7/thread.c
+++ b/src/arch/arm/armv7/thread.c
diff --git a/src/arch/armv7/boot.c b/src/arch/arm/boot.c
index d872a7915..d872a7915 100644
--- a/src/arch/armv7/boot.c
+++ b/src/arch/arm/boot.c
diff --git a/src/arch/armv7/bootblock.ld b/src/arch/arm/bootblock.ld
index 706f0a2c2..706f0a2c2 100644
--- a/src/arch/armv7/bootblock.ld
+++ b/src/arch/arm/bootblock.ld
diff --git a/src/arch/armv7/cpu.c b/src/arch/arm/cpu.c
index f90c75955..f90c75955 100644
--- a/src/arch/armv7/cpu.c
+++ b/src/arch/arm/cpu.c
diff --git a/src/arch/armv7/div0.c b/src/arch/arm/div0.c
index ab06ad3be..ab06ad3be 100644
--- a/src/arch/armv7/div0.c
+++ b/src/arch/arm/div0.c
diff --git a/src/arch/armv7/eabi_compat.c b/src/arch/arm/eabi_compat.c
index 0c79cd51d..0c79cd51d 100644
--- a/src/arch/armv7/eabi_compat.c
+++ b/src/arch/arm/eabi_compat.c
diff --git a/src/arch/armv7/id.S b/src/arch/arm/id.S
index a588f1e1d..a588f1e1d 100644
--- a/src/arch/armv7/id.S
+++ b/src/arch/arm/id.S
diff --git a/src/arch/armv7/include/arch/boot/boot.h b/src/arch/arm/include/arch/boot/boot.h
index 08651cd1a..08651cd1a 100644
--- a/src/arch/armv7/include/arch/boot/boot.h
+++ b/src/arch/arm/include/arch/boot/boot.h
diff --git a/src/arch/armv7/include/arch/byteorder.h b/src/arch/arm/include/arch/byteorder.h
index 8dc069f48..8dc069f48 100644
--- a/src/arch/armv7/include/arch/byteorder.h
+++ b/src/arch/arm/include/arch/byteorder.h
diff --git a/src/arch/armv7/include/arch/early_variables.h b/src/arch/arm/include/arch/early_variables.h
index cec0a4623..cec0a4623 100644
--- a/src/arch/armv7/include/arch/early_variables.h
+++ b/src/arch/arm/include/arch/early_variables.h
diff --git a/src/arch/armv7/include/arch/exception.h b/src/arch/arm/include/arch/exception.h
index 57076bd57..57076bd57 100644
--- a/src/arch/armv7/include/arch/exception.h
+++ b/src/arch/arm/include/arch/exception.h
diff --git a/src/arch/armv7/include/arch/hlt.h b/src/arch/arm/include/arch/hlt.h
index 285b6f878..285b6f878 100644
--- a/src/arch/armv7/include/arch/hlt.h
+++ b/src/arch/arm/include/arch/hlt.h
diff --git a/src/arch/armv7/include/arch/io.h b/src/arch/arm/include/arch/io.h
index e044090e6..e53729708 100644
--- a/src/arch/armv7/include/arch/io.h
+++ b/src/arch/arm/include/arch/io.h
@@ -23,48 +23,9 @@
#ifndef __ASM_ARM_IO_H
#define __ASM_ARM_IO_H
-#include <types.h>
-#include <arch/cache.h> /* for dmb() */
#include <arch/byteorder.h>
-
-static inline uint8_t read8(const void *addr)
-{
- dmb();
- return *(volatile uint8_t *)addr;
-}
-
-static inline uint16_t read16(const void *addr)
-{
- dmb();
- return *(volatile uint16_t *)addr;
-}
-
-static inline uint32_t read32(const void *addr)
-{
- dmb();
- return *(volatile uint32_t *)addr;
-}
-
-static inline void write8(uint8_t val, void *addr)
-{
- dmb();
- *(volatile uint8_t *)addr = val;
- dmb();
-}
-
-static inline void write16(uint16_t val, void *addr)
-{
- dmb();
- *(volatile uint16_t *)addr = val;
- dmb();
-}
-
-static inline void write32(uint32_t val, void *addr)
-{
- dmb();
- *(volatile uint32_t *)addr = val;
- dmb();
-}
+#include <arch/arch_io.h>
+#include <stdint.h>
/*
* FIXME: These are to avoid breaking existing ARM code. We should eventually
diff --git a/src/arch/armv7/include/arch/pci_ops.h b/src/arch/arm/include/arch/pci_ops.h
index 7a7ed32a6..faa77012d 100644
--- a/src/arch/armv7/include/arch/pci_ops.h
+++ b/src/arch/arm/include/arch/pci_ops.h
@@ -17,8 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#ifndef ARCH_ARMV7_PCI_OPS_H
-#define ARCH_ARMV7_PCI_OPS_H
+#ifndef ARCH_ARM_PCI_OPS_H
+#define ARCH_ARM_PCI_OPS_H
/* Empty stub until PCI includes are properly fixed. */
diff --git a/src/arch/armv7/include/arch/stages.h b/src/arch/arm/include/arch/stages.h
index 671c02b3d..39fed990c 100644
--- a/src/arch/armv7/include/arch/stages.h
+++ b/src/arch/arm/include/arch/stages.h
@@ -22,7 +22,7 @@
extern void main(void);
-void stage_entry(void) __attribute__((section(".text.stage_entry.armv7")));
+void stage_entry(void) __attribute__((section(".text.stage_entry.arm")));
void stage_exit(void *);
#endif
diff --git a/src/arch/armv7/include/armv7.h b/src/arch/arm/include/armv7.h
index 147323457..147323457 100644
--- a/src/arch/armv7/include/armv7.h
+++ b/src/arch/arm/include/armv7.h
diff --git a/src/arch/arm/include/armv7/arch/arch_io.h b/src/arch/arm/include/armv7/arch/arch_io.h
new file mode 100644
index 000000000..360fa6425
--- /dev/null
+++ b/src/arch/arm/include/armv7/arch/arch_io.h
@@ -0,0 +1,68 @@
+/*
+ * Originally imported from linux/include/asm-arm/io.h. This file has changed
+ * substantially since then.
+ *
+ * Copyright 2013 Google Inc.
+ * Copyright (C) 1996-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Modifications:
+ * 08-Apr-2013 G Replaced several macros with inlines for type safety.
+ * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
+ * constant addresses and variable addresses.
+ * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
+ * specific IO header files.
+ * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
+ * 04-Apr-1999 PJB Added check_signature.
+ * 12-Dec-1999 RMK More cleanups
+ * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#include <arch/cache.h> /* for dmb() */
+#include <stdint.h>
+
+static inline uint8_t read8(const void *addr)
+{
+ dmb();
+ return *(volatile uint8_t *)addr;
+}
+
+static inline uint16_t read16(const void *addr)
+{
+ dmb();
+ return *(volatile uint16_t *)addr;
+}
+
+static inline uint32_t read32(const void *addr)
+{
+ dmb();
+ return *(volatile uint32_t *)addr;
+}
+
+static inline void write8(uint8_t val, void *addr)
+{
+ dmb();
+ *(volatile uint8_t *)addr = val;
+ dmb();
+}
+
+static inline void write16(uint16_t val, void *addr)
+{
+ dmb();
+ *(volatile uint16_t *)addr = val;
+ dmb();
+}
+
+static inline void write32(uint32_t val, void *addr)
+{
+ dmb();
+ *(volatile uint32_t *)addr = val;
+ dmb();
+}
+
+#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/src/arch/armv7/include/arch/cache.h b/src/arch/arm/include/armv7/arch/cache.h
index 1cd9958fc..ffdb55a70 100644
--- a/src/arch/armv7/include/arch/cache.h
+++ b/src/arch/arm/include/armv7/arch/cache.h
@@ -26,11 +26,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * cache.h: Cache maintenance API for ARMv7
+ * cache.h: Cache maintenance API for ARM
*/
-#ifndef ARMV7_CACHE_H
-#define ARMV7_CACHE_H
+#ifndef ARM_CACHE_H
+#define ARM_CACHE_H
#include <stddef.h>
#include <stdint.h>
@@ -320,8 +320,8 @@ void tlb_invalidate_all(void);
* Generalized setup/init functions
*/
-/* invalidate all caches on ARMv7 */
-void armv7_invalidate_caches(void);
+/* invalidate all caches on ARM */
+void arm_invalidate_caches(void);
/* mmu initialization (set page table address, set permissions, etc) */
void mmu_init(void);
@@ -338,4 +338,4 @@ void mmu_disable_range(unsigned long start_mb, unsigned long size_mb);
void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
enum dcache_policy policy);
-#endif /* ARMV7_CACHE_H */
+#endif /* ARM_CACHE_H */
diff --git a/src/arch/armv7/include/arch/cpu.h b/src/arch/arm/include/armv7/arch/cpu.h
index 52cc8a3f5..52cc8a3f5 100644
--- a/src/arch/armv7/include/arch/cpu.h
+++ b/src/arch/arm/include/armv7/arch/cpu.h
diff --git a/src/arch/armv7/include/arch/types.h b/src/arch/arm/include/armv7/arch/types.h
index be7e76c5a..be7e76c5a 100644
--- a/src/arch/armv7/include/arch/types.h
+++ b/src/arch/arm/include/armv7/arch/types.h
diff --git a/src/arch/armv7/include/assembler.h b/src/arch/arm/include/assembler.h
index 10363c4e4..10363c4e4 100644
--- a/src/arch/armv7/include/assembler.h
+++ b/src/arch/arm/include/assembler.h
diff --git a/src/arch/armv7/include/bootblock_common.h b/src/arch/arm/include/bootblock_common.h
index 034a12bc3..034a12bc3 100644
--- a/src/arch/armv7/include/bootblock_common.h
+++ b/src/arch/arm/include/bootblock_common.h
diff --git a/src/arch/armv7/include/clocks.h b/src/arch/arm/include/clocks.h
index 58cf83862..58cf83862 100644
--- a/src/arch/armv7/include/clocks.h
+++ b/src/arch/arm/include/clocks.h
diff --git a/src/arch/armv7/include/smp/spinlock.h b/src/arch/arm/include/smp/spinlock.h
index 1dc397c19..1dc397c19 100644
--- a/src/arch/armv7/include/smp/spinlock.h
+++ b/src/arch/arm/include/smp/spinlock.h
diff --git a/src/arch/armv7/include/stdint.h b/src/arch/arm/include/stdint.h
index 9d41e6359..9d41e6359 100644
--- a/src/arch/armv7/include/stdint.h
+++ b/src/arch/arm/include/stdint.h
diff --git a/src/arch/armv7/include/utils.h b/src/arch/arm/include/utils.h
index 828b86cb3..828b86cb3 100644
--- a/src/arch/armv7/include/utils.h
+++ b/src/arch/arm/include/utils.h
diff --git a/src/arch/armv7/memcpy.S b/src/arch/arm/memcpy.S
index 921fc2a6b..921fc2a6b 100644
--- a/src/arch/armv7/memcpy.S
+++ b/src/arch/arm/memcpy.S
diff --git a/src/arch/armv7/memmove.S b/src/arch/arm/memmove.S
index a2f9ea18a..a2f9ea18a 100644
--- a/src/arch/armv7/memmove.S
+++ b/src/arch/arm/memmove.S
diff --git a/src/arch/armv7/memset.S b/src/arch/arm/memset.S
index a3cc9477f..a3cc9477f 100644
--- a/src/arch/armv7/memset.S
+++ b/src/arch/arm/memset.S
diff --git a/src/arch/armv7/ramstage.ld b/src/arch/arm/ramstage.ld
index 91efe2c4d..cab512e99 100644
--- a/src/arch/armv7/ramstage.ld
+++ b/src/arch/arm/ramstage.ld
@@ -38,7 +38,7 @@ SECTIONS
.text : {
_text = .;
_start = .;
- *(.text.stage_entry.armv7);
+ *(.text.stage_entry.arm);
*(.text);
*(.text.*);
. = ALIGN(16);
diff --git a/src/arch/armv7/romstage.ld b/src/arch/arm/romstage.ld
index a9c3f8bf0..65b133ad2 100644
--- a/src/arch/armv7/romstage.ld
+++ b/src/arch/arm/romstage.ld
@@ -41,7 +41,7 @@ SECTIONS
.romtext . : {
_rom = .;
_start = .;
- *(.text.stage_entry.armv7);
+ *(.text.stage_entry.arm);
*(.text.startup);
*(.text);
} : to_load
diff --git a/src/arch/armv7/stages.c b/src/arch/arm/stages.c
index 38d1b1928..38d1b1928 100644
--- a/src/arch/armv7/stages.c
+++ b/src/arch/arm/stages.c
diff --git a/src/arch/armv7/tables.c b/src/arch/arm/tables.c
index 20c5a9f7a..20c5a9f7a 100644
--- a/src/arch/armv7/tables.c
+++ b/src/arch/arm/tables.c
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 054177f48..c7c3ea5dc 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -2,7 +2,7 @@ menu "Console"
config BOOTBLOCK_CONSOLE
bool "Enable early (bootblock) console output."
- depends on ARCH_ARMV7
+ depends on ARCH_ARM
default n
help
Use console during the bootblock if supported
diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc
index c5c1e645c..032b1f41c 100644
--- a/src/cpu/ti/am335x/Makefile.inc
+++ b/src/cpu/ti/am335x/Makefile.inc
@@ -16,7 +16,7 @@ ramstage-y += uart.c
endif
$(call add-class,omap-header)
-$(eval $(call create_class_compiler,omap-header,armv7))
+$(eval $(call create_class_compiler,omap-header,arm))
real-target: $(obj)/MLO
diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h
index 017aab938..63f1d8e50 100644
--- a/src/device/oprom/yabel/device.h
+++ b/src/device/oprom/yabel/device.h
@@ -128,7 +128,7 @@ u8 biosemu_dev_translate_address(int type, unsigned long * addr);
static inline void
out32le(void *addr, u32 val)
{
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7
+#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
*((u32*) addr) = cpu_to_le32(val);
#else
asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr));
@@ -139,7 +139,7 @@ static inline u32
in32le(void *addr)
{
u32 val;
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7
+#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
val = cpu_to_le32(*((u32 *) addr));
#else
asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr));
@@ -150,7 +150,7 @@ in32le(void *addr)
static inline void
out16le(void *addr, u16 val)
{
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7
+#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
*((u16*) addr) = cpu_to_le16(val);
#else
asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr));
@@ -161,7 +161,7 @@ static inline u16
in16le(void *addr)
{
u16 val;
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7
+#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
val = cpu_to_le16(*((u16*) addr));
#else
asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr));
diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig
index a97943702..fef745e41 100644
--- a/src/drivers/uart/Kconfig
+++ b/src/drivers/uart/Kconfig
@@ -5,7 +5,7 @@ config DRIVERS_UART
config DRIVERS_UART_8250IO
bool "Serial port on SuperIO"
- depends on !ARCH_ARMV7
+ depends on !ARCH_ARM
default n if NO_UART_ON_SUPERIO
default y if ARCH_X86
diff --git a/src/include/cbfs_core.h b/src/include/cbfs_core.h
index a1d8127de..e74d618d9 100644
--- a/src/include/cbfs_core.h
+++ b/src/include/cbfs_core.h
@@ -107,7 +107,7 @@ struct cbfs_header {
*/
#define CBFS_ARCHITECTURE_UNKNOWN 0xFFFFFFFF
#define CBFS_ARCHITECTURE_X86 0x00000001
-#define CBFS_ARCHITECTURE_ARMV7 0x00000010
+#define CBFS_ARCHITECTURE_ARM 0x00000010
/** This is a component header - every entry in the CBFS
will have this header.
diff --git a/src/soc/nvidia/tegra124/bootblock_asm.S b/src/soc/nvidia/tegra124/bootblock_asm.S
index 8d0beb871..5f7de13ee 100644
--- a/src/soc/nvidia/tegra124/bootblock_asm.S
+++ b/src/soc/nvidia/tegra124/bootblock_asm.S
@@ -1,5 +1,5 @@
/*
- * Early initialization code for ARMv7 architecture.
+ * Early initialization code for ARM architecture.
*
* This file is based off of the OMAP3530/ARM Cortex start.S file from Das
* U-Boot, which itself got the file from armboot.
diff --git a/src/vendorcode/google/chromeos/fmap.c b/src/vendorcode/google/chromeos/fmap.c
index e0ec30b24..bc56a1906 100644
--- a/src/vendorcode/google/chromeos/fmap.c
+++ b/src/vendorcode/google/chromeos/fmap.c
@@ -41,7 +41,7 @@ const struct fmap *fmap_find(void)
/* wrapping around 0x100000000 */
const struct fmap *fmap = (void *)
(CONFIG_FLASHMAP_OFFSET - CONFIG_ROM_SIZE);
-#elif CONFIG_ARCH_ARMV7
+#elif CONFIG_ARCH_ARM
struct cbfs_media default_media, *media;
media = &default_media;
init_default_cbfs_media(media);