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authorPeter Stuge <peter@stuge.se>2011-05-16 00:05:50 +0000
committerPeter Stuge <peter@stuge.se>2011-05-16 00:05:50 +0000
commit3f0075b3d2acfb93f06f76d3b5e11e4ea6987efe (patch)
tree6017f7c02a1cc1cd1c35885b7b094bbd1f239674 /src/southbridge/amd/cimx_wrapper/sb800/late.c
parent44d3c3dade57b3564bcf6bcafc490756d9f45d44 (diff)
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cimx_wrapper/sb800: Fix indent in late.c:sb800_enable()
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cimx_wrapper/sb800/late.c')
-rw-r--r--src/southbridge/amd/cimx_wrapper/sb800/late.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/late.c b/src/southbridge/amd/cimx_wrapper/sb800/late.c
index c72b2bec8..e375b23dd 100644
--- a/src/southbridge/amd/cimx_wrapper/sb800/late.c
+++ b/src/southbridge/amd/cimx_wrapper/sb800/late.c
@@ -413,16 +413,16 @@ static void sb800_enable(device_t dev)
break;
case (0x15 << 3) | 0: /* 0:15:0 PCIe PortA */
- sb_config->PORTCONFIG[0].PortCfg.PortPresent = dev->enabled;
- return;
+ sb_config->PORTCONFIG[0].PortCfg.PortPresent = dev->enabled;
+ return;
case (0x15 << 3) | 1: /* 0:15:1 PCIe PortB */
- sb_config->PORTCONFIG[1].PortCfg.PortPresent = dev->enabled;
- return;
+ sb_config->PORTCONFIG[1].PortCfg.PortPresent = dev->enabled;
+ return;
case (0x15 << 3) | 2: /* 0:15:2 PCIe PortC */
- sb_config->PORTCONFIG[2].PortCfg.PortPresent = dev->enabled;
- return;
+ sb_config->PORTCONFIG[2].PortCfg.PortPresent = dev->enabled;
+ return;
case (0x15 << 3) | 3: /* 0:15:3 PCIe PortD */
- sb_config->PORTCONFIG[3].PortCfg.PortPresent = dev->enabled;
+ sb_config->PORTCONFIG[3].PortCfg.PortPresent = dev->enabled;
/*
* GPP_CFGMODE_X4000: PortA Lanes[3:0]