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authorVladimir Serbinenko <phcoder@gmail.com>2014-08-31 02:12:19 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-08-31 12:13:45 +0200
commit7e8e313739138910b6d6da3e056a099a4ac72157 (patch)
treef38999c0a65f5b448e29f5495771175df43753ae /src/mainboard/iwave/iWRainbowG6/acpi/globalnvs.asl
parent6abb33c7ba5f18ec3e3578cb1f804cbe60e49c49 (diff)
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iWRainbowG6: Kill unused file
Change-Id: I7b9b91519d87d70405b57920b3f1ab98c50526d1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6810 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/iwave/iWRainbowG6/acpi/globalnvs.asl')
-rw-r--r--src/mainboard/iwave/iWRainbowG6/acpi/globalnvs.asl42
1 files changed, 0 insertions, 42 deletions
diff --git a/src/mainboard/iwave/iWRainbowG6/acpi/globalnvs.asl b/src/mainboard/iwave/iWRainbowG6/acpi/globalnvs.asl
deleted file mode 100644
index 70c2dac0d..000000000
--- a/src/mainboard/iwave/iWRainbowG6/acpi/globalnvs.asl
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/* Global Variables */
-
-Name(\PICM,0) // IOAPIC/8259
-
-/* Global ACPI memory region. This region is used for passing information
- * between coreboot (aka "the system bios"), ACPI, and the SMI handler.
- * Since we don't know where this will end up in memory at ACPI compile time,
- * we have to fix it up in coreboot's ACPI creation phase.
- */
-
-
-OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0xFF)
-Field (GNVS, ByteAcc, NoLock, Preserve)
-{
- Offset (0x00),
- OSYS, 16, // 0x00 Operating System
- SMIF, 8, // 0x02 SMI function
- Offset (0x10),
- MPEN, 8, // 0x10 Multi Processor Enable
-
-}