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authorLee Leahy <leroy.p.leahy@intel.com>2015-03-31 17:30:01 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-22 08:55:29 +0200
commite1ba3dac415b87dc9e3f038ced0a1a720a4d8004 (patch)
tree3bce13ff82aff60451a9fd1db4003741cd3d5f40 /src/include
parent3486736a992f2444677568653e80abb535fb038a (diff)
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device: Add class and subclass name support
Add support to display class and subclass names for PCI devices. BRANCH=none BUG=None TEST=Build and run on strago/cyan. Change-Id: I5136fae45b8a1cd02541f233d29a246cdfcd8331 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a7c9b0d7201b09a06ea32f0db84187d15f767c80 Original-Change-Id: Ibf2ee89dd84040ca6ab0e52857a69f7ed0c28f37 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/263342 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/9901 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 4e712f9f7..141d2e8cb 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -87,6 +87,8 @@ const char * pin_to_str(int pin);
int get_pci_irq_pins(device_t dev, device_t *parent_bdg);
void pci_assign_irqs(unsigned bus, unsigned slot,
const unsigned char pIntAtoD[4]);
+const char *get_pci_class_name(device_t dev);
+const char *get_pci_subclass_name(device_t dev);
#define PCI_IO_BRIDGE_ALIGN 4096
#define PCI_MEM_BRIDGE_ALIGN (1024*1024)