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authorStephen Barber <smbarber@chromium.org>2015-03-11 15:53:10 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-22 08:47:25 +0200
commitb396a66031b38c6f7b021ad71f8371fd33b9ce50 (patch)
treedbe9e601a267ced005dca8beb621a94d0f33cda5 /src/include
parentda262a6388dec9a943052823203a44e4e5b69e5f (diff)
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vpd: populate coreboot table with serialno
BRANCH=none BUG=chrome-os-partner:37813 TEST=devicetree is populated with with "compatible", "hardware", and "serialno" properties Change-Id: Ibe84aa05702d2a33456c6c33d15a4c7d4a6d45d7 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 61408d969f5d6e1e40f919b3defd5f1622391c9e Original-Change-Id: I02f360f4e5385042f56eb2b2f29072e393a24fc9 Original-Signed-off-by: Stephen Barber <smbarber@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/259141 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9882 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/boot/coreboot_tables.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index 7b5da64ec..35ebd6eb3 100644
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -296,6 +296,9 @@ struct lb_spi_flash {
uint32_t erase_cmd;
};
+#define LB_TAG_SERIALNO 0x002a
+#define MAX_SERIALNO_LENGTH 32
+
/* The following structures are for the cmos definitions table */
#define LB_TAG_CMOS_OPTION_TABLE 200
/* cmos header record */
@@ -392,6 +395,8 @@ void lb_board(struct lb_header *header);
*/
void lb_table_add_macs_from_vpd(struct lb_header *header);
+void lb_table_add_serialno_from_vpd(struct lb_header *header);
+
struct lb_record *lb_new_record(struct lb_header *header);
#endif /* COREBOOT_TABLES_H */