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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-28 15:15:12 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2014-04-09 11:30:53 +0200
commitd53d96dddd1e8733b53519becda73288381d2396 (patch)
tree728d636464f903beb70b43fef270ff132dc9847d /src/drivers/uart/oxpcie.c
parent4c686f2106a33e7a452bec163c178724a0313616 (diff)
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OxPCIe uart: Move under drivers/uart
This driver is only a thin shell for uart8250mem and we could extend it with further compatible PCI IDs from other vendors/brands. Change-Id: Ic115b1baa0be0dbaa81e4a17a2e466019d3f4a67 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5329 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/drivers/uart/oxpcie.c')
-rw-r--r--src/drivers/uart/oxpcie.c73
1 files changed, 73 insertions, 0 deletions
diff --git a/src/drivers/uart/oxpcie.c b/src/drivers/uart/oxpcie.c
new file mode 100644
index 000000000..76119d270
--- /dev/null
+++ b/src/drivers/uart/oxpcie.c
@@ -0,0 +1,73 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <device/device.h>
+#include <device/pci_def.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <console/console.h>
+#include <console/uart.h>
+#include <arch/io.h>
+
+static void oxford_oxpcie_enable(device_t dev)
+{
+ printk(BIOS_DEBUG, "Initializing Oxford OXPCIe952\n");
+
+ struct resource *res = find_resource(dev, 0x10);
+ if (!res) {
+ printk(BIOS_WARNING, "OXPCIe952: No UART resource found.\n");
+ return;
+ }
+
+ printk(BIOS_DEBUG, "OXPCIe952: Class=%x Revision ID=%x\n",
+ (read32(res->base) >> 8), (read32(res->base) & 0xff));
+ printk(BIOS_DEBUG, "OXPCIe952: %d UARTs detected.\n",
+ (read32(res->base + 4) & 3));
+ printk(BIOS_DEBUG, "OXPCIe952: UART BAR: 0x%x\n", (u32)res->base);
+}
+
+
+static void oxford_oxpcie_set_resources(struct device *dev)
+{
+ pci_dev_set_resources(dev);
+
+ /* Re-initialize OXPCIe base address after set_resources */
+ u32 mmio_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
+ oxford_remap(mmio_base & ~0xf);
+}
+
+static struct device_operations oxford_oxpcie_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = oxford_oxpcie_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = oxford_oxpcie_enable,
+ .scan_bus = 0,
+};
+
+static const struct pci_driver oxford_oxpcie_driver __pci_driver = {
+ .ops = &oxford_oxpcie_ops,
+ .vendor = 0x1415,
+ .device = 0xc158,
+};
+
+static const struct pci_driver oxford_oxpcie_driver_2 __pci_driver = {
+ .ops = &oxford_oxpcie_ops,
+ .vendor = 0x1415,
+ .device = 0xc11b,
+};