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authorStefan Reinauer <reinauer@chromium.org>2013-05-06 18:05:39 -0700
committerRonald G. Minnich <rminnich@gmail.com>2013-05-08 18:24:23 +0200
commit648d16679c5cf4f91c9f8b48ee77c6a9ada87523 (patch)
treef2985f2e7e1cdf4a51897ccb30d6b4f2da6272f0 /src/arch
parent2a3c10677f354f660a759d47a3b26b1d8818e76c (diff)
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copy_and_run: drop boot_complete parameter
Since this parameter is not used anymore, drop it from all calls to copy_and_run() Change-Id: Ifba25aff4b448c1511e26313fe35007335aa7f7a Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/3213 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/include/arch/stages.h3
-rw-r--r--src/arch/x86/init/crt0_romcc_epilogue.inc5
-rw-r--r--src/arch/x86/lib/c_start.S1
-rw-r--r--src/arch/x86/lib/cbfs_and_run.c13
-rw-r--r--src/arch/x86/lib/stages.c2
5 files changed, 5 insertions, 19 deletions
diff --git a/src/arch/x86/include/arch/stages.h b/src/arch/x86/include/arch/stages.h
index 0d00144cb..3dea4278f 100644
--- a/src/arch/x86/include/arch/stages.h
+++ b/src/arch/x86/include/arch/stages.h
@@ -22,6 +22,5 @@
#include <arch/cpu.h>
-void asmlinkage copy_and_run(unsigned cpu_reset);
-void asmlinkage copy_and_run_ap_code_in_car(unsigned ret_addr);
+void asmlinkage copy_and_run(void);
#endif
diff --git a/src/arch/x86/init/crt0_romcc_epilogue.inc b/src/arch/x86/init/crt0_romcc_epilogue.inc
index b19f9687e..419418d64 100644
--- a/src/arch/x86/init/crt0_romcc_epilogue.inc
+++ b/src/arch/x86/init/crt0_romcc_epilogue.inc
@@ -7,17 +7,12 @@
*/
#include <cpu/x86/post_code.h>
- /* clear boot_complete flag */
- xorl %ebp, %ebp
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* clear direction flag */
- movl %ebp, %esi
-
movl $ROMSTAGE_STACK, %esp
movl %esp, %ebp
- pushl %esi
call copy_and_run
.Lhlt:
diff --git a/src/arch/x86/lib/c_start.S b/src/arch/x86/lib/c_start.S
index 99a4d92d4..1e38acaf0 100644
--- a/src/arch/x86/lib/c_start.S
+++ b/src/arch/x86/lib/c_start.S
@@ -77,7 +77,6 @@ _start:
#if CONFIG_GDB_WAIT
call gdb_stub_breakpoint
#endif
- /* The boot_complete flag has already been pushed */
call hardwaremain
/* NOTREACHED */
.Lhlt:
diff --git a/src/arch/x86/lib/cbfs_and_run.c b/src/arch/x86/lib/cbfs_and_run.c
index a02314165..a13b04ef2 100644
--- a/src/arch/x86/lib/cbfs_and_run.c
+++ b/src/arch/x86/lib/cbfs_and_run.c
@@ -22,7 +22,7 @@
#include <arch/stages.h>
#include <timestamp.h>
-static void cbfs_and_run_core(const char *filename, unsigned ebp)
+static void cbfs_and_run_core(const char *filename)
{
u8 *dst;
@@ -35,19 +35,14 @@ static void cbfs_and_run_core(const char *filename, unsigned ebp)
timestamp_add_now(TS_END_COPYRAM);
print_debug("Jumping to image.\n");
__asm__ volatile (
- "movl %%eax, %%ebp\n"
"jmp *%%edi\n"
- :: "a"(ebp), "D"(dst)
+ :: "D"(dst)
);
}
-void asmlinkage copy_and_run(unsigned cpu_reset)
+void asmlinkage copy_and_run(void)
{
- // FIXME fix input parameters instead normalizing them here.
- if (cpu_reset == 1) cpu_reset = -1;
- else cpu_reset = 0;
-
- cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram", cpu_reset);
+ cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram");
}
#if CONFIG_AP_CODE_IN_CAR
diff --git a/src/arch/x86/lib/stages.c b/src/arch/x86/lib/stages.c
index a6a232a04..2da66d368 100644
--- a/src/arch/x86/lib/stages.c
+++ b/src/arch/x86/lib/stages.c
@@ -20,8 +20,6 @@
static void skip_romstage(void)
{
asm volatile (
- "/* set the boot_complete flag */\n"
- "movl $0xffffffff, %%ebp\n"
"jmp __main\n"
);
}