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authorAndrew Bresticker <abrestic@chromium.org>2015-02-05 13:40:49 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-21 08:12:13 +0200
commitb8936ad8504b3bf455d17bda7f99dc72c1b02189 (patch)
tree1ad58dae4a3461b8c1f9a05a772528131af6ba96 /src/arch/mips
parent3537e956e1ee2d189876fb47a09b65e96ed3c8f4 (diff)
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urara: Identity map DRAM/SRAM
Using identity_map(), map the DRAM/SRAM regions to themselves (which happens to be using KUSEG on urara). The bootblock (which still runs in KSEG0) sets up the identity mapping in bootblock_mmu_init() so that ROM/RAM stages can be loaded into the KUSEG address range. The stack and pre-RAM CBMEM console also remain in KSEG0 since we don't really care about their physical addresses. Also splitting CBFS cache to pre and post RAM, to allow for larger rambase images. BUG=chrome-os-partner:36258 BRANCH=none TEST=With the rest of coreboot and depthcharge patches applied: - booted urara into the kernel login prompt - from depthcharge CLI tried accessing memory below 0x100000 - observed the exception. Change-Id: If78f1c5c54d3587fe83e25c79698b2e9e41d3309 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 9668b440b35805e8ce442be62f67053cedcb205e Original-Change-Id: I187d02fa2ace08b9fb7a333c928e92c54465abc2 Original-Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/246694 Reviewed-on: http://review.coreboot.org/9816 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/mips')
-rw-r--r--src/arch/mips/bootblock_simple.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/mips/bootblock_simple.c b/src/arch/mips/bootblock_simple.c
index 747a8bfff..64bbae23a 100644
--- a/src/arch/mips/bootblock_simple.c
+++ b/src/arch/mips/bootblock_simple.c
@@ -32,5 +32,7 @@ void main(void)
console_init();
#endif
+ bootblock_mmu_init();
+
run_romstage();
}