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authorAaron Durbin <adurbin@chromium.org>2014-11-06 15:17:33 -0600
committerPatrick Georgi <pgeorgi@google.com>2015-04-10 12:01:24 +0200
commit6cdacb37f0e84666831d78f4bf9af2cbc30cbb81 (patch)
tree00b24a90e82dabeabe6f02efacb513ca2da425de /src/arch/arm64/include/arch
parent1f4db4046f911b2ed586509de5d8e109b46a9485 (diff)
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arm64: secmon: add entry point for turned on CPUs
Newly turned on CPUs need a place to go bring its EL3 state inline with expectations. Plumb this path in for CPUs turning on as well as waking up from a power down state. Some of the infrastructure declarations were moved around for easier consumption in ramstage and secmon. Lastly, a psci_soc_init() is added to inform the SoC of the CPU's entry point as well do any initialization. BUG=chrome-os-partner:32112 BRANCH=None TEST=Built and booted. On entry point not actually utilized. Change-Id: I2af424c2906df159f78ed5e0a26a6bc0ba2ba24f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: dbefec678a111e8b42acf2ae162c1ccdd7f9fd40 Original-Change-Id: I7b8c8c828ffb73752ca3ac1117cd895a5aa275d8 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/228296 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9422 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/arm64/include/arch')
-rw-r--r--src/arch/arm64/include/arch/psci.h5
-rw-r--r--src/arch/arm64/include/arch/stages.h13
2 files changed, 4 insertions, 14 deletions
diff --git a/src/arch/arm64/include/arch/psci.h b/src/arch/arm64/include/arch/psci.h
index 32a32b134..555333a44 100644
--- a/src/arch/arm64/include/arch/psci.h
+++ b/src/arch/arm64/include/arch/psci.h
@@ -187,10 +187,13 @@ static inline void psci64_return(struct psci_func *pf, int64_t val)
psci64_result(pf, 0, val);
}
-void psci_init(void);
+void psci_init(uintptr_t cpu_on_entry);
+void psci_soc_init(uintptr_t cpu_on_entry);
/* Turn on the current CPU within the PSCI subsystem. */
void psci_turn_on_self(const struct cpu_action *action);
int psci_turn_off_self(void);
+/* Entry point for CPUs just turning on or waking up. */
+void psci_cpu_entry(void);
#endif /* __ARCH_PSCI_H__ */
diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h
index fd633e484..c3f4e6e25 100644
--- a/src/arch/arm64/include/arch/stages.h
+++ b/src/arch/arm64/include/arch/stages.h
@@ -33,17 +33,4 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size);
* be available to be used (such as console). */
void arm64_soc_init(void);
-/*
- * Stages and rmodules have 2 entry points: BSP and non-BSP. Provided
- * a pointer the correct non-BSP entry point will be returned. The
- * first instruction is for BSP and the 2nd is for non-BSP. Instructions
- * are all 32-bit on arm64.
- */
-static inline void *secondary_entry_point(void *e)
-{
- uintptr_t nonbsp = (uintptr_t)e;
-
- return (void *)(nonbsp + sizeof(uint32_t));
-}
-
#endif