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authorAndrew Bresticker <abrestic@chromium.org>2015-02-05 13:48:35 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-21 08:12:29 +0200
commit9f5ad9b6d9243546ce83a2ec4feb9f0d2c3c7f8f (patch)
tree52dc6fe93355208a4fb594f12568b510dd50555e /payloads
parent2e709464b9cc6a7f246b2cb921ac8d6fd552d90d (diff)
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libpayload: mips: Use KSEG1 to access DMA-coherent memory
Use bus_to_virt() to convert the physical address of the DMA coherent region to an address in KSEG1 which is suitable for device memory accesses. BUG=chrome-os-partner:36258 BRANCH=none TEST=Build and boot on Pistachio. Change-Id: If382feda66f6d829f8b3548ab263cf603cab2e9b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a88a175f6d6db81d3154fb5dd31a44363ab94653 Original-Change-Id: I9ad6435495df2c71d8f81a782f1c3dfcfd4aeb28 Original-Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/246696 Original-Reviewed-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/9818 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'payloads')
-rw-r--r--payloads/libpayload/arch/mips/coreboot.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/payloads/libpayload/arch/mips/coreboot.c b/payloads/libpayload/arch/mips/coreboot.c
index 66ad90735..9b5f8c420 100644
--- a/payloads/libpayload/arch/mips/coreboot.c
+++ b/payloads/libpayload/arch/mips/coreboot.c
@@ -27,7 +27,7 @@ void *cb_header_ptr;
static void cb_parse_dma(void *ptr)
{
struct lb_range *dma = (struct lb_range *)ptr;
- init_dma_memory(phys_to_virt(dma->range_start), dma->range_size);
+ init_dma_memory(bus_to_virt(dma->range_start), dma->range_size);
}
/* Architecture specific */