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authorWANG Siyuan <wangsiyuanbuaa@gmail.com>2015-04-22 15:22:00 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-27 07:03:32 +0200
commitde8c78083454a30628d8d67c970535790adcff01 (patch)
treef77408bfc556e4b51ed04a0de8247ad6dfcaf2cd /Makefile.inc
parent8ee07779d9441d2b6d534010dc59251a58ee7727 (diff)
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Build system: Fix "dd: invalid number `0x800000'"
dd doesn't recognise hex number. the commit introducing this: f21b657 build system: improve portability by not relying on extraordinary dd options Change-Id: Ie0df3eb00fa2ba5d7bbb8218e24b864cbdd07c3a Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/9944 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'Makefile.inc')
-rw-r--r--Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/Makefile.inc b/Makefile.inc
index 04e808597..b67f14514 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -560,7 +560,7 @@ $(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(c
@printf " CBFS $(subst $(obj)/,,$(@))\n"
# The full ROM may be larger than the CBFS part, so create an empty
# file (filled with \377 = 0xff) and copy the CBFS image over it.
- dd if=/dev/zero bs=$(CONFIG_ROM_SIZE) count=1 | tr '\000' '\377' > $@.tmp
+ dd if=/dev/zero bs=$(call _toint,$(CONFIG_ROM_SIZE)) count=1 2> /dev/null | tr '\000' '\377' > $@.tmp
dd if=$(obj)/coreboot.pre of=$@.tmp bs=8192 conv=notrunc 2> /dev/null
$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG)
ifeq ($(CONFIG_PAYLOAD_NONE),y)