aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--Makefile6
-rw-r--r--NEWS16
-rw-r--r--com32/LICENCE4
-rw-r--r--com32/MCONFIG13
-rw-r--r--com32/Makefile3
-rw-r--r--com32/cmenu/CHANGES (renamed from menu/CHANGES)0
-rw-r--r--com32/cmenu/HISTORY (renamed from menu/HISTORY)0
-rw-r--r--com32/cmenu/MANUAL (renamed from menu/MANUAL)0
-rw-r--r--com32/cmenu/MENU_FORMAT (renamed from menu/MENU_FORMAT)0
-rw-r--r--com32/cmenu/Makefile (renamed from menu/Makefile)12
-rw-r--r--com32/cmenu/README (renamed from menu/README)0
-rw-r--r--com32/cmenu/TODO (renamed from menu/TODO)0
-rw-r--r--com32/cmenu/adv_menu.tpl (renamed from menu/adv_menu.tpl)0
-rw-r--r--com32/cmenu/complex.c (renamed from menu/complex.c)0
-rw-r--r--com32/cmenu/display.c (renamed from menu/display.c)0
-rw-r--r--com32/cmenu/libmenu/com32io.c (renamed from menu/libmenu/com32io.c)0
-rw-r--r--com32/cmenu/libmenu/com32io.h (renamed from menu/libmenu/com32io.h)0
-rw-r--r--com32/cmenu/libmenu/des.c (renamed from menu/libmenu/des.c)0
-rw-r--r--com32/cmenu/libmenu/des.h (renamed from menu/libmenu/des.h)0
-rw-r--r--com32/cmenu/libmenu/help.c (renamed from menu/libmenu/help.c)0
-rw-r--r--com32/cmenu/libmenu/help.h (renamed from menu/libmenu/help.h)0
-rw-r--r--com32/cmenu/libmenu/menu.c (renamed from menu/libmenu/menu.c)0
-rw-r--r--com32/cmenu/libmenu/menu.h (renamed from menu/libmenu/menu.h)12
-rw-r--r--com32/cmenu/libmenu/passwords.c (renamed from menu/libmenu/passwords.c)0
-rw-r--r--com32/cmenu/libmenu/passwords.h (renamed from menu/libmenu/passwords.h)0
-rw-r--r--com32/cmenu/libmenu/scancodes.h (renamed from menu/libmenu/scancodes.h)0
-rw-r--r--com32/cmenu/libmenu/syslnx.c (renamed from menu/libmenu/syslnx.c)0
-rw-r--r--com32/cmenu/libmenu/syslnx.h (renamed from menu/libmenu/syslnx.h)0
-rw-r--r--com32/cmenu/libmenu/tui.c (renamed from menu/libmenu/tui.c)0
-rw-r--r--com32/cmenu/libmenu/tui.h (renamed from menu/libmenu/tui.h)0
-rw-r--r--com32/cmenu/menugen.py (renamed from menu/menugen.py)0
-rw-r--r--com32/cmenu/password (renamed from menu/password)0
-rw-r--r--com32/cmenu/simple.c (renamed from menu/simple.c)0
-rw-r--r--com32/cmenu/test.menu (renamed from menu/test.menu)0
-rw-r--r--com32/cmenu/test2.menu (renamed from menu/test2.menu)0
-rw-r--r--com32/gplinclude/README1
-rw-r--r--com32/gplinclude/cpuid.h (renamed from com32/include/cpuid.h)32
-rw-r--r--com32/gplinclude/dmi/dmi.h (renamed from com32/include/dmi/dmi.h)62
-rw-r--r--com32/gplinclude/dmi/dmi_base_board.h (renamed from com32/include/dmi/dmi_base_board.h)10
-rw-r--r--com32/gplinclude/dmi/dmi_battery.h57
-rw-r--r--com32/gplinclude/dmi/dmi_bios.h (renamed from com32/include/dmi/dmi_bios.h)57
-rw-r--r--com32/gplinclude/dmi/dmi_chassis.h50
-rw-r--r--com32/gplinclude/dmi/dmi_memory.h61
-rw-r--r--com32/gplinclude/dmi/dmi_processor.h111
-rw-r--r--com32/gplinclude/dmi/dmi_system.h (renamed from com32/include/dmi/dmi_system.h)2
-rw-r--r--com32/gpllib/Makefile45
-rw-r--r--com32/gpllib/cpuid.c (renamed from com32/modules/cpuid.c)65
-rw-r--r--com32/gpllib/dmi/dmi.c (renamed from com32/modules/dmi.c)328
-rw-r--r--com32/gpllib/dmi/dmi_base_board.c38
-rw-r--r--com32/gpllib/dmi/dmi_battery.c73
-rw-r--r--com32/gpllib/dmi/dmi_bios.c80
-rw-r--r--com32/gpllib/dmi/dmi_chassis.c (renamed from com32/include/dmi/dmi_chassis.h)68
-rw-r--r--com32/gpllib/dmi/dmi_memory.c172
-rw-r--r--com32/gpllib/dmi/dmi_processor.c433
-rw-r--r--com32/hdt/Makefile79
-rw-r--r--com32/hdt/hdt-ata.c275
-rw-r--r--com32/hdt/hdt-ata.h122
-rw-r--r--com32/hdt/hdt-cli-cpu.c195
-rw-r--r--com32/hdt/hdt-cli-dmi.c451
-rw-r--r--com32/hdt/hdt-cli-kernel.c170
-rw-r--r--com32/hdt/hdt-cli-pci.c308
-rw-r--r--com32/hdt/hdt-cli-pxe.c100
-rw-r--r--com32/hdt/hdt-cli-syslinux.c71
-rw-r--r--com32/hdt/hdt-cli-vesa.c91
-rw-r--r--com32/hdt/hdt-cli.c336
-rw-r--r--com32/hdt/hdt-cli.h113
-rw-r--r--com32/hdt/hdt-common.c393
-rw-r--r--com32/hdt/hdt-common.h135
-rw-r--r--com32/hdt/hdt-menu-about.c63
-rw-r--r--com32/hdt/hdt-menu-disk.c177
-rw-r--r--com32/hdt/hdt-menu-dmi.c481
-rw-r--r--com32/hdt/hdt-menu-kernel.c91
-rw-r--r--com32/hdt/hdt-menu-pci.c178
-rw-r--r--com32/hdt/hdt-menu-processor.c240
-rw-r--r--com32/hdt/hdt-menu-pxe.c120
-rw-r--r--com32/hdt/hdt-menu-summary.c209
-rw-r--r--com32/hdt/hdt-menu-syslinux.c85
-rw-r--r--com32/hdt/hdt-menu-vesa.c106
-rw-r--r--com32/hdt/hdt-menu.c299
-rw-r--r--com32/hdt/hdt-menu.h128
-rw-r--r--com32/hdt/hdt.c81
-rw-r--r--com32/hdt/hdt.h42
-rw-r--r--com32/include/dmi/dmi_processor.h482
-rw-r--r--com32/include/string.h1
-rw-r--r--com32/include/sys/pci.h35
-rw-r--r--com32/include/syslinux/pxe.h33
-rw-r--r--com32/lib/MCONFIG1
-rw-r--r--com32/lib/Makefile14
-rw-r--r--com32/lib/pci/scan.c255
-rw-r--r--com32/lib/strpcpy.c20
-rw-r--r--com32/lib/sys/vesa/vesa.h2
-rw-r--r--com32/lib/syslinux/load_linux.c8
-rw-r--r--com32/lib/syslinux/pxe_get_nic.c61
-rw-r--r--com32/lib/syslinux/shuffle.c47
-rw-r--r--com32/modules/Makefile10
-rw-r--r--com32/modules/cmd.c23
-rw-r--r--com32/modules/dmi_utils.c4
-rw-r--r--com32/modules/dmitest.c57
-rw-r--r--com32/modules/pcitest.c76
-rw-r--r--core/Makefile8
-rw-r--r--core/bootsect.inc13
-rw-r--r--core/isolinux.asm12
-rw-r--r--core/ldlinux.asm13
-rw-r--r--core/runkernel.inc8
-rw-r--r--gpxe/src/Makefile4
-rw-r--r--gpxe/src/Makefile.housekeeping4
-rw-r--r--gpxe/src/arch/i386/interface/pcbios/ibft.c56
-rw-r--r--gpxe/src/arch/i386/interface/pxe/pxe_call.c20
-rw-r--r--gpxe/src/arch/i386/interface/pxe/pxe_entry.S8
-rw-r--r--gpxe/src/arch/i386/prefix/pxeprefix.S147
-rw-r--r--gpxe/src/core/main.c16
-rw-r--r--gpxe/src/crypto/axtls/aes.c10
-rw-r--r--gpxe/src/crypto/axtls/crypto.h2
-rw-r--r--gpxe/src/crypto/axtls_aes.c153
-rw-r--r--gpxe/src/crypto/axtls_sha1.c7
-rw-r--r--gpxe/src/crypto/cbc.c99
-rw-r--r--gpxe/src/crypto/chap.c2
-rw-r--r--gpxe/src/crypto/cipher.c24
-rw-r--r--gpxe/src/crypto/crypto_null.c62
-rw-r--r--gpxe/src/crypto/hmac.c6
-rw-r--r--gpxe/src/crypto/md5.c7
-rw-r--r--gpxe/src/dl360.gpxe4
-rw-r--r--gpxe/src/drivers/block/scsi.c4
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/MT23108_PRM.h2800
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/MT23108_PRM_append.h199
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/MT25218_PRM.h3463
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/bit_ops.h126
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/cmdif.h50
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/cmdif_comm.c564
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/cmdif_comm.h60
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/cmdif_mt23108.c193
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/cmdif_mt25218.c457
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/cmdif_priv.h50
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/doc/README.boot_over_ib176
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/ib_driver.c342
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/ib_driver.h169
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/ib_mad.c396
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/ib_mad.h110
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/ib_mt23108.c1701
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/ib_mt25218.c1929
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/ipoib.c1027
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/ipoib.h297
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/mad_attrib.h244
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/mt23108.c242
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/mt23108.h543
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/mt23108_imp.c229
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/mt25218.c242
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/mt25218.h546
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/mt25218_imp.c229
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/mt_version.c23
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/patches/dhcpd.patch23
-rw-r--r--gpxe/src/drivers/net/mlx_ipoib/samples/dhcpd.conf56
-rw-r--r--gpxe/src/drivers/net/sundance.c16
-rw-r--r--gpxe/src/hci/commands/image_cmd.c20
-rw-r--r--gpxe/src/image/default.gpxe2
-rw-r--r--gpxe/src/image/embedded.c13
-rw-r--r--gpxe/src/include/gpxe/aes.h4
-rw-r--r--gpxe/src/include/gpxe/cbc.h98
-rw-r--r--gpxe/src/include/gpxe/chap.h6
-rw-r--r--gpxe/src/include/gpxe/crypto.h130
-rw-r--r--gpxe/src/include/gpxe/hmac.h6
-rw-r--r--gpxe/src/include/gpxe/image.h9
-rw-r--r--gpxe/src/include/gpxe/iscsi.h11
-rw-r--r--gpxe/src/include/gpxe/md5.h4
-rw-r--r--gpxe/src/include/gpxe/rsa.h4
-rw-r--r--gpxe/src/include/gpxe/sha1.h4
-rw-r--r--gpxe/src/include/gpxe/tls.h6
-rw-r--r--gpxe/src/net/tcp/iscsi.c23
-rw-r--r--gpxe/src/net/tls.c64
-rw-r--r--gpxe/src/netboot.gpxe4
-rw-r--r--mbr/isohdpfx.S1
-rw-r--r--memdisk/Makefile15
-rw-r--r--memdisk/memdisk.ld128
-rw-r--r--memdisk/setup.c262
-rw-r--r--memdisk/start32.S10
-rw-r--r--sample/Makefile5
-rw-r--r--sample/mdiskchk.c6
177 files changed, 8281 insertions, 17824 deletions
diff --git a/Makefile b/Makefile
index ffbc48f1..8718f7a0 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
## -----------------------------------------------------------------------
##
-## Copyright 1998-2008 H. Peter Anvin - All Rights Reserved
+## Copyright 1998-2009 H. Peter Anvin - All Rights Reserved
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -29,8 +29,8 @@ include $(topdir)/MCONFIG
#
# List of module objects that should be installed for all derivatives
-MODULES = memdisk/memdisk memdump/memdump.com \
- modules/*.com com32/menu/*.c32 com32/modules/*.c32
+MODULES = memdisk/memdisk memdump/memdump.com modules/*.com \
+ com32/menu/*.c32 com32/modules/*.c32 com32/hdt/*.c32
# syslinux.exe is BTARGET so as to not require everyone to have the
diff --git a/NEWS b/NEWS
index 33147d6a..a5aa8912 100644
--- a/NEWS
+++ b/NEWS
@@ -7,7 +7,21 @@ Changes in 3.74:
a menu system (or not.) With the UI directive specifying
the menu system, the DEFAULT directive can be used to select
the default entry inside the menus.
- * kbdmap.c32: new module to load a new keyboard map dynamically.
+ * kbdmap.c32: new module to load a new keyboard map
+ dynamically.
+ * isohybrid: workaround bug in some versions of binutils.
+ * Fix issue with the placement of the initrd on some machines.
+ * ifcpu64: fix handling of less than three argumetns.
+ * Fix bug in the shuffle library when dealing with a very
+ large number of fragments.
+ * Documentation fixes by Vicente Jimenez Aguilar.
+ * gPXE updated to version 0.9.7.
+ * hdt.c32: Hardware Detection Tool, an interactive hardware
+ analyzer module by Erwan Velu.
+ * MEMDISK: enable automatic determination of the disk geometry
+ for a large floppy disk image if (and only if) it is
+ formatted with a FAT filesystem.
+ * SYSLINUX: fix the handling of .bss files on FAT12/16.
Changes in 3.73:
* Upgrade gPXE to release version 0.9.5.
diff --git a/com32/LICENCE b/com32/LICENCE
index 4fd64b3c..8934e8fb 100644
--- a/com32/LICENCE
+++ b/com32/LICENCE
@@ -2,7 +2,7 @@ libcom32 and libutil are licensed under the MIT license:
## -----------------------------------------------------------------------
##
-## Copyright 2004-2008 H. Peter Anvin - All Rights Reserved
+## Copyright 2004-2009 H. Peter Anvin - All Rights Reserved
##
## Permission is hereby granted, free of charge, to any person
## obtaining a copy of this software and associated documentation
@@ -27,5 +27,5 @@ libcom32 and libutil are licensed under the MIT license:
##
## -----------------------------------------------------------------------
-The files in the samples and modules directories are mostly under the
+The files in the sample, modules and libgpl directories are mostly under the
GNU GPL (see the file COPYING in the directory above.)
diff --git a/com32/MCONFIG b/com32/MCONFIG
index 2b7e018b..d1af9455 100644
--- a/com32/MCONFIG
+++ b/com32/MCONFIG
@@ -23,10 +23,18 @@ GCCOPT := $(call gcc_ok,-std=gnu99,) \
com32 = $(topdir)/com32
+ifneq ($(NOGPL),1)
+GPLLIB = $(com32)/gpllib/libcom32gpl.a
+GPLINCLUDE = -I$(com32)/gplinclude
+else
+GPLLIB =
+GPLINCLUDE =
+endif
+
CFLAGS = $(GCCOPT) -W -Wall -march=i386 \
-fomit-frame-pointer -D__COM32__ \
-nostdinc -iwithprefix include \
- -I$(com32)/libutil/include -I$(com32)/include
+ -I$(com32)/libutil/include -I$(com32)/include $(GPLINCLUDE)
SFLAGS = $(GCCOPT) -D__COM32__ -march=i386
LDFLAGS = -m elf_i386 -T $(com32)/lib/com32.ld
LIBGCC := $(shell $(CC) $(GCCOPT) --print-libgcc)
@@ -35,7 +43,8 @@ LNXCFLAGS = -I$(com32)/libutil/include -W -Wall -O -g -D_GNU_SOURCE
LNXSFLAGS = -g
LNXLDFLAGS = -g
-C_LIBS = $(com32)/libutil/libutil_com.a $(com32)/lib/libcom32.a $(LIBGCC)
+C_LIBS = $(com32)/libutil/libutil_com.a $(GPLLIB) \
+ $(com32)/lib/libcom32.a $(LIBGCC)
C_LNXLIBS = $(com32)/libutil/libutil_lnx.a
.SUFFIXES: .lss .c .lo .o .elf .c32 .lnx
diff --git a/com32/Makefile b/com32/Makefile
index 9dee9684..64049d07 100644
--- a/com32/Makefile
+++ b/com32/Makefile
@@ -1,4 +1,3 @@
-SUBDIRS = lib libutil modules menu samples rosh
-
+SUBDIRS = lib gpllib libutil modules menu samples rosh cmenu hdt
all tidy dist clean spotless install:
set -e; for d in $(SUBDIRS); do $(MAKE) -C $$d $@; done
diff --git a/menu/CHANGES b/com32/cmenu/CHANGES
index cce21838..cce21838 100644
--- a/menu/CHANGES
+++ b/com32/cmenu/CHANGES
diff --git a/menu/HISTORY b/com32/cmenu/HISTORY
index 8e9beb3f..8e9beb3f 100644
--- a/menu/HISTORY
+++ b/com32/cmenu/HISTORY
diff --git a/menu/MANUAL b/com32/cmenu/MANUAL
index 4e70149c..4e70149c 100644
--- a/menu/MANUAL
+++ b/com32/cmenu/MANUAL
diff --git a/menu/MENU_FORMAT b/com32/cmenu/MENU_FORMAT
index 24cb02f8..24cb02f8 100644
--- a/menu/MENU_FORMAT
+++ b/com32/cmenu/MENU_FORMAT
diff --git a/menu/Makefile b/com32/cmenu/Makefile
index 151e2822..010fa122 100644
--- a/menu/Makefile
+++ b/com32/cmenu/Makefile
@@ -1,6 +1,6 @@
## -----------------------------------------------------------------------
##
-## Copyright 2001-2008 H. Peter Anvin - All Rights Reserved
+## Copyright 2001-2009 H. Peter Anvin - All Rights Reserved
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -11,14 +11,16 @@
## -----------------------------------------------------------------------
##
-## samples for syslinux users
+## Makefile for the complex menu system
##
+NOGPL := 1
+
# This must be defined before MCONFIG is included
LIBS = libmenu/libmenu.a
-topdir = ..
-include $(topdir)/com32/MCONFIG
+topdir = ../..
+include ../MCONFIG
CFLAGS += -I./libmenu
@@ -64,7 +66,7 @@ tidy dist:
libclean:
rm -f libmenu/*.o libmenu/*.a
-clean: tidy menuclean
+clean: tidy menuclean libclean
rm -f *.lss *.c32 *.com
menuclean:
diff --git a/menu/README b/com32/cmenu/README
index d585d2fa..d585d2fa 100644
--- a/menu/README
+++ b/com32/cmenu/README
diff --git a/menu/TODO b/com32/cmenu/TODO
index d2ee82c4..d2ee82c4 100644
--- a/menu/TODO
+++ b/com32/cmenu/TODO
diff --git a/menu/adv_menu.tpl b/com32/cmenu/adv_menu.tpl
index 6ce4acf8..6ce4acf8 100644
--- a/menu/adv_menu.tpl
+++ b/com32/cmenu/adv_menu.tpl
diff --git a/menu/complex.c b/com32/cmenu/complex.c
index 94627c4f..94627c4f 100644
--- a/menu/complex.c
+++ b/com32/cmenu/complex.c
diff --git a/menu/display.c b/com32/cmenu/display.c
index 5391d7fd..5391d7fd 100644
--- a/menu/display.c
+++ b/com32/cmenu/display.c
diff --git a/menu/libmenu/com32io.c b/com32/cmenu/libmenu/com32io.c
index 31aec5df..31aec5df 100644
--- a/menu/libmenu/com32io.c
+++ b/com32/cmenu/libmenu/com32io.c
diff --git a/menu/libmenu/com32io.h b/com32/cmenu/libmenu/com32io.h
index 78ce72fa..78ce72fa 100644
--- a/menu/libmenu/com32io.h
+++ b/com32/cmenu/libmenu/com32io.h
diff --git a/menu/libmenu/des.c b/com32/cmenu/libmenu/des.c
index 47ff78c4..47ff78c4 100644
--- a/menu/libmenu/des.c
+++ b/com32/cmenu/libmenu/des.c
diff --git a/menu/libmenu/des.h b/com32/cmenu/libmenu/des.h
index 67fc6b70..67fc6b70 100644
--- a/menu/libmenu/des.h
+++ b/com32/cmenu/libmenu/des.h
diff --git a/menu/libmenu/help.c b/com32/cmenu/libmenu/help.c
index 31944c79..31944c79 100644
--- a/menu/libmenu/help.c
+++ b/com32/cmenu/libmenu/help.c
diff --git a/menu/libmenu/help.h b/com32/cmenu/libmenu/help.h
index 06832d84..06832d84 100644
--- a/menu/libmenu/help.h
+++ b/com32/cmenu/libmenu/help.h
diff --git a/menu/libmenu/menu.c b/com32/cmenu/libmenu/menu.c
index 56a7426c..56a7426c 100644
--- a/menu/libmenu/menu.c
+++ b/com32/cmenu/libmenu/menu.c
diff --git a/menu/libmenu/menu.h b/com32/cmenu/libmenu/menu.h
index 446b3adb..d8db6c25 100644
--- a/menu/libmenu/menu.h
+++ b/com32/cmenu/libmenu/menu.h
@@ -77,16 +77,16 @@
#define SCROLLBOX 176 // Filled char to display
// Attributes of the menu system
-#define MAXMENUS 10 // Maximum number of menu's allowed
-#define MAXMENUSIZE 30 // Default value for max num of entries in each menu
-#define MAXMENUHEIGHT 14 // Maximum number of entries displayed
+#define MAXMENUS 100 // Maximum number of menu's allowed
+#define MAXMENUSIZE 60 // Default value for max num of entries in each menu
+#define MAXMENUHEIGHT 20 // Maximum number of entries displayed
#define MENUBOXTYPE BOX_SINSIN // Default box type Look at tui.h for other values
// Upper bounds on lengths
// We copy the given string, so user can reuse the space used to store incoming arguments.
-#define MENULEN 40 // Each menu entry is atmost MENULEN chars
-#define STATLEN 80 // Maximum length of status string
-#define TITLELEN 80 // Maximum length of title string
+#define MENULEN 78 // Each menu entry is atmost MENULEN chars
+#define STATLEN 78 // Maximum length of status string
+#define TITLELEN 78 // Maximum length of title string
#define ACTIONLEN 255 // Maximum length of an action string
// Layout of menu
diff --git a/menu/libmenu/passwords.c b/com32/cmenu/libmenu/passwords.c
index 40b5c49f..40b5c49f 100644
--- a/menu/libmenu/passwords.c
+++ b/com32/cmenu/libmenu/passwords.c
diff --git a/menu/libmenu/passwords.h b/com32/cmenu/libmenu/passwords.h
index 00e5702d..00e5702d 100644
--- a/menu/libmenu/passwords.h
+++ b/com32/cmenu/libmenu/passwords.h
diff --git a/menu/libmenu/scancodes.h b/com32/cmenu/libmenu/scancodes.h
index d3f625a6..d3f625a6 100644
--- a/menu/libmenu/scancodes.h
+++ b/com32/cmenu/libmenu/scancodes.h
diff --git a/menu/libmenu/syslnx.c b/com32/cmenu/libmenu/syslnx.c
index d2b0aef4..d2b0aef4 100644
--- a/menu/libmenu/syslnx.c
+++ b/com32/cmenu/libmenu/syslnx.c
diff --git a/menu/libmenu/syslnx.h b/com32/cmenu/libmenu/syslnx.h
index 755b9690..755b9690 100644
--- a/menu/libmenu/syslnx.h
+++ b/com32/cmenu/libmenu/syslnx.h
diff --git a/menu/libmenu/tui.c b/com32/cmenu/libmenu/tui.c
index cb8c1936..cb8c1936 100644
--- a/menu/libmenu/tui.c
+++ b/com32/cmenu/libmenu/tui.c
diff --git a/menu/libmenu/tui.h b/com32/cmenu/libmenu/tui.h
index 92f93863..92f93863 100644
--- a/menu/libmenu/tui.h
+++ b/com32/cmenu/libmenu/tui.h
diff --git a/menu/menugen.py b/com32/cmenu/menugen.py
index 70ec1f87..70ec1f87 100644
--- a/menu/menugen.py
+++ b/com32/cmenu/menugen.py
diff --git a/menu/password b/com32/cmenu/password
index 3caffe22..3caffe22 100644
--- a/menu/password
+++ b/com32/cmenu/password
diff --git a/menu/simple.c b/com32/cmenu/simple.c
index 92e8ab12..92e8ab12 100644
--- a/menu/simple.c
+++ b/com32/cmenu/simple.c
diff --git a/menu/test.menu b/com32/cmenu/test.menu
index 061c548e..061c548e 100644
--- a/menu/test.menu
+++ b/com32/cmenu/test.menu
diff --git a/menu/test2.menu b/com32/cmenu/test2.menu
index 4570dc2c..4570dc2c 100644
--- a/menu/test2.menu
+++ b/com32/cmenu/test2.menu
diff --git a/com32/gplinclude/README b/com32/gplinclude/README
new file mode 100644
index 00000000..ac1bf6a8
--- /dev/null
+++ b/com32/gplinclude/README
@@ -0,0 +1 @@
+Put header files for LGPL or GPL library functions in this directory.
diff --git a/com32/include/cpuid.h b/com32/gplinclude/cpuid.h
index 050cfedb..2473b41e 100644
--- a/com32/include/cpuid.h
+++ b/com32/gplinclude/cpuid.h
@@ -1,27 +1,15 @@
/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2006-2009 Erwan Velu - All Rights Reserved
*
- * Copyright 2006 Erwan Velu - All Rights Reserved
+ * Portions of this file taken from the Linux kernel,
+ * Copyright 1991-2009 Linus Torvalds and contributors
*
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall
- * be included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston MA 02110-1301;
+ * incorporated herein by reference.
*
* ----------------------------------------------------------------------- */
@@ -168,6 +156,8 @@ struct cpuinfo_x86 {
unsigned char x86_max_cores; /* cpuid returned max cores value */
unsigned char booted_cores; /* number of cores as seen by OS */
unsigned char apicid;
+ unsigned char x86_clflush_size;
+
} __attribute__((__packed__));
#endif
diff --git a/com32/include/dmi/dmi.h b/com32/gplinclude/dmi/dmi.h
index ceed3b4d..924ed420 100644
--- a/com32/include/dmi/dmi.h
+++ b/com32/gplinclude/dmi/dmi.h
@@ -12,49 +12,53 @@
#ifndef DMI_H
#define DMI_H
+#include <inttypes.h>
+#define MAX_DMI_MEMORY_ITEMS 32
-#define u32 unsigned int
-#define u16 unsigned short
-#define u8 unsigned char
#define PAGE_SIZE 4096
-typedef struct {
- u32 l;
- u32 h;
-} u64;
+/*typedef struct {
+ uint32_t l;
+ uint32_t h;
+} uint64_t;*/
+
+extern const char *out_of_spec;
+extern const char *bad_index;
-static const char *out_of_spec = "<OUT OF SPEC>";
-static const char *bad_index = "<BAD INDEX>";
+#define WORD(x) (uint16_t)(*(const uint16_t *)(x))
+#define DWORD(x) (uint32_t)(*(const uint32_t *)(x))
+#define QWORD(x) (*(const uint64_t *)(x))
-#define WORD(x) (u16)(*(const u16 *)(x))
-#define DWORD(x) (u32)(*(const u32 *)(x))
-#define QWORD(x) (*(const u64 *)(x))
+enum {DMI_TABLE_PRESENT = 100, ENODMITABLE};
#include "dmi_bios.h"
#include "dmi_system.h"
#include "dmi_base_board.h"
#include "dmi_chassis.h"
#include "dmi_processor.h"
+#include "dmi_memory.h"
+#include "dmi_battery.h"
extern char display_line;
#define moreprintf(...) do { display_line++; if (display_line == 24) { char tempbuf[10]; display_line=0; printf("Press enter to continue"); fgets(tempbuf, sizeof tempbuf, stdin);} printf ( __VA_ARGS__); } while (0);
typedef struct {
-u16 num;
-u16 len;
-u16 ver;
-u32 base;
+uint16_t num;
+uint16_t len;
+uint16_t ver;
+uint32_t base;
+uint16_t major_version;
+uint16_t minor_version;
} dmi_table;
-static dmi_table dmitable;
struct dmi_header
{
- u8 type;
- u8 length;
- u16 handle;
- u8 *data;
+ uint8_t type;
+ uint8_t length;
+ uint16_t handle;
+ uint8_t *data;
};
typedef struct {
@@ -63,15 +67,19 @@ typedef struct {
s_base_board base_board;
s_chassis chassis;
s_processor processor;
+ s_battery battery;
+ s_memory memory[MAX_DMI_MEMORY_ITEMS];
+ int memory_count;
+ dmi_table dmitable;
} s_dmi;
-void to_dmi_header(struct dmi_header *h, u8 *data);
-void dmi_bios_runtime_size(u32 code, s_dmi *dmi);
-const char *dmi_string(struct dmi_header *dm, u8 s);
-inline int dmi_checksum(u8 *buf);
+void to_dmi_header(struct dmi_header *h, uint8_t *data);
+void dmi_bios_runtime_size(uint32_t code, s_dmi *dmi);
+const char *dmi_string(struct dmi_header *dm, uint8_t s);
+int dmi_checksum(uint8_t *buf);
void parse_dmitable(s_dmi *dmi);
-void dmi_decode(struct dmi_header *h, u16 ver, s_dmi *dmi);
-int dmi_interate();
+void dmi_decode(struct dmi_header *h, uint16_t ver, s_dmi *dmi);
+int dmi_iterate(s_dmi *dmi);
/* dmi_utils.c */
void display_bios_characteristics(s_dmi *dmi);
diff --git a/com32/include/dmi/dmi_base_board.h b/com32/gplinclude/dmi/dmi_base_board.h
index d6634c01..5b92b848 100644
--- a/com32/include/dmi/dmi_base_board.h
+++ b/com32/gplinclude/dmi/dmi_base_board.h
@@ -25,13 +25,7 @@
#define BASE_BOARD_NB_ELEMENTS 5
-static const char *base_board_features_strings[]={
- "Board is a hosting board", /* 0 */
- "Board requires at least one daughter board",
- "Board is removable",
- "Board is replaceable",
- "Board is hot swappable" /* 4 */
-};
+extern const char *base_board_features_strings[];
/* this struct have BASE_BOARD_NB_ELEMENTS */
/* each bool is associated to the relevant message above */
@@ -52,6 +46,8 @@ char asset_tag[BASE_BOARD_ASSET_TAG_SIZE];
char location[BASE_BOARD_LOCATION_SIZE];
char type[BASE_BOARD_TYPE_SIZE];
s_base_board_features features;
+/* The filled field have to be set to true when the dmitable implement that item */
+bool filled;
} s_base_board;
#endif
diff --git a/com32/gplinclude/dmi/dmi_battery.h b/com32/gplinclude/dmi/dmi_battery.h
new file mode 100644
index 00000000..72c19693
--- /dev/null
+++ b/com32/gplinclude/dmi/dmi_battery.h
@@ -0,0 +1,57 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
+ * Boston MA 02111-1307, USA; either version 2 of the License, or
+ * (at your option) any later version; incorporated herein by reference.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef DMI_BATTERY_H
+#define DMI_BATTERY_H
+
+#include <stdbool.h>
+#include <inttypes.h>
+
+#define BATTERY_LOCATION_SIZE 255
+#define BATTERY_MANUFACTURER_SIZE 255
+#define BATTERY_MANUFACTURE_DATE_SIZE 255
+#define BATTERY_SERIAL_SIZE 255
+#define BATTERY_DEVICE_NAME_SIZE 255
+#define BATTERY_CHEMISTRY_SIZE 32
+#define BATTERY_CAPACITY_SIZE 16
+#define BATTERY_DESIGN_VOLTAGE_SIZE 16
+#define BATTERY_SBDS_SIZE 255
+#define BATTERY_MAXIMUM_ERROR_SIZE 32
+#define BATTERY_SBDS_SERIAL_SIZE 32
+#define BATTERY_SBDS_MANUFACTURE_DATE_SIZE 255
+#define BATTERY_SBDS_CHEMISTRY_SIZE 16
+#define BATTERY_OEM_INFO_SIZE 255
+
+typedef struct {
+char location[BATTERY_LOCATION_SIZE];
+char manufacturer[BATTERY_MANUFACTURER_SIZE];
+char manufacture_date[BATTERY_MANUFACTURE_DATE_SIZE];
+char serial[BATTERY_SERIAL_SIZE];
+char name[BATTERY_DEVICE_NAME_SIZE];
+char chemistry[BATTERY_CHEMISTRY_SIZE];
+char design_capacity[BATTERY_CAPACITY_SIZE];
+char design_voltage[BATTERY_DESIGN_VOLTAGE_SIZE];
+char sbds[BATTERY_SBDS_SIZE];
+char sbds_serial[BATTERY_SBDS_SERIAL_SIZE];
+char maximum_error[BATTERY_MAXIMUM_ERROR_SIZE];
+char sbds_manufacture_date[BATTERY_SBDS_MANUFACTURE_DATE_SIZE];
+char sbds_chemistry[BATTERY_SBDS_CHEMISTRY_SIZE];
+char oem_info[BATTERY_OEM_INFO_SIZE];
+/* The filled field have to be set to true when the dmitable implement that item */
+bool filled;
+} s_battery;
+
+const char *dmi_battery_chemistry(uint8_t code);
+void dmi_battery_capacity(uint16_t code, uint8_t multiplier,char *capacity);
+void dmi_battery_voltage(uint16_t code, char *voltage);
+void dmi_battery_maximum_error(uint8_t code, char *error);
+#endif
diff --git a/com32/include/dmi/dmi_bios.h b/com32/gplinclude/dmi/dmi_bios.h
index 0241f0b2..546bbefc 100644
--- a/com32/include/dmi/dmi_bios.h
+++ b/com32/gplinclude/dmi/dmi_bios.h
@@ -26,37 +26,7 @@
#define BIOS_CHAR_X1_NB_ELEMENTS 8
#define BIOS_CHAR_X2_NB_ELEMENTS 3
-static const char *bios_charac_strings[]={
- "BIOS characteristics not supported", /* 3 */
- "ISA is supported",
- "MCA is supported",
- "EISA is supported",
- "PCI is supported",
- "PC Card (PCMCIA) is supported",
- "PNP is supported",
- "APM is supported",
- "BIOS is upgradeable",
- "BIOS shadowing is allowed",
- "VLB is supported",
- "ESCD support is available",
- "Boot from CD is supported",
- "Selectable boot is supported",
- "BIOS ROM is socketed",
- "Boot from PC Card (PCMCIA) is supported",
- "EDD is supported",
- "Japanese floppy for NEC 9800 1.2 MB is supported (int 13h)",
- "Japanese floppy for Toshiba 1.2 MB is supported (int 13h)",
- "5.25\"/360 KB floppy services are supported (int 13h)",
- "5.25\"/1.2 MB floppy services are supported (int 13h)",
- "3.5\"/720 KB floppy services are supported (int 13h)",
- "3.5\"/2.88 MB floppy services are supported (int 13h)",
- "Print screen service is supported (int 5h)",
- "8042 keyboard services are supported (int 9h)",
- "Serial services are supported (int 14h)",
- "Printer services are supported (int 17h)",
- "CGA/mono video services are supported (int 10h)",
- "NEC PC-98" /* 31 */
-};
+extern const char *bios_charac_strings[];
/* this struct has BIOS_CHAR_NB_ELEMENTS */
/* each bool is associated with the relevant message above */
@@ -91,16 +61,7 @@ bool cga_mono_support;
bool nec_pc_98;
} __attribute__((__packed__)) s_characteristics;
-static const char *bios_charac_x1_strings[]={
- "ACPI is supported", /* 0 */
- "USB legacy is supported",
- "AGP is supported",
- "I2O boot is supported",
- "LS-120 boot is supported",
- "ATAPI Zip drive boot is supported",
- "IEEE 1394 boot is supported",
- "Smart battery is supported" /* 7 */
-};
+extern const char *bios_charac_x1_strings[];
/* this struct has BIOS_CHAR_X1_NB_ELEMENTS */
/* each bool is associated with the relevant message above */
@@ -115,11 +76,7 @@ bool ieee_1394_boot;
bool smart_battery;
} __attribute__((__packed__)) s_characteristics_x1;
-static const char *bios_charac_x2_strings[]={
- "BIOS boot specification is supported", /* 0 */
- "Function key-initiated network boot is supported",
- "Targeted content distribution is supported" /* 2 */
-};
+extern const char *bios_charac_x2_strings[];
/* this struct has BIOS_CHAR_X2_NB_ELEMENTS */
/* each bool is associated with the relevant message above */
@@ -133,16 +90,18 @@ typedef struct {
char vendor[BIOS_VENDOR_SIZE];
char version[BIOS_VERSION_SIZE];
char release_date[BIOS_RELEASE_SIZE];
-u16 address;
-u16 runtime_size;
+uint16_t address;
+uint16_t runtime_size;
char runtime_size_unit[BIOS_RUNTIME_SIZE_UNIT_SIZE];
-u16 rom_size;
+uint16_t rom_size;
char rom_size_unit[BIOS_ROM_UNIT_SIZE];
s_characteristics characteristics;
s_characteristics_x1 characteristics_x1;
s_characteristics_x2 characteristics_x2;
char bios_revision [BIOS_BIOS_REVISION_SIZE];
char firmware_revision [BIOS_FIRMWARE_REVISION_SIZE];
+/* The filled field have to be set to true when the dmitable implement that item */
+bool filled;
} s_bios;
#endif
diff --git a/com32/gplinclude/dmi/dmi_chassis.h b/com32/gplinclude/dmi/dmi_chassis.h
new file mode 100644
index 00000000..96711ed4
--- /dev/null
+++ b/com32/gplinclude/dmi/dmi_chassis.h
@@ -0,0 +1,50 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2006 Erwan Velu - All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
+ * Boston MA 02111-1307, USA; either version 2 of the License, or
+ * (at your option) any later version; incorporated herein by reference.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef DMI_CHASSIS_H
+#define DMI_CHASSIS_H
+
+#define CHASSIS_MANUFACTURER_SIZE 32
+#define CHASSIS_TYPE_SIZE 16
+#define CHASSIS_LOCK_SIZE 16
+#define CHASSIS_VERSION_SIZE 16
+#define CHASSIS_SERIAL_SIZE 32
+#define CHASSIS_ASSET_TAG_SIZE 32
+#define CHASSIS_BOOT_UP_STATE_SIZE 32
+#define CHASSIS_POWER_SUPPLY_STATE_SIZE 32
+#define CHASSIS_THERMAL_STATE_SIZE 32
+#define CHASSIS_SECURITY_STATUS_SIZE 32
+#define CHASSIS_OEM_INFORMATION_SIZE 32
+
+typedef struct {
+char manufacturer[CHASSIS_MANUFACTURER_SIZE];
+char type[CHASSIS_TYPE_SIZE];
+char lock[CHASSIS_LOCK_SIZE];
+char version[CHASSIS_VERSION_SIZE];
+char serial[CHASSIS_SERIAL_SIZE];
+char asset_tag[CHASSIS_ASSET_TAG_SIZE];
+char boot_up_state[CHASSIS_BOOT_UP_STATE_SIZE];
+char power_supply_state[CHASSIS_POWER_SUPPLY_STATE_SIZE];
+char thermal_state[CHASSIS_THERMAL_STATE_SIZE];
+char security_status[CHASSIS_SECURITY_STATUS_SIZE];
+char oem_information[CHASSIS_OEM_INFORMATION_SIZE];
+uint16_t height;
+uint16_t nb_power_cords;
+/* The filled field have to be set to true when the dmitable implement that item */
+bool filled;
+} s_chassis;
+
+const char *dmi_chassis_type(uint8_t code);
+const char *dmi_chassis_lock(uint8_t code);
+const char *dmi_chassis_state(uint8_t code);
+const char *dmi_chassis_security_status(uint8_t code);
+#endif
diff --git a/com32/gplinclude/dmi/dmi_memory.h b/com32/gplinclude/dmi/dmi_memory.h
new file mode 100644
index 00000000..2b744b5c
--- /dev/null
+++ b/com32/gplinclude/dmi/dmi_memory.h
@@ -0,0 +1,61 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
+ * Boston MA 02111-1307, USA; either version 2 of the License, or
+ * (at your option) any later version; incorporated herein by reference.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef DMI_MEMORY_H
+#define DMI_MEMORY_H
+
+#define MEMORY_MANUFACTURER_SIZE 32
+#define MEMORY_ERROR_SIZE 16
+#define MEMORY_TOTAL_WIDTH_SIZE 16
+#define MEMORY_DATA_WIDTH_SIZE 16
+#define MEMORY_SIZE_SIZE 32
+#define MEMORY_FORM_FACTOR_SIZE 32
+#define MEMORY_DEVICE_SET_SIZE 32
+#define MEMORY_DEVICE_LOCATOR_SIZE 32
+#define MEMORY_BANK_LOCATOR_SIZE 32
+#define MEMORY_TYPE_SIZE 32
+#define MEMORY_TYPE_DETAIL_SIZE 16
+#define MEMORY_SPEED_SIZE 16
+#define MEMORY_SERIAL_SIZE 16
+#define MEMORY_ASSET_TAG_SIZE 16
+#define MEMORY_PART_NUMBER_SIZE 16
+
+typedef struct {
+char manufacturer[MEMORY_MANUFACTURER_SIZE];
+char error[MEMORY_ERROR_SIZE];
+char total_width[MEMORY_TOTAL_WIDTH_SIZE];
+char data_width[MEMORY_DATA_WIDTH_SIZE];
+char size[MEMORY_SIZE_SIZE];
+char form_factor[MEMORY_FORM_FACTOR_SIZE];
+char device_set[MEMORY_DEVICE_SET_SIZE];
+char device_locator[MEMORY_DEVICE_LOCATOR_SIZE];
+char bank_locator[MEMORY_BANK_LOCATOR_SIZE];
+char type[MEMORY_TYPE_SIZE];
+char type_detail[MEMORY_TYPE_DETAIL_SIZE];
+char speed[MEMORY_SPEED_SIZE];
+char serial[MEMORY_SERIAL_SIZE];
+char asset_tag[MEMORY_ASSET_TAG_SIZE];
+char part_number[MEMORY_PART_NUMBER_SIZE];
+/* The filled field have to be set to true when the dmitable implement that item */
+bool filled;
+} s_memory;
+
+void dmi_memory_array_error_handle(uint16_t code,char *array);
+void dmi_memory_device_width(uint16_t code, char *width);
+void dmi_memory_device_size(uint16_t code, char *size);
+const char *dmi_memory_device_form_factor(uint8_t code);
+void dmi_memory_device_set(uint8_t code, char *set);
+const char *dmi_memory_device_type(uint8_t code);
+void dmi_memory_device_type_detail(uint16_t code,char *type_detail);
+void dmi_memory_device_speed(uint16_t code, char *speed);
+
+#endif
diff --git a/com32/gplinclude/dmi/dmi_processor.h b/com32/gplinclude/dmi/dmi_processor.h
new file mode 100644
index 00000000..79ee43d4
--- /dev/null
+++ b/com32/gplinclude/dmi/dmi_processor.h
@@ -0,0 +1,111 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2006 Erwan Velu - All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
+ * Boston MA 02111-1307, USA; either version 2 of the License, or
+ * (at your option) any later version; incorporated herein by reference.
+ *
+ * ----------------------------------------------------------------------- */
+
+#ifndef DMI_PROCESSOR_H
+#define DMI_PROCESSOR_H
+
+#include "stdbool.h"
+#include "string.h"
+#define PROCESSOR_SOCKET_DESIGNATION_SIZE 32
+#define PROCESSOR_TYPE_SIZE 32
+#define PROCESSOR_FAMILY_SIZE 32
+#define PROCESSOR_MANUFACTURER_SIZE 64
+#define PROCESSOR_VERSION_SIZE 32
+#define PROCESSOR_VOLTAGE_SIZE 16
+#define PROCESSOR_STATUS_SIZE 16
+#define PROCESSOR_UPGRADE_SIZE 16
+#define PROCESSOR_CACHE_SIZE 16
+#define PROCESSOR_SERIAL_SIZE 32
+#define PROCESSOR_ASSET_TAG_SIZE 32
+#define PROCESSOR_PART_NUMBER_SIZE 32
+#define PROCESSOR_ID_SIZE 32
+
+#define PROCESSOR_FLAGS_ELEMENTS 32
+/* Intel AP-485 revision 28, table 5 */
+extern const char *cpu_flags_strings[PROCESSOR_FLAGS_ELEMENTS];
+
+/* this struct have PROCESSOR_FLAGS_ELEMENTS */
+/* each bool is associated to the relevant message above */
+typedef struct {
+bool fpu;
+bool vme;
+bool de;
+bool pse;
+bool tsc;
+bool msr;
+bool pae;
+bool mce;
+bool cx8;
+bool apic;
+bool null_10;
+bool sep;
+bool mtrr;
+bool pge;
+bool mca;
+bool cmov;
+bool pat;
+bool pse_36;
+bool psn;
+bool clfsh;
+bool null_20;
+bool ds;
+bool acpi;
+bool mmx;
+bool fxsr;
+bool sse;
+bool sse2;
+bool ss;
+bool htt;
+bool tm;
+bool null_30;
+bool pbe;
+} __attribute__((__packed__)) s_dmi_cpu_flags;
+
+typedef struct {
+uint8_t type;
+uint8_t family;
+uint8_t model;
+uint8_t stepping;
+uint8_t minor_stepping;
+} __attribute__((__packed__)) s_signature;
+
+typedef struct {
+char socket_designation[PROCESSOR_SOCKET_DESIGNATION_SIZE];
+char type[PROCESSOR_TYPE_SIZE];
+char family[PROCESSOR_FAMILY_SIZE];
+char manufacturer[PROCESSOR_MANUFACTURER_SIZE];
+char version[PROCESSOR_VERSION_SIZE];
+float voltage;
+uint16_t external_clock;
+uint16_t max_speed;
+uint16_t current_speed;
+char status[PROCESSOR_STATUS_SIZE];
+char upgrade[PROCESSOR_UPGRADE_SIZE];
+char cache1[PROCESSOR_CACHE_SIZE];
+char cache2[PROCESSOR_CACHE_SIZE];
+char cache3[PROCESSOR_CACHE_SIZE];
+char serial[PROCESSOR_SERIAL_SIZE];
+char asset_tag[PROCESSOR_ASSET_TAG_SIZE];
+char part_number[PROCESSOR_PART_NUMBER_SIZE];
+char id[PROCESSOR_ID_SIZE];
+s_dmi_cpu_flags cpu_flags;
+s_signature signature;
+/* The filled field have to be set to true when the dmitable implement that item */
+bool filled;
+} s_processor;
+
+const char *dmi_processor_type(uint8_t code);
+const char *dmi_processor_family(uint8_t code, char *manufacturer);
+const char *dmi_processor_status(uint8_t code);
+const char *dmi_processor_upgrade(uint8_t code);
+void dmi_processor_cache(uint16_t code, const char *level, uint16_t ver, char *cache);
+#endif
diff --git a/com32/include/dmi/dmi_system.h b/com32/gplinclude/dmi/dmi_system.h
index 27293649..5a461d5f 100644
--- a/com32/include/dmi/dmi_system.h
+++ b/com32/gplinclude/dmi/dmi_system.h
@@ -31,6 +31,8 @@ char uuid[SYSTEM_UUID_SIZE];
char wakeup_type[SYSTEM_WAKEUP_TYPE_SIZE];
char sku_number[SYSTEM_SKU_NUMBER_SIZE];
char family[SYSTEM_FAMILY_SIZE];
+/* The filled field have to be set to true when the dmitable implement that item */
+bool filled;
} s_system;
#endif
diff --git a/com32/gpllib/Makefile b/com32/gpllib/Makefile
new file mode 100644
index 00000000..08164c2a
--- /dev/null
+++ b/com32/gpllib/Makefile
@@ -0,0 +1,45 @@
+#
+# LGPL/GPL code library
+#
+
+# Include configuration rules
+topdir = ../..
+include ../lib/MCONFIG
+
+REQFLAGS += -I../gplinclude
+
+LIBOBJS = dmi/dmi_battery.o dmi/dmi_chassis.o dmi/dmi_memory.o \
+ dmi/dmi_processor.o dmi/dmi.o dmi/dmi_bios.o dmi/dmi_base_board.o \
+ cpuid.o
+
+BINDIR = /usr/bin
+LIBDIR = /usr/lib
+DATADIR = /usr/share
+AUXDIR = $(DATADIR)/syslinux
+INCDIR = /usr/include
+COM32DIR = $(AUXDIR)/com32
+
+all: libcom32gpl.a
+
+libcom32gpl.a : $(LIBOBJS)
+ rm -f $@
+ $(AR) cq $@ $^
+ $(RANLIB) $@
+
+tidy dist clean:
+ find . \( -name \*.o -o -name \*.a -o -name .\*.d -o -name \*.tmp \) -print0 | \
+ xargs -0r rm -f
+
+spotless: clean
+ rm -f *.a
+ rm -f *~ \#* */*~ */\#*
+
+# Mixing in the GPL include files is suboptimal, but I'm not sure
+# there is a better way to do it.
+install: all
+ mkdir -m 755 -p $(INSTALLROOT)$(COM32DIR)
+ install -m 644 libcom32gpl.a $(INSTALLROOT)$(COM32DIR)
+ mkdir -p $(INSTALLROOT)$(COM32DIR)/include/
+ cp -r ../gplinclude $(INSTALLROOT)$(COM32DIR)/include/
+
+-include .*.d */.*.d */*/.*.d
diff --git a/com32/modules/cpuid.c b/com32/gpllib/cpuid.c
index 9418a21e..ed3224d4 100644
--- a/com32/modules/cpuid.c
+++ b/com32/gpllib/cpuid.c
@@ -1,29 +1,20 @@
-/* ----------------------------------------------------------------------- *
- *
- * Copyright 2006 Erwan Velu - All Rights Reserved
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall
- * be included in all copies or substantial portions of the Software.
+/*
+ * Portions of this file taken from the Linux kernel,
+ * Copyright 1991-2009 Linus Torvalds and contributors
*
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*
- * ----------------------------------------------------------------------- */
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+*/
#include <stdio.h>
#include <string.h>
@@ -144,7 +135,8 @@ int get_model_name(struct cpuinfo_x86 *c)
void generic_identify(struct cpuinfo_x86 *c)
{
- uint32_t tfms, xlvl, junk;
+ uint32_t tfms, xlvl;
+ unsigned int ebx;
/* Get vendor name */
cpuid(0x00000000,
@@ -157,18 +149,18 @@ void generic_identify(struct cpuinfo_x86 *c)
/* Intel-defined flags: level 0x00000001 */
if ( c->cpuid_level >= 0x00000001 ) {
uint32_t capability, excap;
- cpuid(0x00000001, &tfms, &junk, &excap, &capability);
+ cpuid(0x00000001, &tfms, &ebx, &excap, &capability);
c->x86_capability[0] = capability;
c->x86_capability[4] = excap;
c->x86 = (tfms >> 8) & 15;
c->x86_model = (tfms >> 4) & 15;
- if (c->x86 == 0xf) {
+ if (c->x86 == 0xf)
c->x86 += (tfms >> 20) & 0xff;
+ if (c->x86 >= 0x6)
c->x86_model += ((tfms >> 16) & 0xF) << 4;
- }
c->x86_mask = tfms & 15;
- if (capability & (1<<19))
- c->x86_cache_alignment = ((junk >> 8) & 0xff) * 8;
+ if (cpu_has(c, X86_FEATURE_CLFLSH))
+ c->x86_clflush_size = ((ebx >> 8) & 0xff) * 8;
} else {
/* Have CPUID level 0 only - unheard of */
c->x86 = 4;
@@ -310,21 +302,22 @@ void set_generic_info(struct cpuinfo_x86 *c,s_cpu *cpu) {
cpu->vendor_id=c->x86_vendor;
cpu->model_id=c->x86_model;
cpu->stepping=c->x86_mask;
- strncpy(cpu->vendor,cpu_devs[c->x86_vendor]->c_vendor,CPU_VENDOR_SIZE);
- strncpy(cpu->model,c->x86_model_id,CPU_MODEL_SIZE);
+ strncpy(cpu->vendor,cpu_devs[c->x86_vendor]->c_vendor,sizeof(cpu->vendor));
+ strncpy(cpu->model,c->x86_model_id,sizeof(cpu->model));
}
void detect_cpu(s_cpu *cpu)
{
struct cpuinfo_x86 c;
- c.x86_cache_alignment = 32;
+ c.x86_clflush_size = 32;
c.x86_cache_size = -1;
c.x86_vendor = X86_VENDOR_UNKNOWN;
c.cpuid_level = -1; /* CPUID not detected */
c.x86_model = c.x86_mask = 0; /* So far unknown... */
- c.x86_vendor_id[0] = '\0'; /* Unset */
- c.x86_model_id[0] = '\0'; /* Unset */
- memset(&c.x86_vendor_id,'\0',CPU_VENDOR_SIZE);
+ c.x86_max_cores = 1;
+ memset(&c.x86_capability, 0, sizeof(c.x86_capability));
+ memset(&c.x86_vendor_id,0,sizeof(c.x86_vendor_id));
+ memset(&c.x86_model_id,0,sizeof(c.x86_model_id));
if (!have_cpuid_p())
return;
diff --git a/com32/modules/dmi.c b/com32/gpllib/dmi/dmi.c
index 1e47c1a6..a2a08b56 100644
--- a/com32/modules/dmi.c
+++ b/com32/gpllib/dmi/dmi.c
@@ -30,17 +30,60 @@
#include <string.h>
#include "dmi/dmi.h"
+const char *out_of_spec = "<OUT OF SPEC>";
+const char *bad_index = "<BAD INDEX>";
+void dmi_bios_runtime_size(uint32_t code, s_dmi *dmi)
+{
+ if(code&0x000003FF) {
+ dmi->bios.runtime_size=code;
+ strcpy(dmi->bios.runtime_size_unit,"bytes");
+ } else {
+ dmi->bios.runtime_size=code >>10;
+ strcpy(dmi->bios.runtime_size_unit,"KB");
+
+ }
+}
-void to_dmi_header(struct dmi_header *h, u8 *data)
+void dmi_bios_characteristics(uint64_t code, s_dmi *dmi)
{
- h->type=data[0];
- h->length=data[1];
- h->handle=WORD(data+2);
- h->data=data;
+ int i;
+ /*
+ * This isn't very clear what this bit is supposed to mean
+ */
+ //if(code.l&(1<<3))
+ if(code&&(1<<3))
+ {
+ ((bool *)(& dmi->bios.characteristics))[0]=true;
+ return;
+ }
+
+ for(i=4; i<=31; i++)
+ //if(code.l&(1<<i))
+ if(code&(1<<i))
+ ((bool *)(& dmi->bios.characteristics))[i-3]=true;
+}
+
+void dmi_bios_characteristics_x1(uint8_t code, s_dmi *dmi)
+{
+ int i;
+
+ for(i=0; i<=7; i++)
+ if(code&(1<<i))
+ ((bool *)(& dmi->bios.characteristics_x1))[i]=true;
+}
+
+void dmi_bios_characteristics_x2(uint8_t code, s_dmi *dmi)
+{
+ int i;
+
+ for(i=0; i<=2; i++)
+ if(code&(1<<i))
+ ((bool *)(& dmi->bios.characteristics_x2))[i]=true;
}
-void dmi_system_uuid(u8 *p, s_dmi *dmi)
+
+void dmi_system_uuid(uint8_t *p, s_dmi *dmi)
{
int only0xFF=1, only0x00=1;
int i;
@@ -67,20 +110,42 @@ void dmi_system_uuid(u8 *p, s_dmi *dmi)
p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]);
}
-static void dmi_base_board_features(u8 code, s_dmi *dmi)
+void dmi_system_wake_up_type(uint8_t code, s_dmi *dmi)
+{
+ /* 3.3.2.1 */
+ static const char *type[]={
+ "Reserved", /* 0x00 */
+ "Other",
+ "Unknown",
+ "APM Timer",
+ "Modem Ring",
+ "LAN Remote",
+ "Power Switch",
+ "PCI PME#",
+ "AC Power Restored" /* 0x08 */
+ };
+
+ if(code<=0x08) {
+ strcpy(dmi->system.wakeup_type,type[code]);
+ } else {
+ strcpy(dmi->system.wakeup_type,out_of_spec);
+ }
+return;
+}
+
+static void dmi_base_board_features(uint8_t code, s_dmi *dmi)
{
if((code&0x1F)!=0)
{
int i;
- printf("\n");
for(i=0; i<=4; i++)
if(code&(1<<i))
- ((bool *)(& dmi->base_board.features))[i]=true;
+ ((bool *)(& dmi->base_board.features))[i]=true;
}
}
-static void dmi_processor_voltage(u8 code, s_dmi *dmi)
+static void dmi_processor_voltage(uint8_t code, s_dmi *dmi)
{
/* 3.3.5.4 */
static const float voltage[]={
@@ -100,14 +165,14 @@ static void dmi_processor_voltage(u8 code, s_dmi *dmi)
}
}
-static void dmi_processor_id(u8 type, u8 *p, const char *version, s_dmi *dmi)
+static void dmi_processor_id(uint8_t type, uint8_t *p, const char *version, s_dmi *dmi)
{
/*
* Extra flags are now returned in the ECX register when one calls
* the CPUID instruction. Their meaning is explained in table 6, but
* DMI doesn't support this yet.
*/
- u32 eax, edx;
+ uint32_t eax, edx;
int sig=0;
/*
@@ -119,7 +184,7 @@ static void dmi_processor_id(u8 type, u8 *p, const char *version, s_dmi *dmi)
if(type==0x05) /* 80386 */
{
- u16 dx=WORD(p);
+ uint16_t dx=WORD(p);
/*
* 80386 have a different signature.
*/
@@ -131,7 +196,7 @@ static void dmi_processor_id(u8 type, u8 *p, const char *version, s_dmi *dmi)
}
if(type==0x06) /* 80486 */
{
- u16 dx=WORD(p);
+ uint16_t dx=WORD(p);
/*
* Not all 80486 CPU support the CPUID instruction, we have to find
* wether the one we have here does or not. Note that this trick
@@ -207,77 +272,15 @@ static void dmi_processor_id(u8 type, u8 *p, const char *version, s_dmi *dmi)
}
-void dmi_system_wake_up_type(u8 code, s_dmi *dmi)
-{
- /* 3.3.2.1 */
- static const char *type[]={
- "Reserved", /* 0x00 */
- "Other",
- "Unknown",
- "APM Timer",
- "Modem Ring",
- "LAN Remote",
- "Power Switch",
- "PCI PME#",
- "AC Power Restored" /* 0x08 */
- };
-
- if(code<=0x08) {
- strcpy(dmi->system.wakeup_type,type[code]);
- } else {
- strcpy(dmi->system.wakeup_type,out_of_spec);
- }
-return;
-}
-
-void dmi_bios_runtime_size(u32 code, s_dmi *dmi)
-{
- if(code&0x000003FF) {
- dmi->bios.runtime_size=code;
- strcpy(dmi->bios.runtime_size_unit,"bytes");
- } else {
- dmi->bios.runtime_size=code >>10;
- strcpy(dmi->bios.runtime_size_unit,"KB");
-
- }
-}
-
-void dmi_bios_characteristics(u64 code, s_dmi *dmi)
-{
- int i;
- /*
- * This isn't very clear what this bit is supposed to mean
- */
- if(code.l&(1<<3))
- {
- ((bool *)(& dmi->bios.characteristics))[0]=true;
- return;
- }
-
- for(i=4; i<=31; i++)
- if(code.l&(1<<i))
- ((bool *)(& dmi->bios.characteristics))[i-3]=true;
-}
-
-void dmi_bios_characteristics_x1(u8 code, s_dmi *dmi)
-{
- int i;
-
- for(i=0; i<=7; i++)
- if(code&(1<<i))
- ((bool *)(& dmi->bios.characteristics_x1))[i]=true;
-}
-
-void dmi_bios_characteristics_x2(u8 code, s_dmi *dmi)
+void to_dmi_header(struct dmi_header *h, uint8_t *data)
{
- int i;
-
- for(i=0; i<=2; i++)
- if(code&(1<<i))
- ((bool *)(& dmi->bios.characteristics_x2))[i]=true;
+ h->type=data[0];
+ h->length=data[1];
+ h->handle=WORD(data+2);
+ h->data=data;
}
-const char *dmi_string(struct dmi_header *dm, u8 s)
+const char *dmi_string(struct dmi_header *dm, uint8_t s)
{
char *bp=(char *)dm->data;
size_t i, len;
@@ -305,9 +308,9 @@ const char *dmi_string(struct dmi_header *dm, u8 s)
return bp;
}
-inline int dmi_checksum(u8 *buf)
+int dmi_checksum(uint8_t *buf)
{
- u8 sum=0;
+ uint8_t sum=0;
int a;
for(a=0; a<15; a++)
@@ -315,41 +318,68 @@ inline int dmi_checksum(u8 *buf)
return (sum==0);
}
-int dmi_interate() {
- u8 buf[16];
+int dmi_iterate(s_dmi *dmi) {
+ uint8_t buf[16];
char *p,*q;
+
+ /* Cleaning structures */
+ memset(&dmi->base_board,0,sizeof (s_base_board));
+ memset(&dmi->battery,0,sizeof (s_battery));
+ memset(&dmi->bios,0,sizeof (s_bios));
+ memset(&dmi->chassis,0,sizeof (s_chassis));
+ for (int i=0;i<MAX_DMI_MEMORY_ITEMS;i++)
+ memset(&dmi->memory[i],0,sizeof (s_memory));
+ memset(&dmi->processor,0,sizeof (s_processor));
+ memset(&dmi->system,0,sizeof (s_system));
+
+ /* Until we found this elements in the dmitable, we consider them as not filled */
+ dmi->base_board.filled=false;
+ dmi->battery.filled=false;
+ dmi->bios.filled=false;
+ dmi->chassis.filled=false;
+ for (int i=0;i<MAX_DMI_MEMORY_ITEMS;i++)
+ dmi->memory[i].filled=false;
+ dmi->processor.filled=false;
+ dmi->system.filled=false;
+
p=(char *)0xF0000; /* The start address to look at the dmi table */
for (q = p; q < p + 0x10000; q += 16) {
memcpy(buf, q, 15);
if(memcmp(buf, "_DMI_", 5)==0 && dmi_checksum(buf)) {
- dmitable.num = buf[13]<<8|buf[12];
- dmitable.len = buf[7]<<8|buf[6];
- dmitable.base = buf[11]<<24|buf[10]<<16|buf[9]<<8|buf[8];
- dmitable.ver = (buf[0x06]<<8)+buf[0x07];
+ dmi->dmitable.num = buf[13]<<8|buf[12];
+ dmi->dmitable.len = buf[7]<<8|buf[6];
+ dmi->dmitable.base = buf[11]<<24|buf[10]<<16|buf[9]<<8|buf[8];
+ dmi->dmitable.ver = (buf[0x06]<<8)+buf[0x07];
/*
* DMI version 0.0 means that the real version is taken from
* the SMBIOS version, which we don't know at this point.
*/
- if(buf[14]!=0)
- printf("DMI %d.%d present.\n",buf[14]>>4, buf[14]&0x0F);
- else
- printf("DMI present.\n");
+ if(buf[14]!=0) {
+ dmi->dmitable.major_version=buf[14]>>4;
+ dmi->dmitable.minor_version=buf[14]&0x0F;
+ }
+ else {
+ dmi->dmitable.major_version=0;
+ dmi->dmitable.minor_version=0;
+
+ }
+/* printf("DMI present (version %d.%d)\n", dmitable.major_version,dmitable.minor_version);
printf("%d structures occupying %d bytes.\n",dmitable.num, dmitable.len);
- printf("DMI table at 0x%08X.\n",dmitable.base);
- return 1;
+ printf("DMI table at 0x%08X.\n",dmitable.base);*/
+ return DMI_TABLE_PRESENT;
}
}
- dmitable.base=0;
- dmitable.num=0;
- dmitable.ver=0;
- dmitable.len=0;
- return 0;
+ dmi->dmitable.base=0;
+ dmi->dmitable.num=0;
+ dmi->dmitable.ver=0;
+ dmi->dmitable.len=0;
+ return -ENODMITABLE;
}
-void dmi_decode(struct dmi_header *h, u16 ver, s_dmi *dmi)
+void dmi_decode(struct dmi_header *h, uint16_t ver, s_dmi *dmi)
{
- u8 *data=h->data;
+ uint8_t *data=h->data;
/*
* Note: DMI types 37, 38 and 39 are untested
@@ -359,6 +389,7 @@ void dmi_decode(struct dmi_header *h, u16 ver, s_dmi *dmi)
case 0: /* 3.3.1 BIOS Information */
// printf("BIOS Information\n");
if(h->length<0x12) break;
+ dmi->bios.filled=true;
strcpy(dmi->bios.vendor,dmi_string(h,data[0x04]));
strcpy(dmi->bios.version,dmi_string(h,data[0x05]));
strcpy(dmi->bios.release_date,dmi_string(h,data[0x08]));
@@ -383,6 +414,7 @@ void dmi_decode(struct dmi_header *h, u16 ver, s_dmi *dmi)
case 1: /* 3.3.2 System Information */
// printf("System Information\n");
if(h->length<0x08) break;
+ dmi->system.filled=true;
strcpy(dmi->system.manufacturer,dmi_string(h,data[0x04]));
strcpy(dmi->system.product_name,dmi_string(h,data[0x05]));
strcpy(dmi->system.version,dmi_string(h,data[0x06]));
@@ -398,6 +430,7 @@ void dmi_decode(struct dmi_header *h, u16 ver, s_dmi *dmi)
case 2: /* 3.3.3 Base Board Information */
// printf("Base Board Information\n");
if(h->length<0x08) break;
+ dmi->base_board.filled=true;
strcpy(dmi->base_board.manufacturer,dmi_string(h,data[0x04]));
strcpy(dmi->base_board.product_name,dmi_string(h,data[0x05]));
strcpy(dmi->base_board.version,dmi_string(h,data[0x06]));
@@ -407,11 +440,12 @@ void dmi_decode(struct dmi_header *h, u16 ver, s_dmi *dmi)
dmi_base_board_features(data[0x09], dmi);
strcpy(dmi->base_board.location,dmi_string(h,data[0x0A]));
strcpy(dmi->base_board.type,dmi_string(h,data[0x0D]));
- if(h->length<0x0F+data[0x0E]*sizeof(u16)) break;
+ if(h->length<0x0F+data[0x0E]*sizeof(uint16_t)) break;
break;
case 3: /* 3.3.4 Chassis Information */
// printf("Chassis Information\n");
if(h->length<0x09) break;
+ dmi->chassis.filled=true;
strcpy(dmi->chassis.manufacturer,dmi_string(h,data[0x04]));
strcpy(dmi->chassis.type,dmi_chassis_type(data[0x05]&0x7F));
strcpy(dmi->chassis.lock,dmi_chassis_lock(data[0x05]>>7));
@@ -433,10 +467,11 @@ void dmi_decode(struct dmi_header *h, u16 ver, s_dmi *dmi)
case 4: /* 3.3.5 Processor Information */
// printf("Processor Information\n");
if(h->length<0x1A) break;
+ dmi->processor.filled=true;
strcpy(dmi->processor.socket_designation,dmi_string(h, data[0x04]));
strcpy(dmi->processor.type,dmi_processor_type(data[0x05]));
- strcpy(dmi->processor.family,dmi_processor_family(data[0x06]));
strcpy(dmi->processor.manufacturer,dmi_string(h, data[0x07]));
+ strcpy(dmi->processor.family,dmi_processor_family(data[0x06],dmi->processor.manufacturer));
dmi_processor_id(data[0x06], data+8, dmi_string(h, data[0x10]), dmi);
strcpy(dmi->processor.version,dmi_string(h, data[0x10]));
dmi_processor_voltage(data[0x11],dmi);
@@ -457,18 +492,82 @@ void dmi_decode(struct dmi_header *h, u16 ver, s_dmi *dmi)
strcpy(dmi->processor.asset_tag,dmi_string(h, data[0x21]));
strcpy(dmi->processor.part_number,dmi_string(h, data[0x22]));
break;
+ case 17: /* 3.3.18 Memory Device */
+ if (h->length < 0x15) break;
+ dmi->memory_count++;
+ s_memory *mem = &dmi->memory[dmi->memory_count-1];
+ dmi->memory[dmi->memory_count-1].filled=true;
+ dmi_memory_array_error_handle(WORD(data + 0x06),mem->error);
+ dmi_memory_device_width(WORD(data + 0x08),mem->total_width);
+ dmi_memory_device_width(WORD(data + 0x0A),mem->data_width);
+ dmi_memory_device_size(WORD(data + 0x0C),mem->size);
+ strcpy(mem->form_factor,dmi_memory_device_form_factor(data[0x0E]));
+ dmi_memory_device_set(data[0x0F],mem->device_set);
+ strcpy(mem->device_locator,dmi_string(h, data[0x10]));
+ strcpy(mem->bank_locator,dmi_string(h, data[0x11]));
+ strcpy(mem->type,dmi_memory_device_type(data[0x12]));
+ dmi_memory_device_type_detail(WORD(data + 0x13),mem->type_detail);
+ if (h->length < 0x17) break;
+ dmi_memory_device_speed(WORD(data + 0x15),mem->speed);
+ if (h->length < 0x1B) break;
+ strcpy(mem->manufacturer, dmi_string(h, data[0x17]));
+ strcpy(mem->serial,dmi_string(h, data[0x18]));
+ strcpy(mem->asset_tag,dmi_string(h, data[0x19]));
+ strcpy(mem->part_number,dmi_string(h, data[0x1A]));
+ break;
+ case 22: /* 3.3.23 Portable Battery */
+ if (h->length < 0x10) break;
+ dmi->battery.filled=true;
+ strcpy(dmi->battery.location,dmi_string(h, data[0x04]));
+ strcpy(dmi->battery.manufacturer,dmi_string(h, data[0x05]));
+
+ if (data[0x06] || h->length < 0x1A)
+ strcpy(dmi->battery.manufacture_date, dmi_string(h, data[0x06]));
+
+ if (data[0x07] || h->length < 0x1A)
+ strcpy(dmi->battery.serial, dmi_string(h, data[0x07]));
+
+ strcpy(dmi->battery.name,dmi_string(h, data[0x08]));
+
+ if (data[0x09] != 0x02 || h->length < 0x1A)
+ strcpy(dmi->battery.chemistry,dmi_battery_chemistry(data[0x09]));
+
+ if (h->length < 0x1A)
+ dmi_battery_capacity(WORD(data + 0x0A), 1,dmi->battery.design_capacity);
+ else
+ dmi_battery_capacity(WORD(data + 0x0A), data[0x15],dmi->battery.design_capacity);
+ dmi_battery_voltage(WORD(data + 0x0C),dmi->battery.design_voltage);
+ strcpy(dmi->battery.sbds,dmi_string(h, data[0x0E]));
+ dmi_battery_maximum_error(data[0x0F],dmi->battery.maximum_error);
+ if (h->length < 0x1A) break;
+ if (data[0x07] == 0)
+ sprintf(dmi->battery.sbds_serial,"%04X", WORD(data + 0x10));
+
+ if (data[0x06] == 0)
+ sprintf(dmi->battery.sbds_manufacture_date,"%u-%02u-%02u",
+ 1980 + (WORD(data + 0x12) >> 9),
+ (WORD(data + 0x12) >> 5) & 0x0F,
+ WORD(data + 0x12) & 0x1F);
+ if (data[0x09] == 0x02)
+ strcpy(dmi->battery.sbds_chemistry, dmi_string(h, data[0x14]));
+
+ // sprintf(dmi->battery.oem_info,"0x%08X",DWORD(h, data+0x16));
+ break;
+
+
}
}
void parse_dmitable(s_dmi *dmi) {
int i=0;
- u8 *data = NULL;
- u8 buf[dmitable.len];
+ uint8_t *data = NULL;
+ uint8_t buf[dmi->dmitable.len];
- memcpy(buf,(int *)dmitable.base,sizeof(u8) * dmitable.len);
+ memcpy(buf,(int *)dmi->dmitable.base,sizeof(uint8_t) * dmi->dmitable.len);
data=buf;
- while(i<dmitable.num && data+4<=buf+dmitable.len) /* 4 is the length of an SMBIOS structure header */ {
- u8 *next;
+ dmi->memory_count=0;
+ while(i<dmi->dmitable.num && data+4<=buf+dmi->dmitable.len) /* 4 is the length of an SMBIOS structure header */ {
+ uint8_t *next;
struct dmi_header h;
to_dmi_header(&h, data);
@@ -488,16 +587,13 @@ void parse_dmitable(s_dmi *dmi) {
/* loo for the next handle */
next=data+h.length;
- while(next-buf+1<dmitable.len && (next[0]!=0 || next[1]!=0))
+ while(next-buf+1<dmi->dmitable.len && (next[0]!=0 || next[1]!=0))
next++;
next+=2;
- if(next-buf<=dmitable.len)
+ if(next-buf<=dmi->dmitable.len)
{
- dmi_decode(&h, dmitable.ver,dmi);
+ dmi_decode(&h, dmi->dmitable.ver,dmi);
}
- else
- printf("\t<TRUNCATED>\n");
- printf("\n");
data=next;
i++;
}
diff --git a/com32/gpllib/dmi/dmi_base_board.c b/com32/gpllib/dmi/dmi_base_board.c
new file mode 100644
index 00000000..f37feec9
--- /dev/null
+++ b/com32/gpllib/dmi/dmi_base_board.c
@@ -0,0 +1,38 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Pportions of this file taken from the dmidecode project
+ *
+ * Copyright (C) 2000-2002 Alan Cox <alan@redhat.com>
+ * Copyright (C) 2002-2008 Jean Delvare <khali@linux-fr.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * For the avoidance of doubt the "preferred form" of this code is one which
+ * is in an open unpatent encumbered format. Where cryptographic key signing
+ * forms part of the process of creating an executable the information
+ * including keys needed to generate an equivalently functional executable
+ * are deemed to be part of the source code.
+*/
+
+#include <dmi/dmi.h>
+#include <stdio.h>
+const char *base_board_features_strings[]={
+ "Board is a hosting board", /* 0 */
+ "Board requires at least one daughter board",
+ "Board is removable",
+ "Board is replaceable",
+ "Board is hot swappable" /* 4 */
+};
+
diff --git a/com32/gpllib/dmi/dmi_battery.c b/com32/gpllib/dmi/dmi_battery.c
new file mode 100644
index 00000000..567254a8
--- /dev/null
+++ b/com32/gpllib/dmi/dmi_battery.c
@@ -0,0 +1,73 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Pportions of this file taken from the dmidecode project
+ *
+ * Copyright (C) 2000-2002 Alan Cox <alan@redhat.com>
+ * Copyright (C) 2002-2008 Jean Delvare <khali@linux-fr.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * For the avoidance of doubt the "preferred form" of this code is one which
+ * is in an open unpatent encumbered format. Where cryptographic key signing
+ * forms part of the process of creating an executable the information
+ * including keys needed to generate an equivalently functional executable
+ * are deemed to be part of the source code.
+*/
+
+#include <dmi/dmi.h>
+#include <stdio.h>
+const char *dmi_battery_chemistry(uint8_t code)
+{
+ /* 3.3.23.1 */
+ static const char *chemistry[] = {
+ "Other", /* 0x01 */
+ "Unknown",
+ "Lead Acid",
+ "Nickel Cadmium",
+ "Nickel Metal Hydride",
+ "Lithium Ion",
+ "Zinc Air",
+ "Lithium Polymer" /* 0x08 */
+ };
+
+ if (code >= 0x01 && code <= 0x08)
+ return chemistry[code - 0x01];
+ return out_of_spec;
+}
+
+void dmi_battery_capacity(uint16_t code, uint8_t multiplier,char *capacity)
+{
+ if (code == 0)
+ sprintf(capacity,"%s","Unknown");
+ else
+ sprintf(capacity,"%u mWh", code * multiplier);
+}
+
+void dmi_battery_voltage(uint16_t code, char *voltage)
+{
+ if (code == 0)
+ sprintf(voltage,"%s","Unknown");
+ else
+ sprintf(voltage,"%u mV", code);
+}
+
+void dmi_battery_maximum_error(uint8_t code, char *error)
+{
+ if (code == 0xFF)
+ sprintf(error,"%s","Unknown");
+ else
+ sprintf(error,"%u%%", code);
+}
+
diff --git a/com32/gpllib/dmi/dmi_bios.c b/com32/gpllib/dmi/dmi_bios.c
new file mode 100644
index 00000000..9458d492
--- /dev/null
+++ b/com32/gpllib/dmi/dmi_bios.c
@@ -0,0 +1,80 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Pportions of this file taken from the dmidecode project
+ *
+ * Copyright (C) 2000-2002 Alan Cox <alan@redhat.com>
+ * Copyright (C) 2002-2008 Jean Delvare <khali@linux-fr.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * For the avoidance of doubt the "preferred form" of this code is one which
+ * is in an open unpatent encumbered format. Where cryptographic key signing
+ * forms part of the process of creating an executable the information
+ * including keys needed to generate an equivalently functional executable
+ * are deemed to be part of the source code.
+*/
+
+#include <dmi/dmi.h>
+#include <stdio.h>
+
+const char *bios_charac_strings[]={
+ "BIOS characteristics not supported", /* 3 */
+ "ISA is supported",
+ "MCA is supported",
+ "EISA is supported",
+ "PCI is supported",
+ "PC Card (PCMCIA) is supported",
+ "PNP is supported",
+ "APM is supported",
+ "BIOS is upgradeable",
+ "BIOS shadowing is allowed",
+ "VLB is supported",
+ "ESCD support is available",
+ "Boot from CD is supported",
+ "Selectable boot is supported",
+ "BIOS ROM is socketed",
+ "Boot from PC Card (PCMCIA) is supported",
+ "EDD is supported",
+ "Japanese floppy for NEC 9800 1.2 MB is supported (int 13h)",
+ "Japanese floppy for Toshiba 1.2 MB is supported (int 13h)",
+ "5.25\"/360 KB floppy services are supported (int 13h)",
+ "5.25\"/1.2 MB floppy services are supported (int 13h)",
+ "3.5\"/720 KB floppy services are supported (int 13h)",
+ "3.5\"/2.88 MB floppy services are supported (int 13h)",
+ "Print screen service is supported (int 5h)",
+ "8042 keyboard services are supported (int 9h)",
+ "Serial services are supported (int 14h)",
+ "Printer services are supported (int 17h)",
+ "CGA/mono video services are supported (int 10h)",
+ "NEC PC-98" /* 31 */
+};
+
+const char *bios_charac_x1_strings[]={
+ "ACPI is supported", /* 0 */
+ "USB legacy is supported",
+ "AGP is supported",
+ "I2O boot is supported",
+ "LS-120 boot is supported",
+ "ATAPI Zip drive boot is supported",
+ "IEEE 1394 boot is supported",
+ "Smart battery is supported" /* 7 */
+};
+
+const char *bios_charac_x2_strings[]={
+ "BIOS boot specification is supported", /* 0 */
+ "Function key-initiated network boot is supported",
+ "Targeted content distribution is supported" /* 2 */
+};
+
diff --git a/com32/include/dmi/dmi_chassis.h b/com32/gpllib/dmi/dmi_chassis.c
index 1456ede9..6150016f 100644
--- a/com32/include/dmi/dmi_chassis.h
+++ b/com32/gpllib/dmi/dmi_chassis.c
@@ -1,47 +1,35 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 2006 Erwan Velu - All Rights Reserved
+ * Pportions of this file taken from the dmidecode project
+ *
+ * Copyright (C) 2000-2002 Alan Cox <alan@redhat.com>
+ * Copyright (C) 2002-2008 Jean Delvare <khali@linux-fr.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
- * Boston MA 02111-1307, USA; either version 2 of the License, or
- * (at your option) any later version; incorporated herein by reference.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
- * ----------------------------------------------------------------------- */
-
-#ifndef DMI_CHASSIS_H
-#define DMI_CHASSIS_H
-
-#define CHASSIS_MANUFACTURER_SIZE 32
-#define CHASSIS_TYPE_SIZE 16
-#define CHASSIS_LOCK_SIZE 16
-#define CHASSIS_VERSION_SIZE 16
-#define CHASSIS_SERIAL_SIZE 32
-#define CHASSIS_ASSET_TAG_SIZE 32
-#define CHASSIS_BOOT_UP_STATE_SIZE 32
-#define CHASSIS_POWER_SUPPLY_STATE_SIZE 32
-#define CHASSIS_THERMAL_STATE_SIZE 32
-#define CHASSIS_SECURITY_STATUS_SIZE 32
-#define CHASSIS_OEM_INFORMATION_SIZE 32
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * For the avoidance of doubt the "preferred form" of this code is one which
+ * is in an open unpatent encumbered format. Where cryptographic key signing
+ * forms part of the process of creating an executable the information
+ * including keys needed to generate an equivalently functional executable
+ * are deemed to be part of the source code.
+*/
-typedef struct {
-char manufacturer[CHASSIS_MANUFACTURER_SIZE];
-char type[CHASSIS_TYPE_SIZE];
-char lock[CHASSIS_LOCK_SIZE];
-char version[CHASSIS_VERSION_SIZE];
-char serial[CHASSIS_SERIAL_SIZE];
-char asset_tag[CHASSIS_ASSET_TAG_SIZE];
-char boot_up_state[CHASSIS_BOOT_UP_STATE_SIZE];
-char power_supply_state[CHASSIS_POWER_SUPPLY_STATE_SIZE];
-char thermal_state[CHASSIS_THERMAL_STATE_SIZE];
-char security_status[CHASSIS_SECURITY_STATUS_SIZE];
-char oem_information[CHASSIS_OEM_INFORMATION_SIZE];
-u16 height;
-u16 nb_power_cords;
-} s_chassis;
+#include <dmi/dmi.h>
+#include <stdio.h>
-static const char *dmi_chassis_type(u8 code)
+const char *dmi_chassis_type(uint8_t code)
{
/* 3.3.4.1 */
static const char *type[]={
@@ -77,7 +65,7 @@ static const char *dmi_chassis_type(u8 code)
return out_of_spec;
}
-static const char *dmi_chassis_lock(u8 code)
+const char *dmi_chassis_lock(uint8_t code)
{
static const char *lock[]={
"Not Present", /* 0x00 */
@@ -87,7 +75,7 @@ static const char *dmi_chassis_lock(u8 code)
return lock[code];
}
-static const char *dmi_chassis_state(u8 code)
+const char *dmi_chassis_state(uint8_t code)
{
/* 3.3.4.2 */
static const char *state[]={
@@ -104,7 +92,7 @@ static const char *dmi_chassis_state(u8 code)
return out_of_spec;
}
-static const char *dmi_chassis_security_status(u8 code)
+const char *dmi_chassis_security_status(uint8_t code)
{
/* 3.3.4.3 */
static const char *status[]={
@@ -119,5 +107,3 @@ static const char *dmi_chassis_security_status(u8 code)
return(status[code-0x01]);
return out_of_spec;
}
-
-#endif
diff --git a/com32/gpllib/dmi/dmi_memory.c b/com32/gpllib/dmi/dmi_memory.c
new file mode 100644
index 00000000..dc354df1
--- /dev/null
+++ b/com32/gpllib/dmi/dmi_memory.c
@@ -0,0 +1,172 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Pportions of this file taken from the dmidecode project
+ *
+ * Copyright (C) 2000-2002 Alan Cox <alan@redhat.com>
+ * Copyright (C) 2002-2008 Jean Delvare <khali@linux-fr.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * For the avoidance of doubt the "preferred form" of this code is one which
+ * is in an open unpatent encumbered format. Where cryptographic key signing
+ * forms part of the process of creating an executable the information
+ * including keys needed to generate an equivalently functional executable
+ * are deemed to be part of the source code.
+*/
+
+#include <dmi/dmi.h>
+#include <stdio.h>
+
+void dmi_memory_array_error_handle(uint16_t code,char *array)
+{
+ if (code == 0xFFFE)
+ sprintf(array,"%s","Not Provided");
+ else if (code == 0xFFFF)
+ sprintf(array,"%s","No Error");
+ else
+ sprintf(array,"0x%04X", code);
+}
+
+void dmi_memory_device_width(uint16_t code, char *width)
+{
+ /*
+ * 3.3.18 Memory Device (Type 17)
+ * If no memory module is present, width may be 0
+ */
+ if (code == 0xFFFF || code == 0)
+ sprintf(width,"%s","Unknown");
+ else
+ sprintf(width,"%u bits", code);
+}
+
+void dmi_memory_device_size(uint16_t code, char *size)
+{
+ if (code == 0)
+ sprintf(size,"%s","Free");
+ else if (code == 0xFFFF)
+ sprintf(size,"%s","Unknown");
+ else {
+ if (code & 0x8000)
+ sprintf(size, "%u kB", code & 0x7FFF);
+ else
+ sprintf(size,"%u MB", code);
+ }
+}
+
+const char *dmi_memory_device_form_factor(uint8_t code)
+{
+ /* 3.3.18.1 */
+ static const char *form_factor[] = {
+ "Other", /* 0x01 */
+ "Unknown",
+ "SIMM",
+ "SIP",
+ "Chip",
+ "DIP",
+ "ZIP",
+ "Proprietary Card",
+ "DIMM",
+ "TSOP",
+ "Row Of Chips",
+ "RIMM",
+ "SODIMM",
+ "SRIMM",
+ "FB-DIMM" /* 0x0F */
+ };
+
+ if (code >= 0x01 && code <= 0x0F)
+ return form_factor[code - 0x01];
+ return out_of_spec;
+}
+
+void dmi_memory_device_set(uint8_t code, char *set)
+{
+ if (code == 0)
+ sprintf(set,"%s","None");
+ else if (code == 0xFF)
+ sprintf(set,"%s","Unknown");
+ else
+ sprintf(set,"%u", code);
+}
+
+const char *dmi_memory_device_type(uint8_t code)
+{
+ /* 3.3.18.2 */
+ static const char *type[] = {
+ "Other", /* 0x01 */
+ "Unknown",
+ "DRAM",
+ "EDRAM",
+ "VRAM",
+ "SRAM",
+ "RAM",
+ "ROM",
+ "Flash",
+ "EEPROM",
+ "FEPROM",
+ "EPROM",
+ "CDRAM",
+ "3DRAM",
+ "SDRAM",
+ "SGRAM",
+ "RDRAM",
+ "DDR",
+ "DDR2",
+ "DDR2 FB-DIMM" /* 0x14 */
+ };
+
+ if (code >= 0x01 && code <= 0x14)
+ return type[code - 0x01];
+ return out_of_spec;
+}
+
+void dmi_memory_device_type_detail(uint16_t code,char *type_detail)
+{
+ /* 3.3.18.3 */
+ static const char *detail[] = {
+ "Other", /* 1 */
+ "Unknown",
+ "Fast-paged",
+ "Static Column",
+ "Pseudo-static",
+ "RAMBus",
+ "Synchronous",
+ "CMOS",
+ "EDO",
+ "Window DRAM",
+ "Cache DRAM",
+ "Non-Volatile" /* 12 */
+ };
+
+ if ((code & 0x1FFE) == 0)
+ sprintf(type_detail,"%s","None");
+ else
+ {
+ int i;
+
+ for (i = 1; i <= 12; i++)
+ if (code & (1 << i))
+ sprintf(type_detail,"%s", detail[i - 1]);
+ }
+}
+
+void dmi_memory_device_speed(uint16_t code, char *speed)
+{
+ if (code == 0)
+ sprintf(speed,"%s","Unknown");
+ else
+ sprintf(speed,"%u MHz", code);
+}
+
diff --git a/com32/gpllib/dmi/dmi_processor.c b/com32/gpllib/dmi/dmi_processor.c
new file mode 100644
index 00000000..f86f0095
--- /dev/null
+++ b/com32/gpllib/dmi/dmi_processor.c
@@ -0,0 +1,433 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Pportions of this file taken from the dmidecode project
+ *
+ * Copyright (C) 2000-2002 Alan Cox <alan@redhat.com>
+ * Copyright (C) 2002-2008 Jean Delvare <khali@linux-fr.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * For the avoidance of doubt the "preferred form" of this code is one which
+ * is in an open unpatent encumbered format. Where cryptographic key signing
+ * forms part of the process of creating an executable the information
+ * including keys needed to generate an equivalently functional executable
+ * are deemed to be part of the source code.
+*/
+
+#include <dmi/dmi.h>
+#include <stdio.h>
+
+const char *dmi_processor_type(uint8_t code)
+{
+ /* 3.3.5.1 */
+ static const char *type[]={
+ "Other", /* 0x01 */
+ "Unknown",
+ "Central Processor",
+ "Math Processor",
+ "DSP Processor",
+ "Video Processor" /* 0x06 */
+ };
+
+ if(code>=0x01 && code<=0x06)
+ return type[code-0x01];
+ return out_of_spec;
+}
+
+const char *dmi_processor_family(uint8_t code, char *manufacturer)
+{
+ /* 3.3.5.2 */
+ static const char *family[]={
+ NULL, /* 0x00 */
+ "Other",
+ "Unknown",
+ "8086",
+ "80286",
+ "80386",
+ "80486",
+ "8087",
+ "80287",
+ "80387",
+ "80487",
+ "Pentium",
+ "Pentium Pro",
+ "Pentium II",
+ "Pentium MMX",
+ "Celeron",
+ "Pentium II Xeon",
+ "Pentium III",
+ "M1",
+ "M2",
+ "Celeron M", /* 0x14 */
+ "Pentium 4 HT",
+ NULL,
+ NULL, /* 0x17 */
+ "Duron",
+ "K5",
+ "K6",
+ "K6-2",
+ "K6-3",
+ "Athlon",
+ "AMD2900",
+ "K6-2+",
+ "Power PC",
+ "Power PC 601",
+ "Power PC 603",
+ "Power PC 603+",
+ "Power PC 604",
+ "Power PC 620",
+ "Power PC x704",
+ "Power PC 750",
+ "Core 2 Duo", /* 0x28 */
+ "Core 2 Duo Mobile",
+ "Core Solo Mobile",
+ "Atom",
+ NULL,
+ NULL,
+ NULL,
+ NULL,/* 0x2F */
+ "Alpha",
+ "Alpha 21064",
+ "Alpha 21066",
+ "Alpha 21164",
+ "Alpha 21164PC",
+ "Alpha 21164a",
+ "Alpha 21264",
+ "Alpha 21364",
+ NULL, /* 0x38 */
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL, /* 0x3F */
+ "MIPS",
+ "MIPS R4000",
+ "MIPS R4200",
+ "MIPS R4400",
+ "MIPS R4600",
+ "MIPS R10000",
+ NULL, /* 0x46 */
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL, /* 0x4F */
+ "SPARC",
+ "SuperSPARC",
+ "MicroSPARC II",
+ "MicroSPARC IIep",
+ "UltraSPARC",
+ "UltraSPARC II",
+ "UltraSPARC IIi",
+ "UltraSPARC III",
+ "UltraSPARC IIIi",
+ NULL, /* 0x59 */
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL, /* 0x5F */
+ "68040",
+ "68xxx",
+ "68000",
+ "68010",
+ "68020",
+ "68030",
+ NULL, /* 0x66 */
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL, /* 0x6F */
+ "Hobbit",
+ NULL, /* 0x71 */
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL, /* 0x77 */
+ "Crusoe TM5000",
+ "Crusoe TM3000",
+ "Efficeon TM8000",
+ NULL, /* 0x7B */
+ NULL,
+ NULL,
+ NULL,
+ NULL, /* 0x7F */
+ "Weitek",
+ NULL, /* 0x81 */
+ "Itanium",
+ "Athlon 64",
+ "Opteron",
+ "Sempron",
+ "Turion 64", /* 0x86 */
+ "Dual-Core Opteron",
+ "Atlhon 64 X2",
+ "Turion 64 X2",
+ "Quad-Core Opteron",
+ "Third-Generation Opteron",
+ "Phenom FX",
+ "Phenom X4",
+ "Phenom X2",
+ "Athlon X2",/* 0x8F */
+ "PA-RISC",
+ "PA-RISC 8500",
+ "PA-RISC 8000",
+ "PA-RISC 7300LC",
+ "PA-RISC 7200",
+ "PA-RISC 7100LC",
+ "PA-RISC 7100",
+ NULL, /* 0x97 */
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL, /* 0x9F */
+ "V30",
+ "Quad-Core Xeon 3200", /* 0xA1 */
+ "Dual-Core Xeon 3000",
+ "Quad-Core Xeon 5300",
+ "Dual-Core Xeon 5100",
+ "Dual-Core Xeon 5000",
+ "Dual-Core Xeon LV",
+ "Dual-Core Xeon ULV",
+ "Dual-Core Xeon 7100",
+ "Quad-Core Xeon 5400",
+ "Quad-Core Xeon", /* 0xAA */
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL, /* 0xAF */
+ "Pentium III Xeon",
+ "Pentium III Speedstep",
+ "Pentium 4",
+ "Xeon",
+ "AS400",
+ "Xeon MP",
+ "Athlon XP",
+ "Athlon MP",
+ "Itanium 2",
+ "Pentium M",
+ "Celeron D", /* 0xBA */
+ "Pentium D",
+ "Pentium EE",
+ "Core Solo", /* 0xBD */
+ NULL,
+ "Core 2 Duo",
+ "Core 2 Solo",
+ "Core 2 Extreme",
+ "Core 2 Quad",
+ "Core 2 Extreme Mobile",
+ "Core 2 Duo Mobile",
+ "Core 2 Solo Mobile",
+ NULL,
+ NULL, /* 0xC7 */
+ "IBM390",
+ "G4",
+ "G5",
+ "ESA/390 G6", /* 0xCB */
+ "z/Architectur",
+ NULL,
+ NULL,
+ NULL,
+ NULL, /*0xD0*/
+ NULL,
+ "C7-M",
+ "C7-D",
+ "C7",
+ "Eden",
+ NULL,/*0xD6*/
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL, /*0xE0*/
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ "Embedded Opteron Quad-Core",/* 0xE6*/
+ "Phenom Triple-Core" ,
+ "Turion Ultra Dual-Core Mobile",
+ "Turion Dual-Core Mobile",
+ "Athlon Dual-Core",
+ "Sempron SI",/*0xEB*/
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ NULL, /* 0xF9 */
+ "i860",
+ "i960",
+ NULL, /* 0xFC */
+ NULL,
+ NULL,
+ NULL /* 0xFF */
+ /* master.mif has values beyond that, but they can't be used for DMI */
+ };
+ /* Special case for ambiguous value 0xBE */
+ if (code == 0xBE)
+ {
+ /* Best bet based on manufacturer string */
+ if (strstr(manufacturer, "Intel") != NULL
+ || strncasecmp(manufacturer, "Intel", 5) == 0)
+ return "Core 2";
+ if (strstr(manufacturer, "AMD") != NULL
+ || strncasecmp(manufacturer, "AMD", 3) == 0)
+ return "K7";
+ return "Core 2 or K7";
+ }
+
+ if(family[code]!=NULL) {
+ return family[code];
+ }
+ return out_of_spec;
+}
+
+const char *dmi_processor_status(uint8_t code)
+{
+ static const char *status[]={
+ "Unknown", /* 0x00 */
+ "Enabled",
+ "Disabled By User",
+ "Disabled By BIOS",
+ "Idle", /* 0x04 */
+ "<OUT OF SPEC>",
+ "<OUT OF SPEC>",
+ "Other" /* 0x07 */
+ };
+
+ if(code<=0x04)
+ return status[code];
+ if(code==0x07)
+ return status[0x05];
+ return out_of_spec;
+}
+
+const char *dmi_processor_upgrade(uint8_t code)
+{
+ /* 3.3.5.5 */
+ static const char *upgrade[]={
+ "Other", /* 0x01 */
+ "Unknown",
+ "Daughter Board",
+ "ZIF Socket",
+ "Replaceable Piggy Back",
+ "None",
+ "LIF Socket",
+ "Slot 1",
+ "Slot 2",
+ "370-pin Socket",
+ "Slot A",
+ "Slot M",
+ "Socket 423",
+ "Socket A (Socket 462)",
+ "Socket 478",
+ "Socket 754",
+ "Socket 940",
+ "Socket 939" /* 0x12 */
+ "Socket mPGA604",
+ "Socket LGA771",
+ "Socket LGA775",
+ "Socket S1",
+ "Socket AM2",
+ "Socket F (1207)"
+ };
+
+ if(code>=0x01 && code<=0x11)
+ return upgrade[code-0x01];
+ return out_of_spec;
+}
+
+void dmi_processor_cache(uint16_t code, const char *level, uint16_t ver, char *cache)
+{
+ if(code==0xFFFF)
+ {
+ if(ver>=0x0203)
+ sprintf(cache,"Not Provided");
+ else
+ sprintf(cache,"No %s Cache", level);
+ }
+ else
+ sprintf(cache,"0x%04X", code);
+}
+
+/* Intel AP-485 revision 28, table 5 */
+const char *cpu_flags_strings[PROCESSOR_FLAGS_ELEMENTS]={
+ "FPU (Floating-point unit on-chip)", /* 0 */
+ "VME (Virtual mode extension)",
+ "DE (Debugging extension)",
+ "PSE (Page size extension)",
+ "TSC (Time stamp counter)",
+ "MSR (Model specific registers)",
+ "PAE (Physical address extension)",
+ "MCE (Machine check exception)",
+ "CX8 (CMPXCHG8 instruction supported)",
+ "APIC (On-chip APIC hardware supported)",
+ NULL, /* 10 */
+ "SEP (Fast system call)",
+ "MTRR (Memory type range registers)",
+ "PGE (Page global enable)",
+ "MCA (Machine check architecture)",
+ "CMOV (Conditional move instruction supported)",
+ "PAT (Page attribute table)",
+ "PSE-36 (36-bit page size extension)",
+ "PSN (Processor serial number present and enabled)",
+ "CLFSH (CLFLUSH instruction supported)",
+ NULL, /* 20 */
+ "DS (Debug store)",
+ "ACPI (ACPI supported)",
+ "MMX (MMX technology supported)",
+ "FXSR (Fast floating-point save and restore)",
+ "SSE (Streaming SIMD extensions)",
+ "SSE2 (Streaming SIMD extensions 2)",
+ "SS (Self-snoop)",
+ "HTT (Hyper-threading technology)",
+ "TM (Thermal monitor supported)",
+ "IA64 (IA64 capabilities)", /* 30 */
+ "PBE (Pending break enabled)" /* 31 */
+};
+
diff --git a/com32/hdt/Makefile b/com32/hdt/Makefile
new file mode 100644
index 00000000..d6766f34
--- /dev/null
+++ b/com32/hdt/Makefile
@@ -0,0 +1,79 @@
+## -----------------------------------------------------------------------
+##
+## Copyright 2001-2008 H. Peter Anvin - All Rights Reserved
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation, Inc., 53 Temple Place Ste 330,
+## Boston MA 02111-1307, USA; either version 2 of the License, or
+## (at your option) any later version; incorporated herein by reference.
+##
+## -----------------------------------------------------------------------
+
+##
+## samples for syslinux users
+##
+
+topdir = ../..
+include $(topdir)/MCONFIG.embedded
+
+MODULES = hdt.c32
+
+INCLUDES = -I$(com32)/include -I$(com32)/cmenu/libmenu -I$(com32)/gplinclude
+
+LIBGCC := $(shell $(CC) $(GCCOPT) --print-libgcc)
+LIB = liboldcom32.a
+
+com32 = $(topdir)/com32
+LIBS = $(LIB) $(com32)/cmenu/libmenu/libmenu.a \
+ $(com32)/gpllib/libcom32gpl.a \
+ $(com32)/libutil/libutil_com.a $(com32)/lib/libcom32.a \
+ $(LIBGCC)
+
+LDFLAGS = -m elf_i386 -T $(com32)/lib/com32.ld
+
+all: $(MODULES) $(LIB)
+
+.PRECIOUS: %.o
+%.o: %.S
+ $(CC) $(SFLAGS) -c -o $@ $<
+
+.PRECIOUS: %.o
+%.o: %.c
+ $(CC) $(CFLAGS) -std=gnu99 -D__COM32__ -c -o $@ $<
+
+.PRECIOUS: %.elf
+%.elf: c32entry.o %.o $(LIB)
+ $(LD) -Ttext 0x101000 -e _start -o $@ $^
+
+hdt.elf: hdt.o hdt-ata.o hdt-menu.o hdt-menu-pci.o hdt-menu-kernel.o \
+ hdt-menu-disk.o hdt-menu-dmi.o hdt-menu-processor.o \
+ hdt-menu-syslinux.o hdt-menu-about.o \
+ hdt-cli.o hdt-common.o hdt-cli-pci.o hdt-cli-dmi.o \
+ hdt-cli-cpu.o hdt-cli-pxe.o hdt-cli-kernel.o \
+ hdt-cli-syslinux.o hdt-cli-vesa.o\
+ hdt-menu-pxe.o hdt-menu-summary.o hdt-menu-vesa.o\
+ $(LIBS)
+ $(LD) $(LDFLAGS) -o $@ $^
+
+%.c32: %.elf
+ $(OBJCOPY) -O binary $< $@
+
+%.com: %.asm
+ $(NASM) $(NASMOPT) -f bin -o $@ -l $*.lst $<
+
+$(LIB):
+ rm -f $@
+ $(AR) cq $@ $^
+ $(RANLIB) $@
+
+tidy dist:
+ rm -f *.o *.a *.lst *.elf
+
+install: all
+
+# Don't specify *.com since mdiskchk.com can't be built using Linux tools
+clean: tidy
+ rm -f *.o *.c32 *.c~ *.h~ Makefile~
+
+spotless: clean
diff --git a/com32/hdt/hdt-ata.c b/com32/hdt/hdt-ata.c
new file mode 100644
index 00000000..4e3ea438
--- /dev/null
+++ b/com32/hdt/hdt-ata.c
@@ -0,0 +1,275 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <console.h>
+
+#include "com32io.h"
+#include "hdt-ata.h"
+
+#ifdef ATA
+/**
+ * ata_id_string - Convert IDENTIFY DEVICE page into string
+ * @id: IDENTIFY DEVICE results we will examine
+ * @s: string into which data is output
+ * @ofs: offset into identify device page
+ * @len: length of string to return. must be an even number.
+ *
+ * The strings in the IDENTIFY DEVICE page are broken up into
+ * 16-bit chunks. Run through the string, and output each
+ * 8-bit chunk linearly, regardless of platform.
+ *
+ * LOCKING:
+ * caller.
+ */
+void ata_id_string(const uint16_t * id, unsigned char *s,
+ unsigned int ofs, unsigned int len)
+{
+ unsigned int c;
+
+ while (len > 0) {
+ c = id[ofs] >> 8;
+ *s = c;
+ s++;
+
+ c = id[ofs] & 0xff;
+ *s = c;
+ s++;
+
+ ofs++;
+ len -= 2;
+ }
+}
+
+/**
+ * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
+ * @id: IDENTIFY DEVICE results we will examine
+ * @s: string into which data is output
+ * @ofs: offset into identify device page
+ * @len: length of string to return. must be an odd number.
+ *
+ * This function is identical to ata_id_string except that it
+ * trims trailing spaces and terminates the resulting string with
+ * null. @len must be actual maximum length (even number) + 1.
+ *
+ * LOCKING:
+ * caller.
+ */
+void ata_id_c_string(const uint16_t * id, unsigned char *s,
+ unsigned int ofs, unsigned int len)
+{
+ unsigned char *p;
+
+ //WARN_ON(!(len & 1));
+
+ ata_id_string(id, s, ofs, len - 1);
+
+ p = s + strnlen(s, len - 1);
+ while (p > s && p[-1] == ' ')
+ p--;
+ *p = '\0';
+}
+#endif
+
+/**
+ * Call int 13h, but with retry on failure. Especially floppies need this.
+ */
+int int13_retry(const com32sys_t * inreg, com32sys_t * outreg)
+{
+ int retry = 6; /* Number of retries */
+ com32sys_t tmpregs;
+
+ if (!outreg)
+ outreg = &tmpregs;
+
+ while (retry--) {
+ __intcall(0x13, inreg, outreg);
+ if (!(outreg->eflags.l & EFLAGS_CF))
+ return 0; /* CF=0, OK */
+ }
+
+ return -1; /* Error */
+}
+
+/* Display CPU registers for debugging purposes */
+void printregs(const com32sys_t * r)
+{
+ printf("eflags = %08x ds = %04x es = %04x fs = %04x gs = %04x\n"
+ "eax = %08x ebx = %08x ecx = %08x edx = %08x\n"
+ "ebp = %08x esi = %08x edi = %08x esp = %08x\n",
+ r->eflags.l, r->ds, r->es, r->fs, r->gs,
+ r->eax.l, r->ebx.l, r->ecx.l, r->edx.l,
+ r->ebp.l, r->esi.l, r->edi.l, r->_unused_esp.l);
+}
+
+/* Try to get information for a given disk */
+int get_disk_params(int disk, struct diskinfo *disk_info)
+{
+ static com32sys_t getparm, parm, getebios, ebios, inreg, outreg;
+ struct device_parameter dp;
+#ifdef ATA
+ struct ata_identify_device aid;
+#endif
+
+ memset(&(disk_info[disk]), 0, sizeof(struct diskinfo));
+
+ disk_info[disk].disk = disk;
+ disk_info[disk].ebios = disk_info[disk].cbios = 0;
+
+ /* Sending int 13h func 41h to query EBIOS information */
+ memset(&getebios, 0, sizeof(com32sys_t));
+ memset(&ebios, 0, sizeof(com32sys_t));
+
+ /* Get EBIOS support */
+ getebios.eax.w[0] = 0x4100;
+ getebios.ebx.w[0] = 0x55aa;
+ getebios.edx.b[0] = disk;
+ getebios.eflags.b[0] = 0x3; /* CF set */
+
+ __intcall(0x13, &getebios, &ebios);
+
+ /* Detecting EDD support */
+ if (!(ebios.eflags.l & EFLAGS_CF) &&
+ ebios.ebx.w[0] == 0xaa55 && (ebios.ecx.b[0] & 1)) {
+ disk_info[disk].ebios = 1;
+ switch (ebios.eax.b[1]) {
+ case 32:
+ strlcpy(disk_info[disk].edd_version, "1.0", 3);
+ break;
+ case 33:
+ strlcpy(disk_info[disk].edd_version, "1.1", 3);
+ break;
+ case 48:
+ strlcpy(disk_info[disk].edd_version, "3.0", 3);
+ break;
+ default:
+ strlcpy(disk_info[disk].edd_version, "0", 1);
+ break;
+ }
+ }
+ /* Get disk parameters -- really only useful for
+ * hard disks, but if we have a partitioned floppy
+ * it's actually our best chance...
+ */
+ memset(&getparm, 0, sizeof(com32sys_t));
+ memset(&parm, 0, sizeof(com32sys_t));
+ getparm.eax.b[1] = 0x08;
+ getparm.edx.b[0] = disk;
+
+ __intcall(0x13, &getparm, &parm);
+
+ if (parm.eflags.l & EFLAGS_CF)
+ return disk_info[disk].ebios ? 0 : -1;
+
+ disk_info[disk].heads = parm.edx.b[1] + 1;
+ disk_info[disk].sectors_per_track = parm.ecx.b[0] & 0x3f;
+ if (disk_info[disk].sectors_per_track == 0) {
+ disk_info[disk].sectors_per_track = 1;
+ } else {
+ disk_info[disk].cbios = 1; /* Valid geometry */
+ }
+
+/* FIXME: memset to 0 make it fails
+ * memset(__com32.cs_bounce, 0, sizeof(struct device_pairameter)); */
+ memset(&dp, 0, sizeof(struct device_parameter));
+ memset(&inreg, 0, sizeof(com32sys_t));
+
+ /* Requesting Extended Read Drive Parameters via int13h func 48h */
+ inreg.esi.w[0] = OFFS(__com32.cs_bounce);
+ inreg.ds = SEG(__com32.cs_bounce);
+ inreg.eax.w[0] = 0x4800;
+ inreg.edx.b[0] = disk;
+
+ __intcall(0x13, &inreg, &outreg);
+
+ /* Saving bounce buffer before anything corrupt it */
+ memcpy(&dp, __com32.cs_bounce, sizeof(struct device_parameter));
+
+ if (outreg.eflags.l & EFLAGS_CF) {
+ printf("Disk 0x%X doesn't supports EDD 3.0\n", disk);
+ return -1;
+ }
+
+ /* Copying result to the disk_info structure
+ * host_bus_type, interface_type, sectors & cylinders */
+ snprintf(disk_info[disk].host_bus_type,
+ sizeof disk_info[disk].host_bus_type, "%c%c%c%c",
+ dp.host_bus_type[0], dp.host_bus_type[1], dp.host_bus_type[2],
+ dp.host_bus_type[3]);
+ snprintf(disk_info[disk].interface_type,
+ sizeof disk_info[disk].interface_type, "%c%c%c%c%c%c%c%c",
+ dp.interface_type[0], dp.interface_type[1],
+ dp.interface_type[2], dp.interface_type[3],
+ dp.interface_type[4], dp.interface_type[5],
+ dp.interface_type[6], dp.interface_type[7]);
+ disk_info[disk].sectors = dp.sectors;
+ disk_info[disk].cylinders = dp.cylinders;
+
+ /*FIXME: we have to find a way to grab the model & fw
+ * We do put dummy data until we found a solution */
+ snprintf(disk_info[disk].aid.model, sizeof disk_info[disk].aid.model,
+ "0x%X", disk);
+ snprintf(disk_info[disk].aid.fw_rev, sizeof disk_info[disk].aid.fw_rev,
+ "%s", "N/A");
+ snprintf(disk_info[disk].aid.serial_no,
+ sizeof disk_info[disk].aid.serial_no, "%s", "N/A");
+
+ /* Useless stuff before I figure how to send ata packets */
+#ifdef ATA
+ memset(__com32.cs_bounce, 0, sizeof(struct device_parameter));
+ memset(&aid, 0, sizeof(struct ata_identify_device));
+ memset(&inreg, 0, sizeof inreg);
+ inreg.ebx.w[0] = OFFS(__com32.cs_bounce + 1024);
+ inreg.es = SEG(__com32.cs_bounce + 1024);
+ inreg.eax.w[0] = 0x2500;
+ inreg.edx.b[0] = disk;
+
+ __intcall(0x13, &inreg, &outreg);
+
+ memcpy(&aid, __com32.cs_bounce, sizeof(struct ata_identify_device));
+
+ if (outreg.eflags.l & EFLAGS_CF) {
+ printf("Disk 0x%X: Failed to Identify Device\n", disk);
+ //FIXME
+ return 0;
+ }
+// ata_id_c_string(aid, disk_info[disk].fwrev, ATA_ID_FW_REV, sizeof(disk_info[disk].fwrev));
+// ata_id_c_string(aid, disk_info[disk].model, ATA_ID_PROD, sizeof(disk_info[disk].model));
+
+ char buff[sizeof(struct ata_identify_device)];
+ memcpy(buff, &aid, sizeof(struct ata_identify_device));
+ for (int j = 0; j < sizeof(struct ata_identify_device); j++)
+ printf("model=|%c|\n", buff[j]);
+ printf("Disk 0x%X : %s %s %s\n", disk, aid.model, aid.fw_rev,
+ aid.serial_no);
+#endif
+
+ return 0;
+}
diff --git a/com32/hdt/hdt-ata.h b/com32/hdt/hdt-ata.h
new file mode 100644
index 00000000..fee4d598
--- /dev/null
+++ b/com32/hdt/hdt-ata.h
@@ -0,0 +1,122 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#ifndef DEFINE_HDT_ATA_H
+#define DEFINE_HDT_ATA_H
+#include <com32io.h>
+
+#include "hdt.h"
+
+struct ata_identify_device {
+ unsigned short words000_009[10];
+ unsigned char serial_no[20];
+ unsigned short words020_022[3];
+ unsigned char fw_rev[8];
+ unsigned char model[40];
+ unsigned short words047_079[33];
+ unsigned short major_rev_num;
+ unsigned short minor_rev_num;
+ unsigned short command_set_1;
+ unsigned short command_set_2;
+ unsigned short command_set_extension;
+ unsigned short cfs_enable_1;
+ unsigned short word086;
+ unsigned short csf_default;
+ unsigned short words088_255[168];
+} ATTR_PACKED;
+
+struct diskinfo {
+ int disk;
+ int ebios; /* EBIOS supported on this disk */
+ int cbios; /* CHS geometry is valid */
+ int heads;
+ int sectors_per_track;
+ int sectors;
+ int cylinders;
+ char edd_version[4];
+ struct ata_identify_device aid; /* IDENTIFY xxx DEVICE data */
+ char host_bus_type[5];
+ char interface_type[9];
+ char interface_port;
+} ATTR_PACKED;
+
+/*
+ * Get a disk block and return a malloc'd buffer.
+ * Uses the disk number and information from disk_info.
+ */
+struct ebios_dapa {
+ uint16_t len;
+ uint16_t count;
+ uint16_t off;
+ uint16_t seg;
+ uint64_t lba;
+};
+
+// BYTE=8
+// WORD=16
+// DWORD=32
+// QWORD=64
+struct device_parameter {
+ uint16_t len;
+ uint16_t info;
+ uint32_t cylinders;
+ uint32_t heads;
+ uint32_t sectors_per_track;
+ uint64_t sectors;
+ uint16_t bytes_per_sector;
+ uint32_t dpte_pointer;
+ uint16_t device_path_information;
+ uint8_t device_path_lenght;
+ uint8_t device_path_reserved;
+ uint16_t device_path_reserved_2;
+ uint8_t host_bus_type[4];
+ uint8_t interface_type[8];
+ uint64_t interace_path;
+ uint64_t device_path[2];
+ uint8_t reserved;
+ uint8_t cheksum;
+} ATTR_PACKED;
+
+/* Useless stuff until I manage how to send ata packets */
+#ifdef ATA
+enum {
+ ATA_ID_FW_REV = 23,
+ ATA_ID_PROD = 27,
+ ATA_ID_FW_REV_LEN = 8,
+ ATA_ID_PROD_LEN = 40,
+};
+void ata_id_c_string(const uint16_t * id, unsigned char *s, unsigned int ofs,
+ unsigned int len);
+void ata_id_string(const uint16_t * id, unsigned char *s, unsigned int ofs,
+ unsigned int len);
+int int13_retry(const com32sys_t * inreg, com32sys_t * outreg);
+void printregs(const com32sys_t * r);
+#endif
+
+int get_disk_params(int disk, struct diskinfo *disk_info);
+#endif
diff --git a/com32/hdt/hdt-cli-cpu.c b/com32/hdt/hdt-cli-cpu.c
new file mode 100644
index 00000000..cfd66ef7
--- /dev/null
+++ b/com32/hdt/hdt-cli-cpu.c
@@ -0,0 +1,195 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+
+#include "hdt-cli.h"
+#include "hdt-common.h"
+
+void show_cpu(struct s_hardware *hardware)
+{
+ char buffer[81];
+ char buffer1[81];
+ clear_screen();
+ more_printf("CPU\n");
+ more_printf("Vendor : %s\n", hardware->cpu.vendor);
+ more_printf("Model : %s\n", hardware->cpu.model);
+ more_printf("Vendor ID : %d\n", hardware->cpu.vendor_id);
+ more_printf("Family ID : %d\n", hardware->cpu.family);
+ more_printf("Model ID : %d\n", hardware->cpu.model_id);
+ more_printf("Stepping : %d\n", hardware->cpu.stepping);
+ more_printf("FSB : %d MHz\n",
+ hardware->dmi.processor.external_clock);
+ more_printf("Cur. Speed: %d MHz\n",
+ hardware->dmi.processor.current_speed);
+ more_printf("Max Speed : %d MHz\n", hardware->dmi.processor.max_speed);
+ more_printf("Upgrade : %s\n", hardware->dmi.processor.upgrade);
+ if (hardware->cpu.flags.smp) {
+ more_printf("SMP : yes\n");
+ } else {
+ more_printf("SMP : no\n");
+ }
+ if (hardware->cpu.flags.lm) {
+ more_printf("x86_64 : yes\n");
+ } else {
+ more_printf("x86_64 : no\n");
+ }
+
+ memset(buffer, 0, sizeof(buffer));
+ memset(buffer1, 0, sizeof(buffer1));
+ if (hardware->cpu.flags.fpu)
+ strcat(buffer1, "fpu ");
+ if (hardware->cpu.flags.vme)
+ strcat(buffer1, "vme ");
+ if (hardware->cpu.flags.de)
+ strcat(buffer1, "de ");
+ if (hardware->cpu.flags.pse)
+ strcat(buffer1, "pse ");
+ if (hardware->cpu.flags.tsc)
+ strcat(buffer1, "tsc ");
+ if (hardware->cpu.flags.msr)
+ strcat(buffer1, "msr ");
+ if (hardware->cpu.flags.pae)
+ strcat(buffer1, "pae ");
+ if (hardware->cpu.flags.mce)
+ strcat(buffer1, "mce ");
+ if (hardware->cpu.flags.cx8)
+ strcat(buffer1, "cx8 ");
+ if (hardware->cpu.flags.apic)
+ strcat(buffer1, "apic ");
+ if (hardware->cpu.flags.sep)
+ strcat(buffer1, "sep ");
+ if (hardware->cpu.flags.mtrr)
+ strcat(buffer1, "mtrr ");
+ if (hardware->cpu.flags.pge)
+ strcat(buffer1, "pge ");
+ if (hardware->cpu.flags.mca)
+ strcat(buffer1, "mca ");
+ snprintf(buffer, sizeof buffer, "Flags : %s\n", buffer1);
+ more_printf(buffer);
+
+ memset(buffer, 0, sizeof(buffer));
+ memset(buffer1, 0, sizeof(buffer1));
+ if (hardware->cpu.flags.cmov)
+ strcat(buffer1, "cmov ");
+ if (hardware->cpu.flags.pat)
+ strcat(buffer1, "pat ");
+ if (hardware->cpu.flags.pse_36)
+ strcat(buffer1, "pse_36 ");
+ if (hardware->cpu.flags.psn)
+ strcat(buffer1, "psn ");
+ if (hardware->cpu.flags.clflsh)
+ strcat(buffer1, "clflsh ");
+ if (hardware->cpu.flags.dts)
+ strcat(buffer1, "dts ");
+ if (hardware->cpu.flags.acpi)
+ strcat(buffer1, "acpi ");
+ if (hardware->cpu.flags.mmx)
+ strcat(buffer1, "mmx ");
+ if (hardware->cpu.flags.sse)
+ strcat(buffer1, "sse ");
+ if (hardware->cpu.flags.sse2)
+ strcat(buffer1, "sse2 ");
+ if (hardware->cpu.flags.ss)
+ strcat(buffer1, "ss ");
+ snprintf(buffer, sizeof buffer, "Flags : %s\n", buffer1);
+ more_printf(buffer);
+
+ memset(buffer, 0, sizeof(buffer));
+ memset(buffer1, 0, sizeof(buffer1));
+ if (hardware->cpu.flags.htt)
+ strcat(buffer1, "ht ");
+ if (hardware->cpu.flags.acc)
+ strcat(buffer1, "acc ");
+ if (hardware->cpu.flags.syscall)
+ strcat(buffer1, "syscall ");
+ if (hardware->cpu.flags.mp)
+ strcat(buffer1, "mp ");
+ if (hardware->cpu.flags.nx)
+ strcat(buffer1, "nx ");
+ if (hardware->cpu.flags.mmxext)
+ strcat(buffer1, "mmxext ");
+ if (hardware->cpu.flags.lm)
+ strcat(buffer1, "lm ");
+ if (hardware->cpu.flags.nowext)
+ strcat(buffer1, "3dnowext ");
+ if (hardware->cpu.flags.now)
+ strcat(buffer1, "3dnow! ");
+ snprintf(buffer, sizeof buffer, "Flags : %s\n", buffer1);
+ more_printf(buffer);
+}
+
+static void show_cpu_help()
+{
+ more_printf("Show supports the following commands : %s\n", CLI_CPU);
+}
+
+static void cpu_show(char *item, struct s_hardware *hardware)
+{
+ if (!strncmp(item, CLI_CPU, sizeof(CLI_CPU) - 1)) {
+ show_cpu(hardware);
+ return;
+ }
+ show_cpu_help();
+}
+
+void handle_cpu_commands(char *cli_line, struct s_hardware *hardware)
+{
+ if (!strncmp(cli_line, CLI_SHOW, sizeof(CLI_SHOW) - 1)) {
+ cpu_show(strstr(cli_line, "show") + sizeof(CLI_SHOW), hardware);
+ return;
+ }
+}
+
+void main_show_cpu(struct s_hardware *hardware)
+{
+ cpu_detect(hardware);
+ detect_dmi(hardware);
+ more_printf("CPU\n");
+ more_printf(" Manufacturer : %s \n", hardware->cpu.vendor);
+ more_printf(" Product : %s \n", hardware->cpu.model);
+ if ((hardware->cpu.flags.lm == false)
+ && (hardware->cpu.flags.smp == false)) {
+ more_printf(" Features : %d MhZ : x86 32bits\n",
+ hardware->dmi.processor.current_speed);
+ } else if ((hardware->cpu.flags.lm == false)
+ && (hardware->cpu.flags.smp == true)) {
+ more_printf(" Features : %d MhZ : x86 32bits SMP\n",
+ hardware->dmi.processor.current_speed);
+ } else if ((hardware->cpu.flags.lm == true)
+ && (hardware->cpu.flags.smp == false)) {
+ more_printf(" Features : %d MhZ : x86_64 64bits\n",
+ hardware->dmi.processor.current_speed);
+ } else {
+ more_printf(" Features : %d MhZ : x86_64 64bits SMP\n",
+ hardware->dmi.processor.current_speed);
+ }
+}
diff --git a/com32/hdt/hdt-cli-dmi.c b/com32/hdt/hdt-cli-dmi.c
new file mode 100644
index 00000000..0fe0845b
--- /dev/null
+++ b/com32/hdt/hdt-cli-dmi.c
@@ -0,0 +1,451 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "hdt-cli.h"
+#include "hdt-common.h"
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+
+static void show_dmi_modules(struct s_hardware *hardware)
+{
+ char available_dmi_commands[1024];
+ memset(available_dmi_commands, 0, sizeof(available_dmi_commands));
+
+ if (hardware->dmi.base_board.filled == true) {
+ strncat(available_dmi_commands, CLI_DMI_BASE_BOARD,
+ sizeof(CLI_DMI_BASE_BOARD) - 1);
+ strncat(available_dmi_commands, " ", 1);
+ }
+ if (hardware->dmi.battery.filled == true) {
+ strncat(available_dmi_commands, CLI_DMI_BATTERY,
+ sizeof(CLI_DMI_BATTERY) - 1);
+ strncat(available_dmi_commands, " ", 1);
+ }
+ if (hardware->dmi.bios.filled == true) {
+ strncat(available_dmi_commands, CLI_DMI_BIOS,
+ sizeof(CLI_DMI_BIOS) - 1);
+ strncat(available_dmi_commands, " ", 1);
+ }
+ if (hardware->dmi.chassis.filled == true) {
+ strncat(available_dmi_commands, CLI_DMI_CHASSIS,
+ sizeof(CLI_DMI_CHASSIS) - 1);
+ strncat(available_dmi_commands, " ", 1);
+ }
+ for (int i = 0; i < hardware->dmi.memory_count; i++) {
+ if (hardware->dmi.memory[i].filled == true) {
+ strncat(available_dmi_commands, CLI_DMI_MEMORY,
+ sizeof(CLI_DMI_MEMORY) - 1);
+ strncat(available_dmi_commands, " bank<bank_number> ",
+ 19);
+ break;
+ }
+ }
+ if (hardware->dmi.processor.filled == true) {
+ strncat(available_dmi_commands, CLI_DMI_PROCESSOR,
+ sizeof(CLI_DMI_PROCESSOR) - 1);
+ strncat(available_dmi_commands, " ", 1);
+ }
+ if (hardware->dmi.system.filled == true) {
+ strncat(available_dmi_commands, CLI_DMI_SYSTEM,
+ sizeof(CLI_DMI_SYSTEM) - 1);
+ strncat(available_dmi_commands, " ", 1);
+ }
+ printf("Available DMI modules: %s\n", available_dmi_commands);
+}
+
+static void show_dmi_help(struct s_hardware *hardware)
+{
+ more_printf("Show supports the following commands : \n");
+ more_printf(" %s\n", CLI_SHOW_LIST);
+ more_printf(" <module_name>\n");
+ more_printf(" -\n");
+ show_dmi_modules(hardware);
+}
+
+static void show_dmi_base_board(struct s_hardware *hardware)
+{
+ if (hardware->dmi.base_board.filled == false) {
+ printf("Base_board module not available\n");
+ return;
+ }
+ clear_screen();
+ more_printf("Base board\n");
+ more_printf(" Manufacturer : %s\n",
+ hardware->dmi.base_board.manufacturer);
+ more_printf(" Product Name : %s\n",
+ hardware->dmi.base_board.product_name);
+ more_printf(" Version : %s\n", hardware->dmi.base_board.version);
+ more_printf(" Serial : %s\n", hardware->dmi.base_board.serial);
+ more_printf(" Asset Tag : %s\n", hardware->dmi.base_board.asset_tag);
+ more_printf(" Location : %s\n", hardware->dmi.base_board.location);
+ more_printf(" Type : %s\n", hardware->dmi.base_board.type);
+ for (int i = 0; i < BASE_BOARD_NB_ELEMENTS; i++) {
+ if (((bool *) (&hardware->dmi.base_board.features))[i] == true) {
+ more_printf(" %s\n", base_board_features_strings[i]);
+ }
+ }
+}
+
+static void show_dmi_system(struct s_hardware *hardware)
+{
+ if (hardware->dmi.system.filled == false) {
+ printf("System module not available\n");
+ return;
+ }
+ clear_screen();
+ more_printf("System\n");
+ more_printf(" Manufacturer : %s\n", hardware->dmi.system.manufacturer);
+ more_printf(" Product Name : %s\n", hardware->dmi.system.product_name);
+ more_printf(" Version : %s\n", hardware->dmi.system.version);
+ more_printf(" Serial : %s\n", hardware->dmi.system.serial);
+ more_printf(" UUID : %s\n", hardware->dmi.system.uuid);
+ more_printf(" Wakeup Type : %s\n", hardware->dmi.system.wakeup_type);
+ more_printf(" SKU Number : %s\n", hardware->dmi.system.sku_number);
+ more_printf(" Family : %s\n", hardware->dmi.system.family);
+}
+
+static void show_dmi_bios(struct s_hardware *hardware)
+{
+ if (hardware->dmi.bios.filled == false) {
+ printf("Bios module not available\n");
+ return;
+ }
+ clear_screen();
+ more_printf("BIOS\n");
+ more_printf(" Vendor : %s\n", hardware->dmi.bios.vendor);
+ more_printf(" Version : %s\n", hardware->dmi.bios.version);
+ more_printf(" Release : %s\n",
+ hardware->dmi.bios.release_date);
+ more_printf(" Bios Revision : %s\n",
+ hardware->dmi.bios.bios_revision);
+ more_printf(" Firmware Revision : %s\n",
+ hardware->dmi.bios.firmware_revision);
+ more_printf(" Address : 0x%04X0\n",
+ hardware->dmi.bios.address);
+ more_printf(" Runtime address : %u %s\n",
+ hardware->dmi.bios.runtime_size,
+ hardware->dmi.bios.runtime_size_unit);
+ more_printf(" Rom size : %u %s\n", hardware->dmi.bios.rom_size,
+ hardware->dmi.bios.rom_size_unit);
+
+ for (int i = 0; i < BIOS_CHAR_NB_ELEMENTS; i++) {
+ if (((bool *) (&hardware->dmi.bios.characteristics))[i] == true) {
+ more_printf(" %s\n", bios_charac_strings[i]);
+ }
+ }
+ for (int i = 0; i < BIOS_CHAR_X1_NB_ELEMENTS; i++) {
+ if (((bool *) (&hardware->dmi.bios.characteristics_x1))[i] ==
+ true) {
+ more_printf(" %s\n", bios_charac_x1_strings[i]);
+ }
+ }
+
+ for (int i = 0; i < BIOS_CHAR_X2_NB_ELEMENTS; i++) {
+ if (((bool *) (&hardware->dmi.bios.characteristics_x2))[i] ==
+ true) {
+ more_printf(" %s\n", bios_charac_x2_strings[i]);
+ }
+ }
+
+}
+
+static void show_dmi_chassis(struct s_hardware *hardware)
+{
+ if (hardware->dmi.chassis.filled == false) {
+ printf("Chassis module not available\n");
+ return;
+ }
+ clear_screen();
+ more_printf("Chassis\n");
+ more_printf(" Manufacturer : %s\n",
+ hardware->dmi.chassis.manufacturer);
+ more_printf(" Type : %s\n", hardware->dmi.chassis.type);
+ more_printf(" Lock : %s\n", hardware->dmi.chassis.lock);
+ more_printf(" Version : %s\n",
+ hardware->dmi.chassis.version);
+ more_printf(" Serial : %s\n", hardware->dmi.chassis.serial);
+ more_printf(" Asset Tag : %s\n",
+ hardware->dmi.chassis.asset_tag);
+ more_printf(" Boot up state : %s\n",
+ hardware->dmi.chassis.boot_up_state);
+ more_printf(" Power supply state : %s\n",
+ hardware->dmi.chassis.power_supply_state);
+ more_printf(" Thermal state : %s\n",
+ hardware->dmi.chassis.thermal_state);
+ more_printf(" Security Status : %s\n",
+ hardware->dmi.chassis.security_status);
+ more_printf(" OEM Information : %s\n",
+ hardware->dmi.chassis.oem_information);
+ more_printf(" Height : %u\n", hardware->dmi.chassis.height);
+ more_printf(" NB Power Cords : %u\n",
+ hardware->dmi.chassis.nb_power_cords);
+}
+
+static void show_dmi_battery(struct s_hardware *hardware)
+{
+ if (hardware->dmi.battery.filled == false) {
+ printf("Battery module not available\n");
+ return;
+ }
+ clear_screen();
+ more_printf("Battery \n");
+ more_printf(" Vendor : %s\n",
+ hardware->dmi.battery.manufacturer);
+ more_printf(" Manufacture Date : %s\n",
+ hardware->dmi.battery.manufacture_date);
+ more_printf(" Serial : %s\n", hardware->dmi.battery.serial);
+ more_printf(" Name : %s\n", hardware->dmi.battery.name);
+ more_printf(" Chemistry : %s\n",
+ hardware->dmi.battery.chemistry);
+ more_printf(" Design Capacity : %s\n",
+ hardware->dmi.battery.design_capacity);
+ more_printf(" Design Voltage : %s\n",
+ hardware->dmi.battery.design_voltage);
+ more_printf(" SBDS : %s\n", hardware->dmi.battery.sbds);
+ more_printf(" SBDS Manuf. Date : %s\n",
+ hardware->dmi.battery.sbds_manufacture_date);
+ more_printf(" SBDS Chemistry : %s\n",
+ hardware->dmi.battery.sbds_chemistry);
+ more_printf(" Maximum Error : %s\n",
+ hardware->dmi.battery.maximum_error);
+ more_printf(" OEM Info : %s\n",
+ hardware->dmi.battery.oem_info);
+}
+
+static void show_dmi_cpu(struct s_hardware *hardware)
+{
+ if (hardware->dmi.processor.filled == false) {
+ printf("Processor module not available\n");
+ return;
+ }
+ clear_screen();
+ more_printf("CPU\n");
+ more_printf(" Socket Designation : %s\n",
+ hardware->dmi.processor.socket_designation);
+ more_printf(" Type : %s\n", hardware->dmi.processor.type);
+ more_printf(" Family : %s\n",
+ hardware->dmi.processor.family);
+ more_printf(" Manufacturer : %s\n",
+ hardware->dmi.processor.manufacturer);
+ more_printf(" Version : %s\n",
+ hardware->dmi.processor.version);
+ more_printf(" External Clock : %u\n",
+ hardware->dmi.processor.external_clock);
+ more_printf(" Max Speed : %u\n",
+ hardware->dmi.processor.max_speed);
+ more_printf(" Current Speed : %u\n",
+ hardware->dmi.processor.current_speed);
+ more_printf(" Cpu Type : %u\n",
+ hardware->dmi.processor.signature.type);
+ more_printf(" Cpu Family : %u\n",
+ hardware->dmi.processor.signature.family);
+ more_printf(" Cpu Model : %u\n",
+ hardware->dmi.processor.signature.model);
+ more_printf(" Cpu Stepping : %u\n",
+ hardware->dmi.processor.signature.stepping);
+ more_printf(" Cpu Minor Stepping : %u\n",
+ hardware->dmi.processor.signature.minor_stepping);
+// more_printf(" Voltage : %f\n",hardware->dmi.processor.voltage);
+ more_printf(" Status : %s\n",
+ hardware->dmi.processor.status);
+ more_printf(" Upgrade : %s\n",
+ hardware->dmi.processor.upgrade);
+ more_printf(" Cache L1 Handle : %s\n",
+ hardware->dmi.processor.cache1);
+ more_printf(" Cache L2 Handle : %s\n",
+ hardware->dmi.processor.cache2);
+ more_printf(" Cache L3 Handle : %s\n",
+ hardware->dmi.processor.cache3);
+ more_printf(" Serial : %s\n",
+ hardware->dmi.processor.serial);
+ more_printf(" Part Number : %s\n",
+ hardware->dmi.processor.part_number);
+ more_printf(" ID : %s\n", hardware->dmi.processor.id);
+ for (int i = 0; i < PROCESSOR_FLAGS_ELEMENTS; i++) {
+ if (((bool *) (&hardware->dmi.processor.cpu_flags))[i] == true) {
+ more_printf(" %s\n", cpu_flags_strings[i]);
+ }
+ }
+}
+
+static void show_dmi_memory_bank(struct s_hardware *hardware, const char *item)
+{
+ long bank = strtol(item, (char **)NULL, 10);
+ if (errno == ERANGE) {
+ printf("This bank number is incorrect\n");
+ return;
+ }
+
+ if ((bank >= hardware->dmi.memory_count) || (bank < 0)) {
+ printf("Bank %d number doesn't exists\n", bank);
+ return;
+ }
+ if (hardware->dmi.memory[bank].filled == false) {
+ printf("Bank %d doesn't contain any information\n", bank);
+ return;
+ }
+
+ printf("Memory Bank %d\n", bank);
+ more_printf(" Form Factor : %s\n",
+ hardware->dmi.memory[bank].form_factor);
+ more_printf(" Type : %s\n", hardware->dmi.memory[bank].type);
+ more_printf(" Type Detail : %s\n",
+ hardware->dmi.memory[bank].type_detail);
+ more_printf(" Speed : %s\n", hardware->dmi.memory[bank].speed);
+ more_printf(" Size : %s\n", hardware->dmi.memory[bank].size);
+ more_printf(" Device Set : %s\n",
+ hardware->dmi.memory[bank].device_set);
+ more_printf(" Device Loc. : %s\n",
+ hardware->dmi.memory[bank].device_locator);
+ more_printf(" Bank Locator : %s\n",
+ hardware->dmi.memory[bank].bank_locator);
+ more_printf(" Total Width : %s\n",
+ hardware->dmi.memory[bank].total_width);
+ more_printf(" Data Width : %s\n",
+ hardware->dmi.memory[bank].data_width);
+ more_printf(" Error : %s\n", hardware->dmi.memory[bank].error);
+ more_printf(" Vendor : %s\n",
+ hardware->dmi.memory[bank].manufacturer);
+ more_printf(" Serial : %s\n", hardware->dmi.memory[bank].serial);
+ more_printf(" Asset Tag : %s\n",
+ hardware->dmi.memory[bank].asset_tag);
+ more_printf(" Part Number : %s\n",
+ hardware->dmi.memory[bank].part_number);
+}
+
+void dmi_show(char *item, struct s_hardware *hardware)
+{
+ if (!strncmp(item, CLI_DMI_BASE_BOARD, sizeof(CLI_DMI_BASE_BOARD) - 1)) {
+ show_dmi_base_board(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_DMI_SYSTEM, sizeof(CLI_DMI_SYSTEM) - 1)) {
+ show_dmi_system(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_DMI_BIOS, sizeof(CLI_DMI_BIOS) - 1)) {
+ show_dmi_bios(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_DMI_CHASSIS, sizeof(CLI_DMI_CHASSIS) - 1)) {
+ show_dmi_chassis(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_DMI_PROCESSOR, sizeof(CLI_DMI_PROCESSOR) - 1)) {
+ show_dmi_cpu(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_DMI_MEMORY, sizeof(CLI_DMI_MEMORY) - 1)) {
+ show_dmi_memory_modules(hardware, true, true);
+ return;
+ }
+ if (!strncmp
+ (item, CLI_DMI_MEMORY_BANK, sizeof(CLI_DMI_MEMORY_BANK) - 1)) {
+ show_dmi_memory_bank(hardware,
+ item + sizeof(CLI_DMI_MEMORY_BANK) - 1);
+ return;
+ }
+ if (!strncmp(item, CLI_SHOW_LIST, sizeof(CLI_SHOW_LIST) - 1)) {
+ show_dmi_modules(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_DMI_BATTERY, sizeof(CLI_DMI_BATTERY) - 1)) {
+ show_dmi_battery(hardware);
+ return;
+ }
+
+ show_dmi_help(hardware);
+}
+
+void handle_dmi_commands(char *cli_line, struct s_hardware *hardware)
+{
+ if (!strncmp(cli_line, CLI_SHOW, sizeof(CLI_SHOW) - 1)) {
+ dmi_show(strstr(cli_line, "show") + sizeof(CLI_SHOW), hardware);
+ return;
+ }
+}
+
+void main_show_dmi(struct s_hardware *hardware)
+{
+
+ detect_dmi(hardware);
+
+ if (hardware->is_dmi_valid == false) {
+ printf("No valid DMI table found, exiting.\n");
+ return;
+ }
+ printf("DMI Table version %d.%d found\n",
+ hardware->dmi.dmitable.major_version,
+ hardware->dmi.dmitable.minor_version);
+
+ show_dmi_modules(hardware);
+}
+
+void show_dmi_memory_modules(struct s_hardware *hardware, bool clear,
+ bool show_free_banks)
+{
+ char bank_number[10];
+ char available_dmi_commands[1024];
+ memset(available_dmi_commands, 0, sizeof(available_dmi_commands));
+
+ if (hardware->dmi.memory_count <= 0) {
+ printf("No memory module found\n");
+ return;
+ }
+
+ if (clear)
+ clear_screen();
+ more_printf("Memory Banks\n");
+ for (int i = 0; i < hardware->dmi.memory_count; i++) {
+ if (hardware->dmi.memory[i].filled == true) {
+ /* When discovering the first item, let's clear the screen */
+ strncat(available_dmi_commands, CLI_DMI_MEMORY_BANK,
+ sizeof(CLI_DMI_MEMORY_BANK) - 1);
+ memset(bank_number, 0, sizeof(bank_number));
+ snprintf(bank_number, sizeof(bank_number), "%d ", i);
+ strncat(available_dmi_commands, bank_number,
+ sizeof(bank_number));
+ if (show_free_banks == false) {
+ if (strncmp
+ (hardware->dmi.memory[i].size, "Free", 4))
+ printf(" bank %02d : %s %s@%s\n",
+ i, hardware->dmi.memory[i].size,
+ hardware->dmi.memory[i].type,
+ hardware->dmi.memory[i].speed);
+ } else {
+ printf(" bank %02d : %s %s@%s\n", i,
+ hardware->dmi.memory[i].size,
+ hardware->dmi.memory[i].type,
+ hardware->dmi.memory[i].speed);
+ }
+ }
+ }
+ //printf("Type 'show bank<bank_number>' for more details.\n");
+}
diff --git a/com32/hdt/hdt-cli-kernel.c b/com32/hdt/hdt-cli-kernel.c
new file mode 100644
index 00000000..5b0df1d2
--- /dev/null
+++ b/com32/hdt/hdt-cli-kernel.c
@@ -0,0 +1,170 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+
+#include "hdt-cli.h"
+#include "hdt-common.h"
+
+void main_show_kernel(struct s_hardware *hardware)
+{
+ char buffer[1024];
+ struct pci_device *pci_device;
+ bool found = false;
+ char kernel_modules[LINUX_KERNEL_MODULE_SIZE *
+ MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+
+ memset(buffer, 0, sizeof(buffer));
+
+ detect_pci(hardware);
+ more_printf("Kernel modules\n");
+
+// more_printf(" PCI device no: %d \n", p->pci_device_pos);
+
+ if (hardware->modules_pcimap_return_code == -ENOMODULESPCIMAP) {
+ more_printf(" modules.pcimap is missing\n");
+ return;
+ }
+
+ /* For every detected pci device, compute its submenu */
+ for_each_pci_func(pci_device, hardware->pci_domain) {
+ memset(kernel_modules, 0, sizeof kernel_modules);
+
+ for (int kmod = 0;
+ kmod < pci_device->dev_info->linux_kernel_module_count;
+ kmod++) {
+ if (kmod > 0) {
+ strncat(kernel_modules, " | ", 3);
+ }
+ strncat(kernel_modules,
+ pci_device->dev_info->linux_kernel_module[kmod],
+ LINUX_KERNEL_MODULE_SIZE - 1);
+ }
+
+ if ((pci_device->dev_info->linux_kernel_module_count > 0)
+ && (!strstr(buffer, kernel_modules))) {
+ found = true;
+ if (pci_device->dev_info->linux_kernel_module_count > 1)
+ strncat(buffer, "(", 1);
+ strncat(buffer, kernel_modules, sizeof(kernel_modules));
+ if (pci_device->dev_info->linux_kernel_module_count > 1)
+ strncat(buffer, ")", 1);
+ strncat(buffer, " # ", 3);
+ }
+
+ }
+ if (found == true) {
+ strncat(buffer, "\n", 1);
+ more_printf(buffer);
+ }
+}
+
+static void show_kernel_modules(struct s_hardware *hardware)
+{
+ struct pci_device *pci_device;
+ char kernel_modules[LINUX_KERNEL_MODULE_SIZE *
+ MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+ bool nopciids = false;
+ bool nomodulespcimap = false;
+ char modules[MAX_PCI_CLASSES][256];
+ char category_name[MAX_PCI_CLASSES][256];
+
+ detect_pci(hardware);
+ memset(&modules, 0, sizeof(modules));
+
+ if (hardware->pci_ids_return_code == -ENOPCIIDS) {
+ nopciids = true;
+ more_printf(" Missing pci.ids, we can't compute the list\n");
+ return;
+ }
+
+ if (hardware->modules_pcimap_return_code == -ENOMODULESPCIMAP) {
+ nomodulespcimap = true;
+ more_printf
+ (" Missing modules.pcimap, we can't compute the list\n");
+ return;
+ }
+
+ clear_screen();
+
+ for_each_pci_func(pci_device, hardware->pci_domain) {
+ memset(kernel_modules, 0, sizeof kernel_modules);
+
+ for (int kmod = 0;
+ kmod < pci_device->dev_info->linux_kernel_module_count;
+ kmod++) {
+ strncat(kernel_modules,
+ pci_device->dev_info->linux_kernel_module[kmod],
+ LINUX_KERNEL_MODULE_SIZE - 1);
+ strncat(kernel_modules, " ", 1);
+ }
+
+ if ((pci_device->dev_info->linux_kernel_module_count > 0)
+ && (!strstr(modules[pci_device->class[2]], kernel_modules)))
+ {
+ strncat(modules[pci_device->class[2]], kernel_modules,
+ sizeof(kernel_modules));
+ snprintf(category_name[pci_device->class[2]],
+ sizeof(category_name[pci_device->class[2]]),
+ "%s", pci_device->dev_info->category_name);
+ }
+ }
+ /* Print the found items */
+ for (int i = 0; i < MAX_PCI_CLASSES; i++) {
+ if (strlen(category_name[i]) > 1) {
+ more_printf("%s : %s\n", category_name[i], modules[i]);
+ }
+ }
+}
+
+static void show_kernel_help()
+{
+ more_printf("Show supports the following commands : %s\n",
+ CLI_SHOW_LIST);
+}
+
+void kernel_show(char *item, struct s_hardware *hardware)
+{
+ if (!strncmp(item, CLI_SHOW_LIST, sizeof(CLI_SHOW_LIST) - 1)) {
+ show_kernel_modules(hardware);
+ return;
+ }
+ show_kernel_help();
+}
+
+void handle_kernel_commands(char *cli_line, struct s_hardware *hardware)
+{
+ if (!strncmp(cli_line, CLI_SHOW, sizeof(CLI_SHOW) - 1)) {
+ kernel_show(strstr(cli_line, "show") + sizeof(CLI_SHOW),
+ hardware);
+ return;
+ }
+}
diff --git a/com32/hdt/hdt-cli-pci.c b/com32/hdt/hdt-cli-pci.c
new file mode 100644
index 00000000..31cfe771
--- /dev/null
+++ b/com32/hdt/hdt-cli-pci.c
@@ -0,0 +1,308 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+
+#include "hdt-cli.h"
+#include "hdt-common.h"
+
+void show_pci_device(struct s_hardware *hardware, const char *item)
+{
+ int i = 0;
+ struct pci_device *pci_device = NULL, *temp_pci_device;
+ long pcidev = strtol(item, (char **)NULL, 10);
+ bool nopciids = false;
+ bool nomodulespcimap = false;
+ char kernel_modules[LINUX_KERNEL_MODULE_SIZE *
+ MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+ int bus = 0, slot = 0, func = 0;
+
+ if (errno == ERANGE) {
+ printf("This PCI device number is incorrect\n");
+ return;
+ }
+ if ((pcidev > hardware->nb_pci_devices) || (pcidev <= 0)) {
+ printf("PCI device %d doesn't exists\n", pcidev);
+ return;
+ }
+ if (hardware->pci_ids_return_code == -ENOPCIIDS) {
+ nopciids = true;
+ }
+ if (hardware->modules_pcimap_return_code == -ENOMODULESPCIMAP) {
+ nomodulespcimap = true;
+ }
+
+ for_each_pci_func(temp_pci_device, hardware->pci_domain) {
+ i++;
+ if (i == pcidev) {
+ bus = __pci_bus;
+ slot = __pci_slot;
+ func = __pci_func;
+ pci_device = temp_pci_device;
+ }
+ }
+
+ if (pci_device == NULL) {
+ printf("We were enabled to find PCI device %d\n", pcidev);
+ return;
+ }
+
+ memset(kernel_modules, 0, sizeof kernel_modules);
+ for (int kmod = 0;
+ kmod < pci_device->dev_info->linux_kernel_module_count; kmod++) {
+ if (kmod > 0) {
+ strncat(kernel_modules, " | ", 3);
+ }
+ strncat(kernel_modules,
+ pci_device->dev_info->linux_kernel_module[kmod],
+ LINUX_KERNEL_MODULE_SIZE - 1);
+ }
+ if (pci_device->dev_info->linux_kernel_module_count == 0)
+ strlcpy(kernel_modules, "unknown", 7);
+
+ clear_screen();
+ printf("PCI Device %d\n", pcidev);
+
+ if (nopciids == false) {
+ more_printf("Vendor Name : %s\n",
+ pci_device->dev_info->vendor_name);
+ more_printf("Product Name : %s\n",
+ pci_device->dev_info->product_name);
+ more_printf("Class Name : %s\n",
+ pci_device->dev_info->class_name);
+ }
+
+ if (nomodulespcimap == false) {
+ more_printf("Kernel module : %s\n", kernel_modules);
+ }
+
+ more_printf("Vendor ID : %04x\n", pci_device->vendor);
+ more_printf("Product ID : %04x\n", pci_device->product);
+ more_printf("SubVendor ID : %04x\n", pci_device->sub_vendor);
+ more_printf("SubProduct ID : %04x\n", pci_device->sub_product);
+ more_printf("Class ID : %02x.%02x.%02x\n", pci_device->class[2],
+ pci_device->class[1], pci_device->class[0]);
+ more_printf("Revision : %02x\n", pci_device->revision);
+ if ((pci_device->dev_info->irq > 0)
+ && (pci_device->dev_info->irq < 255))
+ more_printf("IRQ : %0d\n", pci_device->dev_info->irq);
+ more_printf("Latency : %0d\n",pci_device->dev_info->latency);
+ more_printf("PCI Bus : %02d\n", bus);
+ more_printf("PCI Slot : %02d\n", slot);
+ more_printf("PCI Func : %02d\n", func);
+
+ if (hardware->is_pxe_valid == true) {
+ more_printf("Mac Address : %s\n", hardware->pxe.mac_addr);
+ if ((hardware->pxe.pci_device != NULL)
+ && (hardware->pxe.pci_device == pci_device))
+ more_printf("PXE : Current boot device\n",
+ func);
+ }
+}
+
+static void show_pci_devices(struct s_hardware *hardware)
+{
+ int i = 1;
+ struct pci_device *pci_device;
+ char kernel_modules[LINUX_KERNEL_MODULE_SIZE *
+ MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+ bool nopciids = false;
+ bool nomodulespcimap = false;
+ char first_line[81];
+ char second_line[81];
+
+ clear_screen();
+ more_printf("%d PCI devices detected\n", hardware->nb_pci_devices);
+
+ if (hardware->pci_ids_return_code == -ENOPCIIDS) {
+ nopciids = true;
+ }
+ if (hardware->modules_pcimap_return_code == -ENOMODULESPCIMAP) {
+ nomodulespcimap = true;
+ }
+
+ /* For every detected pci device, compute its submenu */
+ for_each_pci_func(pci_device, hardware->pci_domain) {
+ memset(kernel_modules, 0, sizeof kernel_modules);
+ for (int kmod = 0;
+ kmod < pci_device->dev_info->linux_kernel_module_count;
+ kmod++) {
+ if (kmod > 0) {
+ strncat(kernel_modules, " | ", 3);
+ }
+ strncat(kernel_modules,
+ pci_device->dev_info->linux_kernel_module[kmod],
+ LINUX_KERNEL_MODULE_SIZE - 1);
+ }
+ if (pci_device->dev_info->linux_kernel_module_count == 0)
+ strlcpy(kernel_modules, "unknown", 7);
+
+ if (nopciids == false) {
+ snprintf(first_line, sizeof(first_line),
+ "%02d: %s %s \n", i,
+ pci_device->dev_info->vendor_name,
+ pci_device->dev_info->product_name);
+ if (nomodulespcimap == false)
+ snprintf(second_line, sizeof(second_line),
+ " # %-25s # Kmod: %s\n",
+ pci_device->dev_info->class_name,
+ kernel_modules);
+ else
+ snprintf(second_line, sizeof(second_line),
+ " # %-25s # ID:%04x:%04x[%04x:%04x]\n",
+ pci_device->dev_info->class_name,
+ pci_device->vendor,
+ pci_device->product,
+ pci_device->sub_vendor,
+ pci_device->sub_product);
+
+ more_printf(first_line);
+ more_printf(second_line);
+ more_printf("\n");
+ } else if (nopciids == true) {
+ if (nomodulespcimap == true) {
+ more_printf("%02d: %04x:%04x [%04x:%04x] \n",
+ i, pci_device->vendor,
+ pci_device->product,
+ pci_device->sub_vendor,
+ pci_device->sub_product);
+ } else {
+ more_printf
+ ("%02d: %04x:%04x [%04x:%04x] Kmod:%s\n", i,
+ pci_device->vendor, pci_device->product,
+ pci_device->sub_vendor,
+ pci_device->sub_product, kernel_modules,
+ pci_device->sub_product, kernel_modules);
+ }
+ }
+ i++;
+ }
+
+}
+
+static void show_pci_irq(struct s_hardware *hardware)
+{
+ struct pci_device *pci_device;
+ bool nopciids = false;
+
+ clear_screen();
+ more_printf("%d PCI devices detected\n", hardware->nb_pci_devices);
+ more_printf("IRQ : product\n");
+ more_printf("-------------\n");
+
+ if (hardware->pci_ids_return_code == -ENOPCIIDS) {
+ nopciids = true;
+ }
+
+ /* For every detected pci device, compute its submenu */
+ for_each_pci_func(pci_device, hardware->pci_domain) {
+ /* Only display valid IRQs */
+ if ((pci_device->dev_info->irq > 0) && (pci_device->dev_info->irq < 255)) {
+ if (nopciids == false) {
+ more_printf("%02d : %s %s \n",
+ pci_device->dev_info->irq,
+ pci_device->dev_info->vendor_name,
+ pci_device->dev_info->product_name);
+ } else {
+ more_printf("%02d : %04x:%04x [%04x:%04x] \n",
+ pci_device->dev_info->irq, pci_device->vendor,
+ pci_device->product,
+ pci_device->sub_vendor,
+ pci_device->sub_product);
+ }
+ }
+ }
+}
+
+static void show_pci_help()
+{
+ more_printf("Show supports the following commands : \n");
+ more_printf(" %s\n", CLI_SHOW_LIST);
+ more_printf(" %s <device_number>\n", CLI_PCI_DEVICE);
+ more_printf(" %s\n",CLI_IRQ);
+}
+
+static void pci_show(char *item, struct s_hardware *hardware)
+{
+ if (!strncmp(item, CLI_SHOW_LIST, sizeof(CLI_SHOW_LIST) - 1)) {
+ show_pci_devices(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_IRQ, sizeof(CLI_IRQ) - 1)) {
+ show_pci_irq(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_PCI_DEVICE, sizeof(CLI_PCI_DEVICE) - 1)) {
+ show_pci_device(hardware, item + sizeof(CLI_PCI_DEVICE) - 1);
+ return;
+ }
+ show_pci_help();
+}
+
+void handle_pci_commands(char *cli_line, struct s_hardware *hardware)
+{
+ if (!strncmp(cli_line, CLI_SHOW, sizeof(CLI_SHOW) - 1)) {
+ pci_show(strstr(cli_line, "show") + sizeof(CLI_SHOW), hardware);
+ return;
+ }
+}
+
+void cli_detect_pci(struct s_hardware *hardware)
+{
+ bool error = false;
+ if (hardware->pci_detection == false) {
+ detect_pci(hardware);
+ if (hardware->pci_ids_return_code == -ENOPCIIDS) {
+ more_printf
+ ("The pci.ids file is missing, device names can't be computed.\n");
+ more_printf("Please put one in same dir as hdt\n");
+ error = true;
+ }
+ if (hardware->modules_pcimap_return_code == -ENOMODULESPCIMAP) {
+ more_printf
+ ("The modules.pcimap file is missing, device names can't be computed.\n");
+ more_printf("Please put one in same dir as hdt\n");
+ error = true;
+ }
+ if (error == true) {
+ char tempbuf[10];
+ printf("Press enter to continue\n");
+ fgets(tempbuf, sizeof(tempbuf), stdin);
+ }
+ }
+}
+
+void main_show_pci(struct s_hardware *hardware)
+{
+ cli_detect_pci(hardware);
+
+ more_printf("PCI\n");
+ more_printf(" NB Devices : %d\n", hardware->nb_pci_devices);
+}
diff --git a/com32/hdt/hdt-cli-pxe.c b/com32/hdt/hdt-cli-pxe.c
new file mode 100644
index 00000000..772c0dfd
--- /dev/null
+++ b/com32/hdt/hdt-cli-pxe.c
@@ -0,0 +1,100 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <syslinux/pxe.h>
+#include <syslinux/config.h>
+
+#include "hdt-cli.h"
+#include "hdt-common.h"
+
+void main_show_pxe(struct s_hardware *hardware)
+{
+ char buffer[81];
+ memset(buffer, 0, sizeof(81));
+ if (hardware->sv->filesystem != SYSLINUX_FS_PXELINUX) {
+ more_printf("You are not currently using PXELINUX\n");
+ return;
+ }
+
+ detect_pxe(hardware);
+ more_printf("PXE\n");
+ if (hardware->is_pxe_valid == false) {
+ more_printf(" No valid PXE ROM found\n");
+ return;
+ }
+
+ struct s_pxe *p = &hardware->pxe;
+ more_printf(" PCI device no: %d \n", p->pci_device_pos);
+
+ if (hardware->pci_ids_return_code == -ENOPCIIDS) {
+ snprintf(buffer, sizeof(buffer),
+ " PCI ID : %04x:%04x[%04x:%04X] rev(%02x)\n",
+ p->vendor_id, p->product_id, p->subvendor_id,
+ p->subproduct_id, p->rev);
+ snprintf(buffer, sizeof(buffer),
+ " PCI Bus pos. : %02x:%02x.%02x\n", p->pci_bus,
+ p->pci_dev, p->pci_func);
+ more_printf(buffer);
+ } else {
+ snprintf(buffer, sizeof(buffer), " Manufacturer : %s \n",
+ p->pci_device->dev_info->vendor_name);
+ more_printf(buffer);
+ snprintf(buffer, sizeof(buffer), " Product : %s \n",
+ p->pci_device->dev_info->product_name);
+ more_printf(buffer);
+ }
+ more_printf(" Addresses : %d.%d.%d.%d @ %s\n", p->ip_addr[0],
+ p->ip_addr[1], p->ip_addr[2], p->ip_addr[3], p->mac_addr);
+}
+
+static void show_pxe_help()
+{
+ more_printf("Show supports the following commands : %s\n",
+ CLI_SHOW_LIST);
+}
+
+static void pxe_show(char *item, struct s_hardware *hardware)
+{
+ if (!strncmp(item, CLI_SHOW_LIST, sizeof(CLI_SHOW_LIST) - 1)) {
+ main_show_pxe(hardware);
+ return;
+ }
+ show_pxe_help();
+}
+
+void handle_pxe_commands(char *cli_line, struct s_hardware *hardware)
+{
+ if (!strncmp(cli_line, CLI_SHOW, sizeof(CLI_SHOW) - 1)) {
+ pxe_show(strstr(cli_line, "show") + sizeof(CLI_SHOW), hardware);
+ return;
+ }
+}
diff --git a/com32/hdt/hdt-cli-syslinux.c b/com32/hdt/hdt-cli-syslinux.c
new file mode 100644
index 00000000..77a44f31
--- /dev/null
+++ b/com32/hdt/hdt-cli-syslinux.c
@@ -0,0 +1,71 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <syslinux/pxe.h>
+#include <syslinux/config.h>
+
+#include "hdt-cli.h"
+#include "hdt-common.h"
+
+void main_show_syslinux(struct s_hardware *hardware)
+{
+ more_printf("SYSLINUX\n");
+ more_printf(" Bootloader : %s\n", hardware->syslinux_fs);
+ more_printf(" Version : %s\n", hardware->sv->version_string + 2);
+ more_printf(" Version : %u\n", hardware->sv->version);
+ more_printf(" Max API : %u\n", hardware->sv->max_api);
+ more_printf(" Copyright : %s\n", hardware->sv->copyright_string + 1);
+}
+
+static void show_syslinux_help()
+{
+ more_printf("Show supports the following commands : %s\n",
+ CLI_SHOW_LIST);
+}
+
+static void syslinux_show(char *item, struct s_hardware *hardware)
+{
+ if (!strncmp(item, CLI_SHOW_LIST, sizeof(CLI_SHOW_LIST) - 1)) {
+ main_show_syslinux(hardware);
+ return;
+ }
+ show_syslinux_help();
+}
+
+void handle_syslinux_commands(char *cli_line, struct s_hardware *hardware)
+{
+ if (!strncmp(cli_line, CLI_SHOW, sizeof(CLI_SHOW) - 1)) {
+ syslinux_show(strstr(cli_line, "show") + sizeof(CLI_SHOW),
+ hardware);
+ return;
+ }
+}
diff --git a/com32/hdt/hdt-cli-vesa.c b/com32/hdt/hdt-cli-vesa.c
new file mode 100644
index 00000000..507a3abf
--- /dev/null
+++ b/com32/hdt/hdt-cli-vesa.c
@@ -0,0 +1,91 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+*/
+
+#include "hdt-cli.h"
+#include "hdt-common.h"
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+
+void main_show_vesa(struct s_hardware *hardware) {
+ detect_vesa(hardware);
+ if (hardware->is_vesa_valid==false) {
+ more_printf("No VESA BIOS detected\n");
+ return;
+ }
+ more_printf("VESA\n");
+ more_printf(" Vesa version : %d.%d\n",hardware->vesa.major_version, hardware->vesa.minor_version);
+ more_printf(" Vendor : %s\n",hardware->vesa.vendor);
+ more_printf(" Product : %s\n",hardware->vesa.product);
+ more_printf(" Product rev. : %s\n",hardware->vesa.product_revision);
+ more_printf(" Software rev.: %s\n",hardware->vesa.software_rev);
+ more_printf(" Memory (KB) : %d\n",hardware->vesa.total_memory*64);
+ more_printf(" Modes : %d\n",hardware->vesa.vmi_count);
+}
+
+void show_vesa_modes(struct s_hardware *hardware) {
+ detect_vesa(hardware);
+ if (hardware->is_vesa_valid==false) {
+ more_printf("No VESA BIOS detected\n");
+ return;
+ }
+ clear_screen();
+ more_printf(" ResH. x ResV x Bits : vga= : Vesa Mode\n",hardware->vesa.vmi_count);
+ more_printf("----------------------------------------\n",hardware->vesa.vmi_count);
+
+ for (int i=0;i<hardware->vesa.vmi_count;i++) {
+ struct vesa_mode_info *mi=&hardware->vesa.vmi[i].mi;
+ more_printf("%5u %5u %3u %3d 0x%04x\n",
+ mi->h_res, mi->v_res, mi->bpp, hardware->vesa.vmi[i].mode+0x200,hardware->vesa.vmi[i].mode);
+ }
+}
+
+void show_vesa_help() {
+ more_printf("Show supports the following commands : %s %s\n",CLI_SHOW_LIST, CLI_MODES);
+}
+
+void vesa_show(char *item, struct s_hardware *hardware) {
+ if ( !strncmp(item, CLI_SHOW_LIST, sizeof(CLI_SHOW_LIST) - 1) ) {
+ main_show_vesa(hardware);
+ return;
+ }
+ if ( !strncmp(item, CLI_MODES, sizeof(CLI_MODES) - 1) ) {
+ show_vesa_modes(hardware);
+ return;
+ }
+ show_vesa_help();
+}
+
+void handle_vesa_commands(char *cli_line, struct s_hardware *hardware) {
+ if ( !strncmp(cli_line, CLI_SHOW, sizeof(CLI_SHOW) - 1) ) {
+ vesa_show(strstr(cli_line,"show")+ sizeof(CLI_SHOW), hardware);
+ return;
+ }
+}
+
diff --git a/com32/hdt/hdt-cli.c b/com32/hdt/hdt-cli.c
new file mode 100644
index 00000000..7c1dc79c
--- /dev/null
+++ b/com32/hdt/hdt-cli.c
@@ -0,0 +1,336 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <syslinux/config.h>
+
+#include "hdt-cli.h"
+#include "hdt-common.h"
+
+static void set_mode(struct s_cli_mode *cli_mode, cli_mode_t mode,
+ struct s_hardware *hardware)
+{
+ switch (mode) {
+ case EXIT_MODE:
+ cli_mode->mode = mode;
+ snprintf(cli_mode->prompt, sizeof(cli_mode->prompt), "%s> ",
+ CLI_EXIT);
+ break;
+
+ case HDT_MODE:
+ cli_mode->mode = mode;
+ snprintf(cli_mode->prompt, sizeof(cli_mode->prompt), "%s> ",
+ CLI_HDT);
+ break;
+
+ case PXE_MODE:
+ if (hardware->sv->filesystem != SYSLINUX_FS_PXELINUX) {
+ more_printf("You are not currently using PXELINUX\n");
+ break;
+ }
+ cli_mode->mode = mode;
+ snprintf(cli_mode->prompt, sizeof(cli_mode->prompt), "%s> ",
+ CLI_PXE);
+ break;
+
+ case KERNEL_MODE:
+ detect_pci(hardware);
+ cli_mode->mode = mode;
+ snprintf(cli_mode->prompt, sizeof(cli_mode->prompt), "%s> ",
+ CLI_KERNEL);
+ break;
+
+ case SYSLINUX_MODE:
+ cli_mode->mode = mode;
+ snprintf(cli_mode->prompt, sizeof(cli_mode->prompt), "%s> ",
+ CLI_SYSLINUX);
+ break;
+
+ case VESA_MODE:
+ cli_mode->mode=mode;
+ snprintf(cli_mode->prompt, sizeof(cli_mode->prompt), "%s> ", CLI_VESA);
+ break;
+
+ case PCI_MODE:
+ cli_mode->mode = mode;
+ snprintf(cli_mode->prompt, sizeof(cli_mode->prompt), "%s> ",
+ CLI_PCI);
+ if (!hardware->pci_detection)
+ cli_detect_pci(hardware);
+ break;
+
+ case CPU_MODE:
+ cli_mode->mode = mode;
+ snprintf(cli_mode->prompt, sizeof(cli_mode->prompt), "%s> ",
+ CLI_CPU);
+ if (!hardware->dmi_detection)
+ detect_dmi(hardware);
+ if (!hardware->cpu_detection)
+ cpu_detect(hardware);
+ break;
+
+ case DMI_MODE:
+ detect_dmi(hardware);
+ if (!hardware->is_dmi_valid) {
+ printf("No valid DMI table found, exiting.\n");
+ break;
+ }
+ cli_mode->mode = mode;
+ snprintf(cli_mode->prompt, sizeof(cli_mode->prompt), "%s> ",
+ CLI_DMI);
+ break;
+ }
+}
+
+static void handle_hdt_commands(char *cli_line, struct s_hardware *hardware)
+{
+ /* hdt cli mode specific commands */
+ if (!strncmp(cli_line, CLI_SHOW, sizeof(CLI_SHOW) - 1)) {
+ main_show(strstr(cli_line, "show") + sizeof(CLI_SHOW), hardware);
+ return;
+ }
+}
+
+static void show_cli_help(struct s_cli_mode *cli_mode)
+{
+ switch (cli_mode->mode) {
+ case HDT_MODE:
+ printf
+ ("Available commands are : %s %s %s %s %s %s %s %s %s %s\n",
+ CLI_CLEAR, CLI_EXIT, CLI_HELP, CLI_SHOW, CLI_PCI, CLI_DMI,
+ CLI_PXE, CLI_KERNEL, CLI_CPU, CLI_SYSLINUX);
+ break;
+ case SYSLINUX_MODE:
+ case KERNEL_MODE:
+ case PXE_MODE:
+ case VESA_MODE:
+ case CPU_MODE:
+ case PCI_MODE:
+ case DMI_MODE:
+ printf("Available commands are : %s %s %s %s\n",
+ CLI_CLEAR, CLI_EXIT, CLI_HELP, CLI_SHOW);
+ break;
+ case EXIT_MODE: /* Should not happen */
+ break;
+ }
+}
+
+/* Code that manages the cli mode */
+void start_cli_mode(struct s_hardware *hardware)
+{
+ char cli_line[256];
+ struct s_cli_mode cli_mode;
+
+ set_mode(&cli_mode, HDT_MODE, hardware);
+
+ printf("Entering CLI mode\n");
+
+ for (;;) {
+ memset(cli_line, 0, sizeof cli_line);
+ printf("%s", cli_mode.prompt);
+
+ fgets(cli_line, sizeof cli_line, stdin);
+ /* We use sizeof BLAH - 1 to remove the last \0 */
+ cli_line[strlen(cli_line) - 1] = '\0';
+
+ if (!strncmp(cli_line, CLI_EXIT, sizeof(CLI_EXIT) - 1)) {
+ int mode = do_exit(&cli_mode);
+ if (mode == EXIT_MODE)
+ return;
+ set_mode(&cli_mode, mode, hardware);
+ continue;
+ }
+
+ if (!strncmp(cli_line, CLI_HELP, sizeof(CLI_HELP) - 1)) {
+ show_cli_help(&cli_mode);
+ continue;
+ }
+ if (!strncmp(cli_line, CLI_PCI, sizeof(CLI_PCI) - 1)) {
+ set_mode(&cli_mode, PCI_MODE, hardware);
+ continue;
+ }
+ if (!strncmp(cli_line, CLI_CLEAR, sizeof(CLI_CLEAR) - 1)) {
+ clear_screen();
+ continue;
+ }
+ if (!strncmp(cli_line, CLI_CPU, sizeof(CLI_CPU) - 1)) {
+ set_mode(&cli_mode, CPU_MODE, hardware);
+ continue;
+ }
+ if (!strncmp(cli_line, CLI_DMI, sizeof(CLI_DMI) - 1)) {
+ set_mode(&cli_mode, DMI_MODE, hardware);
+ continue;
+ }
+ if (!strncmp(cli_line, CLI_PXE, sizeof(CLI_PXE) - 1)) {
+ set_mode(&cli_mode, PXE_MODE, hardware);
+ continue;
+ }
+ if (!strncmp(cli_line, CLI_KERNEL, sizeof(CLI_KERNEL) - 1)) {
+ set_mode(&cli_mode, KERNEL_MODE, hardware);
+ continue;
+ }
+ if (!strncmp(cli_line, CLI_SYSLINUX, sizeof(CLI_SYSLINUX) - 1)) {
+ set_mode(&cli_mode, SYSLINUX_MODE, hardware);
+ continue;
+ }
+ if ( !strncmp(cli_line, CLI_VESA, sizeof(CLI_VESA) - 1) ) {
+ set_mode(&cli_mode,VESA_MODE,hardware);
+ continue;
+ }
+
+ /*
+ * All commands before that line are common for all cli modes.
+ * The following will be specific for every mode.
+ */
+ switch (cli_mode.mode) {
+ case DMI_MODE:
+ handle_dmi_commands(cli_line, hardware);
+ break;
+ case PCI_MODE:
+ handle_pci_commands(cli_line, hardware);
+ break;
+ case HDT_MODE:
+ handle_hdt_commands(cli_line, hardware);
+ break;
+ case CPU_MODE:
+ handle_cpu_commands(cli_line, hardware);
+ break;
+ case PXE_MODE:
+ handle_pxe_commands(cli_line, hardware);
+ break;
+ case VESA_MODE:
+ handle_vesa_commands(cli_line, hardware);
+ break;
+ case SYSLINUX_MODE:
+ handle_syslinux_commands(cli_line, hardware);
+ break;
+ case KERNEL_MODE:
+ handle_kernel_commands(cli_line, hardware);
+ break;
+ case EXIT_MODE:
+ break; /* should not happen */
+ }
+ }
+}
+
+int do_exit(struct s_cli_mode *cli_mode)
+{
+ switch (cli_mode->mode) {
+ case HDT_MODE:
+ return EXIT_MODE;
+ case KERNEL_MODE:
+ case PXE_MODE:
+ case SYSLINUX_MODE:
+ case PCI_MODE:
+ case DMI_MODE:
+ case VESA_MODE:
+ case CPU_MODE:
+ return HDT_MODE;
+ case EXIT_MODE:
+ return EXIT_MODE; /* should not happen */
+ }
+ return HDT_MODE;
+}
+
+static void main_show_summary(struct s_hardware *hardware)
+{
+ detect_pci(hardware); /* pxe is detected in the pci */
+ detect_dmi(hardware);
+ cpu_detect(hardware);
+ clear_screen();
+ main_show_cpu(hardware);
+ if (hardware->is_dmi_valid) {
+ more_printf("System\n");
+ more_printf(" Manufacturer : %s\n",
+ hardware->dmi.system.manufacturer);
+ more_printf(" Product Name : %s\n",
+ hardware->dmi.system.product_name);
+ more_printf(" Serial : %s\n",
+ hardware->dmi.system.serial);
+ more_printf("Bios\n");
+ more_printf(" Version : %s\n", hardware->dmi.bios.version);
+ more_printf(" Release : %s\n",
+ hardware->dmi.bios.release_date);
+ show_dmi_memory_modules(hardware, false, false);
+ }
+ main_show_pci(hardware);
+
+ if (hardware->is_pxe_valid)
+ main_show_pxe(hardware);
+
+ main_show_kernel(hardware);
+}
+
+void show_main_help(struct s_hardware *hardware)
+{
+ more_printf("Show supports the following commands : \n");
+ more_printf(" %s\n", CLI_SUMMARY);
+ more_printf(" %s\n", CLI_PCI);
+ more_printf(" %s\n", CLI_DMI);
+ more_printf(" %s\n", CLI_CPU);
+ more_printf(" %s\n", CLI_KERNEL);
+ more_printf(" %s\n", CLI_SYSLINUX);
+ more_printf(" %s\n", CLI_VESA);
+ if (hardware->sv->filesystem == SYSLINUX_FS_PXELINUX)
+ more_printf(" %s\n", CLI_PXE);
+}
+
+void main_show(char *item, struct s_hardware *hardware)
+{
+ if (!strncmp(item, CLI_SUMMARY, sizeof(CLI_SUMMARY))) {
+ main_show_summary(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_PCI, sizeof(CLI_PCI))) {
+ main_show_pci(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_DMI, sizeof(CLI_DMI))) {
+ main_show_dmi(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_CPU, sizeof(CLI_CPU))) {
+ main_show_cpu(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_PXE, sizeof(CLI_PXE))) {
+ main_show_pxe(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_SYSLINUX, sizeof(CLI_SYSLINUX))) {
+ main_show_syslinux(hardware);
+ return;
+ }
+ if (!strncmp(item, CLI_KERNEL, sizeof(CLI_KERNEL))) {
+ main_show_kernel(hardware);
+ return;
+ }
+
+ show_main_help(hardware);
+}
diff --git a/com32/hdt/hdt-cli.h b/com32/hdt/hdt-cli.h
new file mode 100644
index 00000000..72e46a36
--- /dev/null
+++ b/com32/hdt/hdt-cli.h
@@ -0,0 +1,113 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#ifndef DEFINE_HDT_CLI_H
+#define DEFINE_HDT_CLI_H
+#include <stdio.h>
+
+#include "hdt-common.h"
+
+#define CLI_CLEAR "clear"
+#define CLI_EXIT "exit"
+#define CLI_HELP "help"
+#define CLI_SHOW "show"
+#define CLI_HDT "hdt"
+#define CLI_PCI "pci"
+#define CLI_PXE "pxe"
+#define CLI_KERNEL "kernel"
+#define CLI_SYSLINUX "syslinux"
+#define CLI_VESA "vesa"
+#define CLI_SUMMARY "summary"
+#define CLI_COMMANDS "commands"
+#define CLI_DMI "dmi"
+#define CLI_CPU "cpu"
+#define CLI_SHOW_LIST "list"
+#define CLI_IRQ "irq"
+#define CLI_MODES "modes"
+
+typedef enum {
+ EXIT_MODE,
+ HDT_MODE,
+ PCI_MODE,
+ DMI_MODE,
+ CPU_MODE,
+ PXE_MODE,
+ KERNEL_MODE,
+ SYSLINUX_MODE,
+ VESA_MODE,
+} cli_mode_t;
+
+struct s_cli_mode {
+ cli_mode_t mode;
+ char prompt[32];
+};
+
+void start_cli_mode(struct s_hardware *hardware);
+void main_show(char *item, struct s_hardware *hardware);
+int do_exit(struct s_cli_mode *cli_mode);
+
+// DMI STUFF
+#define CLI_DMI_BASE_BOARD "base_board"
+#define CLI_DMI_BATTERY "battery"
+#define CLI_DMI_BIOS "bios"
+#define CLI_DMI_CHASSIS "chassis"
+#define CLI_DMI_MEMORY "memory"
+#define CLI_DMI_MEMORY_BANK "bank"
+#define CLI_DMI_PROCESSOR "cpu"
+#define CLI_DMI_SYSTEM "system"
+void main_show_dmi(struct s_hardware *hardware);
+void handle_dmi_commands(char *cli_line, struct s_hardware *hardware);
+void show_dmi_memory_modules(struct s_hardware *hardware, bool clearscreen,
+ bool show_free_banks);
+
+// PCI STUFF
+#define CLI_PCI_DEVICE "device"
+void main_show_pci(struct s_hardware *hardware);
+void handle_pci_commands(char *cli_line, struct s_hardware *hardware);
+void cli_detect_pci(struct s_hardware *hardware);
+
+// CPU STUFF
+void main_show_cpu(struct s_hardware *hardware);
+void handle_cpu_commands(char *cli_line, struct s_hardware *hardware);
+
+// PXE STUFF
+void main_show_pxe(struct s_hardware *hardware);
+void handle_pxe_commands(char *cli_line, struct s_hardware *hardware);
+
+// KERNEL STUFF
+void main_show_kernel(struct s_hardware *hardware);
+void handle_kernel_commands(char *cli_line, struct s_hardware *hardware);
+
+// SYSLINUX STUFF
+void main_show_syslinux(struct s_hardware *hardware);
+void handle_syslinux_commands(char *cli_line, struct s_hardware *hardware);
+
+// VESA STUFF
+void main_show_vesa(struct s_hardware *hardware);
+void handle_vesa_commands(char *cli_line, struct s_hardware *hardware);
+#endif
diff --git a/com32/hdt/hdt-common.c b/com32/hdt/hdt-common.c
new file mode 100644
index 00000000..fb0c4c9e
--- /dev/null
+++ b/com32/hdt/hdt-common.c
@@ -0,0 +1,393 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+*/
+
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include "syslinux/config.h"
+#include "../lib/sys/vesa/vesa.h"
+
+#include "hdt-common.h"
+
+void detect_parameters(const int argc, const char *argv[],
+ struct s_hardware *hardware)
+{
+ for (int i = 1; i < argc; i++) {
+ if (!strncmp(argv[i], "modules=", 8)) {
+ strncpy(hardware->modules_pcimap_path, argv[i] + 8,
+ sizeof(hardware->modules_pcimap_path));
+ } else if (!strncmp(argv[i], "pciids=", 7)) {
+ strncpy(hardware->pciids_path, argv[i] + 7,
+ sizeof(hardware->pciids_path));
+ }
+ }
+}
+
+void detect_syslinux(struct s_hardware *hardware)
+{
+ hardware->sv = syslinux_version();
+ switch (hardware->sv->filesystem) {
+ case SYSLINUX_FS_SYSLINUX:
+ strlcpy(hardware->syslinux_fs, "SYSlinux", 9);
+ break;
+ case SYSLINUX_FS_PXELINUX:
+ strlcpy(hardware->syslinux_fs, "PXElinux", 9);
+ break;
+ case SYSLINUX_FS_ISOLINUX:
+ strlcpy(hardware->syslinux_fs, "ISOlinux", 9);
+ break;
+ case SYSLINUX_FS_EXTLINUX:
+ strlcpy(hardware->syslinux_fs, "EXTlinux", 9);
+ break;
+ case SYSLINUX_FS_UNKNOWN:
+ default:
+ strlcpy(hardware->syslinux_fs, "Unknown Bootloader",
+ sizeof hardware->syslinux_fs);
+ break;
+ }
+}
+
+void init_hardware(struct s_hardware *hardware)
+{
+ hardware->pci_ids_return_code = 0;
+ hardware->modules_pcimap_return_code = 0;
+ hardware->cpu_detection = false;
+ hardware->pci_detection = false;
+ hardware->disk_detection = false;
+ hardware->dmi_detection = false;
+ hardware->pxe_detection = false;
+ hardware->vesa_detection = false;
+ hardware->nb_pci_devices = 0;
+ hardware->is_dmi_valid = false;
+ hardware->is_pxe_valid = false;
+ hardware->pci_domain = NULL;
+
+ /* Cleaning structures */
+ memset(hardware->disk_info, 0, sizeof(hardware->disk_info));
+ memset(&hardware->dmi, 0, sizeof(s_dmi));
+ memset(&hardware->cpu, 0, sizeof(s_cpu));
+ memset(&hardware->pxe, 0, sizeof(struct s_pxe));
+ memset(&hardware->vesa, 0, sizeof(struct s_pxe));
+ memset(hardware->syslinux_fs, 0, sizeof hardware->syslinux_fs);
+ memset(hardware->pciids_path, 0, sizeof hardware->pciids_path);
+ memset(hardware->modules_pcimap_path, 0,
+ sizeof hardware->modules_pcimap_path);
+ strcat(hardware->pciids_path, "pci.ids");
+ strcat(hardware->modules_pcimap_path, "modules.pcimap");
+}
+
+/*
+ * Detecting if a DMI table exist
+ * if yes, let's parse it
+ */
+int detect_dmi(struct s_hardware *hardware)
+{
+ if (hardware->dmi_detection == true)
+ return -1;
+ hardware->dmi_detection = true;
+ if (dmi_iterate(&hardware->dmi) == -ENODMITABLE) {
+ hardware->is_dmi_valid = false;
+ return -ENODMITABLE;
+ }
+
+ parse_dmitable(&hardware->dmi);
+ hardware->is_dmi_valid = true;
+ return 0;
+}
+
+/* Detection vesa stuff*/
+int detect_vesa(struct s_hardware *hardware) {
+ static com32sys_t rm;
+ struct vesa_general_info *gi;
+ struct vesa_mode_info *mi;
+ uint16_t mode, *mode_ptr;
+ char *oem_ptr;
+
+ if (hardware->vesa_detection == true) return -1;
+
+ hardware->vesa_detection=true;
+ hardware->is_vesa_valid=false;
+
+ /* Allocate space in the bounce buffer for these structures */
+ gi = &((struct vesa_info *)__com32.cs_bounce)->gi;
+ mi = &((struct vesa_info *)__com32.cs_bounce)->mi;
+
+ gi->signature = VBE2_MAGIC; /* Get VBE2 extended data */
+ rm.eax.w[0] = 0x4F00; /* Get SVGA general information */
+ rm.edi.w[0] = OFFS(gi);
+ rm.es = SEG(gi);
+ __intcall(0x10, &rm, &rm);
+
+ if ( rm.eax.w[0] != 0x004F ) {
+ return -1;
+ };
+
+ mode_ptr = GET_PTR(gi->video_mode_ptr);
+ oem_ptr = GET_PTR(gi->oem_vendor_name_ptr);
+ strncpy(hardware->vesa.vendor,oem_ptr,sizeof(hardware->vesa.vendor));
+ oem_ptr = GET_PTR(gi->oem_product_name_ptr);
+ strncpy(hardware->vesa.product,oem_ptr,sizeof(hardware->vesa.product));
+ oem_ptr = GET_PTR(gi->oem_product_rev_ptr);
+ strncpy(hardware->vesa.product_revision,oem_ptr,sizeof(hardware->vesa.product_revision));
+
+ hardware->vesa.major_version=(gi->version >> 8) & 0xff;
+ hardware->vesa.minor_version=gi->version & 0xff;
+ hardware->vesa.total_memory=gi->total_memory;
+ hardware->vesa.software_rev=gi->oem_software_rev;
+
+ hardware->vesa.vmi_count=0;
+
+ while ((mode = *mode_ptr++) != 0xFFFF) {
+
+ rm.eax.w[0] = 0x4F01; /* Get SVGA mode information */
+ rm.ecx.w[0] = mode;
+ rm.edi.w[0] = OFFS(mi);
+ rm.es = SEG(mi);
+ __intcall(0x10, &rm, &rm);
+
+ /* Must be a supported mode */
+ if ( rm.eax.w[0] != 0x004f )
+ continue;
+
+ /* Saving detected values*/
+ memcpy(&hardware->vesa.vmi[hardware->vesa.vmi_count].mi, mi,
+ sizeof(struct vesa_mode_info));
+ hardware->vesa.vmi[hardware->vesa.vmi_count].mode = mode;
+
+ hardware->vesa.vmi_count++;
+ }
+ hardware->is_vesa_valid = true;
+ return 0;
+}
+
+/* Try to detect disks from port 0x80 to 0xff */
+void detect_disks(struct s_hardware *hardware)
+{
+ hardware->disk_detection = true;
+ for (int drive = 0x80; drive < 0xff; drive++) {
+ if (get_disk_params(drive, hardware->disk_info) != 0)
+ continue;
+ struct diskinfo *d = &hardware->disk_info[drive];
+ printf
+ (" DISK 0x%X: %s : %s %s: sectors=%d, s/t=%d head=%d : EDD=%s\n",
+ drive, d->aid.model, d->host_bus_type, d->interface_type,
+ d->sectors, d->sectors_per_track, d->heads,
+ d->edd_version);
+ }
+}
+
+int detect_pxe(struct s_hardware *hardware)
+{
+ void *dhcpdata;
+
+ size_t dhcplen;
+ t_PXENV_UNDI_GET_NIC_TYPE gnt;
+
+ if (hardware->pxe_detection == true)
+ return -1;
+ hardware->pxe_detection = true;
+ hardware->is_pxe_valid = false;
+ memset(&gnt, 0, sizeof(t_PXENV_UNDI_GET_NIC_TYPE));
+ memset(&hardware->pxe, 0, sizeof(struct s_pxe));
+
+ /* This code can only work if pxelinux is loaded */
+ if (hardware->sv->filesystem != SYSLINUX_FS_PXELINUX) {
+ return -1;
+ }
+// printf("PXE: PXElinux detected\n");
+ if (!pxe_get_cached_info
+ (PXENV_PACKET_TYPE_DHCP_ACK, &dhcpdata, &dhcplen)) {
+ pxe_bootp_t *dhcp = &hardware->pxe.dhcpdata;
+ memcpy(&hardware->pxe.dhcpdata, dhcpdata,
+ sizeof(hardware->pxe.dhcpdata));
+ snprintf(hardware->pxe.mac_addr, sizeof(hardware->pxe.mac_addr),
+ "%02x:%02x:%02x:%02x:%02x:%02x", dhcp->CAddr[0],
+ dhcp->CAddr[1], dhcp->CAddr[2], dhcp->CAddr[3],
+ dhcp->CAddr[4], dhcp->CAddr[5]);
+
+ /* Saving our IP address in a easy format */
+ hardware->pxe.ip_addr[0] = hardware->pxe.dhcpdata.yip & 0xff;
+ hardware->pxe.ip_addr[1] =
+ hardware->pxe.dhcpdata.yip >> 8 & 0xff;
+ hardware->pxe.ip_addr[2] =
+ hardware->pxe.dhcpdata.yip >> 16 & 0xff;
+ hardware->pxe.ip_addr[3] =
+ hardware->pxe.dhcpdata.yip >> 24 & 0xff;
+
+ if (!pxe_get_nic_type(&gnt)) {
+ switch (gnt.NicType) {
+ case PCI_NIC:
+ hardware->is_pxe_valid = true;
+ hardware->pxe.vendor_id =
+ gnt.info.pci.Vendor_ID;
+ hardware->pxe.product_id = gnt.info.pci.Dev_ID;
+ hardware->pxe.subvendor_id =
+ gnt.info.pci.SubVendor_ID;
+ hardware->pxe.subproduct_id =
+ gnt.info.pci.SubDevice_ID,
+ hardware->pxe.rev = gnt.info.pci.Rev;
+ hardware->pxe.pci_bus =
+ (gnt.info.pci.BusDevFunc >> 8) & 0xff;
+ hardware->pxe.pci_dev =
+ (gnt.info.pci.BusDevFunc >> 3) & 0x7;
+ hardware->pxe.pci_func =
+ gnt.info.pci.BusDevFunc & 0x03;
+ hardware->pxe.base_class =
+ gnt.info.pci.Base_Class;
+ hardware->pxe.sub_class =
+ gnt.info.pci.Sub_Class;
+ hardware->pxe.prog_intf =
+ gnt.info.pci.Prog_Intf;
+ hardware->pxe.nictype = gnt.NicType;
+ break;
+ case CardBus_NIC:
+ hardware->is_pxe_valid = true;
+ hardware->pxe.vendor_id =
+ gnt.info.cardbus.Vendor_ID;
+ hardware->pxe.product_id =
+ gnt.info.cardbus.Dev_ID;
+ hardware->pxe.subvendor_id =
+ gnt.info.cardbus.SubVendor_ID;
+ hardware->pxe.subproduct_id =
+ gnt.info.cardbus.SubDevice_ID,
+ hardware->pxe.rev = gnt.info.cardbus.Rev;
+ hardware->pxe.pci_bus =
+ (gnt.info.cardbus.BusDevFunc >> 8) & 0xff;
+ hardware->pxe.pci_dev =
+ (gnt.info.cardbus.BusDevFunc >> 3) & 0x7;
+ hardware->pxe.pci_func =
+ gnt.info.cardbus.BusDevFunc & 0x03;
+ hardware->pxe.base_class =
+ gnt.info.cardbus.Base_Class;
+ hardware->pxe.sub_class =
+ gnt.info.cardbus.Sub_Class;
+ hardware->pxe.prog_intf =
+ gnt.info.cardbus.Prog_Intf;
+ hardware->pxe.nictype = gnt.NicType;
+ break;
+ case PnP_NIC:
+ default:
+ return -1;
+ break;
+ }
+ /* Let's try to find the associated pci device */
+ detect_pci(hardware);
+ hardware->pxe.pci_device = NULL;
+ hardware->pxe.pci_device_pos = 0;
+ struct pci_device *pci_device;
+ int pci_number = 0;
+ for_each_pci_func(pci_device, hardware->pci_domain) {
+ pci_number++;
+ if ((__pci_bus == hardware->pxe.pci_bus) &&
+ (__pci_slot == hardware->pxe.pci_dev) &&
+ (__pci_func == hardware->pxe.pci_func) &&
+ (pci_device->vendor ==
+ hardware->pxe.vendor_id)
+ && (pci_device->product ==
+ hardware->pxe.product_id)) {
+ hardware->pxe.pci_device = pci_device;
+ hardware->pxe.pci_device_pos =
+ pci_number;
+ }
+ }
+ }
+ }
+ return 0;
+}
+
+void detect_pci(struct s_hardware *hardware)
+{
+ if (hardware->pci_detection == true)
+ return;
+ hardware->pci_detection = true;
+
+ /* Scanning to detect pci buses and devices */
+ hardware->pci_domain = pci_scan();
+
+ /* Gathering addtional information*/
+ gather_additional_pci_config(hardware->pci_domain);
+
+ hardware->nb_pci_devices = 0;
+ struct pci_device *pci_device;
+ for_each_pci_func(pci_device, hardware->pci_domain) {
+ hardware->nb_pci_devices++;
+ }
+
+ printf("PCI: %d devices detected\n", hardware->nb_pci_devices);
+ printf("PCI: Resolving names\n");
+ /* Assigning product & vendor name for each device */
+ hardware->pci_ids_return_code =
+ get_name_from_pci_ids(hardware->pci_domain, hardware->pciids_path);
+
+ printf("PCI: Resolving class names\n");
+ /* Assigning class name for each device */
+ hardware->pci_ids_return_code =
+ get_class_name_from_pci_ids(hardware->pci_domain,
+ hardware->pciids_path);
+
+ printf("PCI: Resolving module names\n");
+ /* Detecting which kernel module should match each device */
+ hardware->modules_pcimap_return_code =
+ get_module_name_from_pci_ids(hardware->pci_domain,
+ hardware->modules_pcimap_path);
+
+ /* We try to detect the pxe stuff to populate the PXE: field of pci devices */
+ detect_pxe(hardware);
+}
+
+void cpu_detect(struct s_hardware *hardware)
+{
+ if (hardware->cpu_detection == true)
+ return;
+ detect_cpu(&hardware->cpu);
+ hardware->cpu_detection = true;
+}
+
+/*
+ * Find the last instance of a particular command line argument
+ * (which should include the final =; do not use for boolean arguments)
+ */
+const char *find_argument(const char **argv, const char *argument)
+{
+ int la = strlen(argument);
+ const char **arg;
+ const char *ptr = NULL;
+
+ for (arg = argv; *arg; arg++) {
+ if (!memcmp(*arg, argument, la))
+ ptr = *arg + la;
+ }
+
+ return ptr;
+}
+
+void clear_screen(void)
+{
+ fputs("\033e\033%@\033)0\033(B\1#0\033[?25l\033[2J", stdout);
+ display_line_nb = 0;
+}
diff --git a/com32/hdt/hdt-common.h b/com32/hdt/hdt-common.h
new file mode 100644
index 00000000..8cdf6636
--- /dev/null
+++ b/com32/hdt/hdt-common.h
@@ -0,0 +1,135 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#ifndef DEFINE_HDT_COMMON_H
+#define DEFINE_HDT_COMMON_H
+#include <stdio.h>
+#include <syslinux/pxe.h>
+#include "sys/pci.h"
+
+#include "cpuid.h"
+#include "dmi/dmi.h"
+#include "hdt-ata.h"
+#include "../lib/sys/vesa/vesa.h"
+
+/* This two values are used for switching for the menu to the CLI mode */
+#define HDT_SWITCH_TO_CLI "hdt_switch_to_cli"
+#define HDT_RETURN_TO_CLI 100
+#define MAX_VESA_MODES 255
+
+extern int display_line_nb;
+
+#define more_printf(...) do {\
+ if (display_line_nb == 23) {\
+ char tempbuf[10];\
+ printf("Press enter to continue\n");\
+ display_line_nb=0;\
+ fgets(tempbuf, sizeof(tempbuf), stdin);\
+ }\
+ printf ( __VA_ARGS__);\
+ display_line_nb++; \
+} while (0);
+
+struct s_pxe {
+ uint16_t vendor_id;
+ uint16_t product_id;
+ uint16_t subvendor_id;
+ uint16_t subproduct_id;
+ uint8_t rev;
+ uint8_t pci_bus;
+ uint8_t pci_dev;
+ uint8_t pci_func;
+ uint8_t base_class;
+ uint8_t sub_class;
+ uint8_t prog_intf;
+ uint8_t nictype;
+ char mac_addr[18]; /* The current mac address */
+ uint8_t ip_addr[4];
+ pxe_bootp_t dhcpdata; /* The dhcp answer */
+ struct pci_device *pci_device; /* The matching pci device */
+ uint8_t pci_device_pos; /* It position in our pci sorted list */
+};
+
+struct s_vesa_mode_info {
+ struct vesa_mode_info mi;
+ uint16_t mode;
+};
+
+struct s_vesa {
+ uint8_t major_version;
+ uint8_t minor_version;
+ struct s_vesa_mode_info vmi[MAX_VESA_MODES];
+ uint8_t vmi_count;
+ uint16_t total_memory;
+ char vendor[256];
+ char product[256];
+ char product_revision[256];
+ uint16_t software_rev;
+};
+
+struct s_hardware {
+ s_dmi dmi; /* DMI table */
+ s_cpu cpu; /* CPU information */
+ struct pci_domain *pci_domain; /* PCI Devices */
+ struct diskinfo disk_info[256]; /* Disk Information */
+ struct s_pxe pxe;
+ struct s_vesa vesa;
+
+ int pci_ids_return_code;
+ int modules_pcimap_return_code;
+ int nb_pci_devices;
+ bool is_dmi_valid;
+ bool is_pxe_valid;
+ bool is_vesa_valid;
+
+ bool dmi_detection; /* Does the dmi stuff has already been detected? */
+ bool pci_detection; /* Does the pci stuff has already been detected? */
+ bool cpu_detection; /* Does the cpu stuff has already been detected? */
+ bool disk_detection;/* Does the disk stuff has already been detected? */
+ bool pxe_detection; /* Does the pxe stuff has already been detected? */
+ bool vesa_detection;/* Does the vesa sutff have been already detected? */
+
+ char syslinux_fs[22];
+ const struct syslinux_version *sv;
+ char modules_pcimap_path[255];
+ char pciids_path[255];
+};
+
+const char *find_argument(const char **argv, const char *argument);
+int detect_dmi(struct s_hardware *hardware);
+void detect_disks(struct s_hardware *hardware);
+void detect_pci(struct s_hardware *hardware);
+void cpu_detect(struct s_hardware *hardware);
+int detect_pxe(struct s_hardware *hardware);
+void init_hardware(struct s_hardware *hardware);
+void clear_screen(void);
+void detect_syslinux(struct s_hardware *hardware);
+void detect_parameters(const int argc, const char *argv[],
+ struct s_hardware *hardware);
+int detect_vesa(struct s_hardware *hardware);
+#endif
diff --git a/com32/hdt/hdt-menu-about.c b/com32/hdt/hdt-menu-about.c
new file mode 100644
index 00000000..ad3a820e
--- /dev/null
+++ b/com32/hdt/hdt-menu-about.c
@@ -0,0 +1,63 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "hdt-menu.h"
+
+/* Computing About menu*/
+void compute_aboutmenu(struct s_my_menu *menu)
+{
+ char buffer[SUBMENULEN + 1];
+ char statbuffer[STATLEN + 1];
+
+ menu->menu = add_menu(" About ", -1);
+ menu->items_count = 0;
+
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ snprintf(buffer, sizeof buffer, "Product : %s", PRODUCT_NAME);
+ snprintf(statbuffer, sizeof statbuffer, "Product : %s", PRODUCT_NAME);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Version : %s", VERSION);
+ snprintf(statbuffer, sizeof statbuffer, "Version : %s", VERSION);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Author : %s", AUTHOR);
+ snprintf(statbuffer, sizeof statbuffer, "Author : %s", AUTHOR);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Contact : %s", CONTACT);
+ snprintf(statbuffer, sizeof statbuffer, "Contact : %s", CONTACT);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ printf("MENU: About menu done (%d items)\n", menu->items_count);
+}
diff --git a/com32/hdt/hdt-menu-disk.c b/com32/hdt/hdt-menu-disk.c
new file mode 100644
index 00000000..1b273036
--- /dev/null
+++ b/com32/hdt/hdt-menu-disk.c
@@ -0,0 +1,177 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "hdt-menu.h"
+
+/* Compute the disk submenu */
+int compute_disk_module(struct s_my_menu *menu, int nb_sub_disk_menu,
+ struct diskinfo *d, int disk_number)
+{
+ char buffer[MENULEN + 1];
+ char statbuffer[STATLEN + 1];
+
+ /* No need to add no existing devices */
+ if (strlen(d[disk_number].aid.model) <= 0)
+ return -1;
+
+ snprintf(buffer, sizeof buffer, " Disk <%d> ", nb_sub_disk_menu);
+ menu[nb_sub_disk_menu].menu = add_menu(buffer, -1);
+ menu[nb_sub_disk_menu].items_count = 0;
+
+ snprintf(buffer, sizeof buffer, "Model : %s",
+ d[disk_number].aid.model);
+ snprintf(statbuffer, sizeof statbuffer, "Model: %s",
+ d[disk_number].aid.model);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ /* Compute device size */
+ char previous_unit[3], unit[3]; //GB
+ int previous_size, size = d[disk_number].sectors / 2; // Converting to bytes
+ strlcpy(unit, "KB", 2);
+ strlcpy(previous_unit, unit, 2);
+ previous_size = size;
+ if (size > 1000) {
+ size = size / 1000;
+ strlcpy(unit, "MB", 2);
+ if (size > 1000) {
+ previous_size = size;
+ size = size / 1000;
+ strlcpy(previous_unit, unit, 2);
+ strlcpy(unit, "GB", 2);
+ if (size > 1000) {
+ previous_size = size;
+ size = size / 1000;
+ strlcpy(previous_unit, unit, 2);
+ strlcpy(unit, "TB", 2);
+ }
+ }
+ }
+
+ snprintf(buffer, sizeof buffer, "Size : %d %s (%d %s)", size,
+ unit, previous_size, previous_unit);
+ snprintf(statbuffer, sizeof statbuffer, "Size: %d %s (%d %s)", size,
+ unit, previous_size, previous_unit);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "Firmware Rev.: %s",
+ d[disk_number].aid.fw_rev);
+ snprintf(statbuffer, sizeof statbuffer, "Firmware Revision: %s",
+ d[disk_number].aid.fw_rev);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "Serial Number: %s",
+ d[disk_number].aid.serial_no);
+ snprintf(statbuffer, sizeof statbuffer, "Serial Number: %s",
+ d[disk_number].aid.serial_no);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "Interface : %s",
+ d[disk_number].interface_type);
+ snprintf(statbuffer, sizeof statbuffer, "Interface: %s",
+ d[disk_number].interface_type);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "Host Bus : %s",
+ d[disk_number].host_bus_type);
+ snprintf(statbuffer, sizeof statbuffer, "Host Bus Type: %s",
+ d[disk_number].host_bus_type);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "Sectors : %d",
+ d[disk_number].sectors);
+ snprintf(statbuffer, sizeof statbuffer, "Sectors: %d",
+ d[disk_number].sectors);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "Heads : %d",
+ d[disk_number].heads);
+ snprintf(statbuffer, sizeof statbuffer, "Heads: %d",
+ d[disk_number].heads);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "Cylinders : %d",
+ d[disk_number].cylinders);
+ snprintf(statbuffer, sizeof statbuffer, "Cylinders: %d",
+ d[disk_number].cylinders);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "Sectors/Track: %d",
+ d[disk_number].sectors_per_track);
+ snprintf(statbuffer, sizeof statbuffer, "Sectors per Track: %d",
+ d[disk_number].sectors_per_track);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "Port : 0x%X", disk_number);
+ snprintf(statbuffer, sizeof statbuffer, "Port: 0x%X", disk_number);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ snprintf(buffer, sizeof buffer, "EDD Version : %s",
+ d[disk_number].edd_version);
+ snprintf(statbuffer, sizeof statbuffer, "EDD Version: %s",
+ d[disk_number].edd_version);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu[nb_sub_disk_menu].items_count++;
+
+ return 0;
+}
+
+/* Compute the Disks menu */
+void compute_disks(struct s_hdt_menu *menu, struct diskinfo *disk_info)
+{
+ char buffer[MENULEN + 1];
+ int nb_sub_disk_menu = 0;
+ for (int i = 0; i < 0xff; i++) {
+ if (compute_disk_module
+ ((struct s_my_menu*) &(menu->disk_sub_menu), nb_sub_disk_menu, disk_info,
+ i) == 0)
+ nb_sub_disk_menu++;
+ }
+
+ menu->disk_menu.menu = add_menu(" Disks ", -1);
+ menu->disk_menu.items_count = 0;
+
+ for (int i = 0; i < nb_sub_disk_menu; i++) {
+ snprintf(buffer, sizeof buffer, " Disk <%d> ", i);
+ add_item(buffer, "Disk", OPT_SUBMENU, NULL,
+ menu->disk_sub_menu[i].menu);
+ menu->disk_menu.items_count++;
+ }
+ printf("MENU: Disks menu done (%d items)\n",
+ menu->disk_menu.items_count);
+}
diff --git a/com32/hdt/hdt-menu-dmi.c b/com32/hdt/hdt-menu-dmi.c
new file mode 100644
index 00000000..79193019
--- /dev/null
+++ b/com32/hdt/hdt-menu-dmi.c
@@ -0,0 +1,481 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "hdt-menu.h"
+
+/* Compute System main menu */
+void compute_system(struct s_my_menu *menu, s_dmi * dmi)
+{
+ char buffer[SUBMENULEN + 1];
+ char statbuffer[STATLEN + 1];
+
+ menu->menu = add_menu(" System ", -1);
+ menu->items_count = 0;
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ snprintf(buffer, sizeof buffer, "Vendor : %s",
+ dmi->system.manufacturer);
+ snprintf(statbuffer, sizeof statbuffer, "Vendor: %s",
+ dmi->system.manufacturer);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Product : %s",
+ dmi->system.product_name);
+ snprintf(statbuffer, sizeof statbuffer, "Product Name: %s",
+ dmi->system.product_name);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Version : %s", dmi->system.version);
+ snprintf(statbuffer, sizeof statbuffer, "Version: %s",
+ dmi->system.version);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Serial : %s", dmi->system.serial);
+ snprintf(statbuffer, sizeof statbuffer, "Serial Number: %s",
+ dmi->system.serial);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "UUID : %s", dmi->system.uuid);
+ snprintf(statbuffer, sizeof statbuffer, "UUID: %s", dmi->system.uuid);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Wakeup : %s",
+ dmi->system.wakeup_type);
+ snprintf(statbuffer, sizeof statbuffer, "Wakeup Type: %s",
+ dmi->system.wakeup_type);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "SKU Number: %s",
+ dmi->system.sku_number);
+ snprintf(statbuffer, sizeof statbuffer, "SKU Number: %s",
+ dmi->system.sku_number);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Family : %s", dmi->system.family);
+ snprintf(statbuffer, sizeof statbuffer, "Family: %s",
+ dmi->system.family);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ printf("MENU: System menu done (%d items)\n", menu->items_count);
+}
+
+/* Compute Chassis menu */
+void compute_chassis(struct s_my_menu *menu, s_dmi * dmi)
+{
+ char buffer[SUBMENULEN + 1];
+ char statbuffer[STATLEN + 1];
+ menu->menu = add_menu(" Chassis ", -1);
+ menu->items_count = 0;
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ snprintf(buffer, sizeof buffer, "Vendor : %s",
+ dmi->chassis.manufacturer);
+ snprintf(statbuffer, sizeof statbuffer, "Vendor: %s",
+ dmi->chassis.manufacturer);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Type : %s", dmi->chassis.type);
+ snprintf(statbuffer, sizeof statbuffer, "Type: %s", dmi->chassis.type);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Version : %s", dmi->chassis.version);
+ snprintf(statbuffer, sizeof statbuffer, "Version: %s",
+ dmi->chassis.version);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Serial : %s", dmi->chassis.serial);
+ snprintf(statbuffer, sizeof statbuffer, "Serial Number: %s",
+ dmi->chassis.serial);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Asset Tag : %s",
+ dmi->chassis.asset_tag);
+ snprintf(statbuffer, sizeof statbuffer, "Asset Tag: %s",
+ dmi->chassis.asset_tag);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Lock : %s", dmi->chassis.lock);
+ snprintf(statbuffer, sizeof statbuffer, "Lock: %s", dmi->chassis.lock);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ printf("MENU: Chassis menu done (%d items)\n", menu->items_count);
+}
+
+/* Compute BIOS menu */
+void compute_bios(struct s_my_menu *menu, s_dmi * dmi)
+{
+ char buffer[SUBMENULEN + 1];
+ char statbuffer[STATLEN + 1];
+
+ menu->menu = add_menu(" BIOS ", -1);
+ menu->items_count = 0;
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ snprintf(buffer, sizeof buffer, "Vendor : %s", dmi->bios.vendor);
+ snprintf(statbuffer, sizeof statbuffer, "Vendor: %s", dmi->bios.vendor);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Version : %s", dmi->bios.version);
+ snprintf(statbuffer, sizeof statbuffer, "Version: %s",
+ dmi->bios.version);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Release : %s",
+ dmi->bios.release_date);
+ snprintf(statbuffer, sizeof statbuffer, "Release Date: %s",
+ dmi->bios.release_date);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Bios Rev. : %s",
+ dmi->bios.bios_revision);
+ snprintf(statbuffer, sizeof statbuffer, "Bios Revision: %s",
+ dmi->bios.bios_revision);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Fw. Rev. : %s",
+ dmi->bios.firmware_revision);
+ snprintf(statbuffer, sizeof statbuffer, "Firmware Revision : %s",
+ dmi->bios.firmware_revision);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+
+ printf("MENU: BIOS menu done (%d items)\n", menu->items_count);
+}
+
+/* Compute Motherboard main menu */
+void compute_motherboard(struct s_my_menu *menu, s_dmi * dmi)
+{
+ char buffer[SUBMENULEN + 1];
+ char statbuffer[STATLEN + 1];
+
+ menu->menu = add_menu(" Motherboard ", -1);
+ menu->items_count = 0;
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ snprintf(buffer, sizeof buffer, "Vendor : %s",
+ dmi->base_board.manufacturer);
+ snprintf(statbuffer, sizeof statbuffer, "Vendor: %s",
+ dmi->base_board.manufacturer);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Product : %s",
+ dmi->base_board.product_name);
+ snprintf(statbuffer, sizeof statbuffer, "Product Name: %s",
+ dmi->base_board.product_name);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Version : %s",
+ dmi->base_board.version);
+ snprintf(statbuffer, sizeof statbuffer, "Version: %s",
+ dmi->base_board.version);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Serial : %s",
+ dmi->base_board.serial);
+ snprintf(statbuffer, sizeof statbuffer, "Serial Number: %s",
+ dmi->base_board.serial);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Asset Tag : %s",
+ dmi->base_board.asset_tag);
+ snprintf(statbuffer, sizeof statbuffer, "Asset Tag: %s",
+ dmi->base_board.asset_tag);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Location : %s",
+ dmi->base_board.location);
+ snprintf(statbuffer, sizeof statbuffer, "Location: %s",
+ dmi->base_board.location);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Type : %s", dmi->base_board.type);
+ snprintf(statbuffer, sizeof statbuffer, "Type: %s",
+ dmi->base_board.type);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ printf("MENU: Motherboard menu done (%d items)\n", menu->items_count);
+}
+
+/* Compute the Memory submenu */
+static void compute_memory_module(struct s_my_menu *menu, s_dmi * dmi,
+ int slot_number)
+{
+ int i = slot_number;
+ char buffer[MENULEN + 1];
+ char statbuffer[STATLEN + 1];
+
+ sprintf(buffer, " Bank <%d> ", i);
+ menu->items_count = 0;
+ menu->menu = add_menu(buffer, -1);
+
+ snprintf(buffer, sizeof buffer, "Form Factor : %s",
+ dmi->memory[i].form_factor);
+ snprintf(statbuffer, sizeof statbuffer, "Form Factor: %s",
+ dmi->memory[i].form_factor);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Type : %s",
+ dmi->memory[i].type);
+ snprintf(statbuffer, sizeof statbuffer, "Type: %s",
+ dmi->memory[i].type);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Type Details : %s",
+ dmi->memory[i].type_detail);
+ snprintf(statbuffer, sizeof statbuffer, "Type Details: %s",
+ dmi->memory[i].type_detail);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Speed : %s",
+ dmi->memory[i].speed);
+ snprintf(statbuffer, sizeof statbuffer, "Speed (Mhz): %s",
+ dmi->memory[i].speed);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Size : %s",
+ dmi->memory[i].size);
+ snprintf(statbuffer, sizeof statbuffer, "Size: %s",
+ dmi->memory[i].size);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Device Set : %s",
+ dmi->memory[i].device_set);
+ snprintf(statbuffer, sizeof statbuffer, "Device Set: %s",
+ dmi->memory[i].device_set);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Device Loc. : %s",
+ dmi->memory[i].device_locator);
+ snprintf(statbuffer, sizeof statbuffer, "Device Location: %s",
+ dmi->memory[i].device_locator);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Bank Locator : %s",
+ dmi->memory[i].bank_locator);
+ snprintf(statbuffer, sizeof statbuffer, "Bank Locator: %s",
+ dmi->memory[i].bank_locator);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Total Width : %s",
+ dmi->memory[i].total_width);
+ snprintf(statbuffer, sizeof statbuffer, "Total bit Width: %s",
+ dmi->memory[i].total_width);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Data Width : %s",
+ dmi->memory[i].data_width);
+ snprintf(statbuffer, sizeof statbuffer, "Data bit Width: %s",
+ dmi->memory[i].data_width);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Error : %s",
+ dmi->memory[i].error);
+ snprintf(statbuffer, sizeof statbuffer, "Error: %s",
+ dmi->memory[i].error);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Vendor : %s",
+ dmi->memory[i].manufacturer);
+ snprintf(statbuffer, sizeof statbuffer, "Vendor: %s",
+ dmi->memory[i].manufacturer);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Serial : %s",
+ dmi->memory[i].serial);
+ snprintf(statbuffer, sizeof statbuffer, "Serial: %s",
+ dmi->memory[i].serial);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Asset Tag : %s",
+ dmi->memory[i].asset_tag);
+ snprintf(statbuffer, sizeof statbuffer, "Asset Tag: %s",
+ dmi->memory[i].asset_tag);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Part Number : %s",
+ dmi->memory[i].part_number);
+ snprintf(buffer, sizeof statbuffer, "Part Number: %s",
+ dmi->memory[i].part_number);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+}
+
+/* Compute the Memory menu */
+void compute_memory(struct s_hdt_menu *menu, s_dmi * dmi)
+{
+ char buffer[MENULEN + 1];
+ for (int i = 0; i < dmi->memory_count; i++) {
+ compute_memory_module(&(menu->memory_sub_menu[i]), dmi, i);
+ }
+
+ menu->memory_menu.menu = add_menu(" Memory Banks ", -1);
+ menu->memory_menu.items_count = 0;
+
+ for (int i = 0; i < dmi->memory_count; i++) {
+ snprintf(buffer, sizeof buffer, " Bank <%d> ", i);
+ add_item(buffer, "Memory Bank", OPT_SUBMENU, NULL,
+ menu->memory_sub_menu[i].menu);
+ menu->memory_menu.items_count++;
+ }
+ printf("MENU: Memory menu done (%d items)\n",
+ menu->memory_menu.items_count);
+ add_item("Run Test", "Run Test", OPT_RUN, "memtest", 0);
+}
+
+/* Compute Main Battery menu */
+void compute_battery(struct s_my_menu *menu, s_dmi * dmi)
+{
+ char buffer[SUBMENULEN + 1];
+ char statbuffer[STATLEN + 1];
+ menu->menu = add_menu(" Battery ", -1);
+ menu->items_count = 0;
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ snprintf(buffer, sizeof buffer, "Vendor : %s",
+ dmi->battery.manufacturer);
+ snprintf(statbuffer, sizeof statbuffer, "Vendor: %s",
+ dmi->battery.manufacturer);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Manufacture Date: %s",
+ dmi->battery.manufacture_date);
+ snprintf(statbuffer, sizeof statbuffer, "Manufacture Date: %s",
+ dmi->battery.manufacture_date);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Serial : %s",
+ dmi->battery.serial);
+ snprintf(statbuffer, sizeof statbuffer, "Serial: %s",
+ dmi->battery.serial);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Name : %s",
+ dmi->battery.name);
+ snprintf(statbuffer, sizeof statbuffer, "Name: %s", dmi->battery.name);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Chemistry : %s",
+ dmi->battery.chemistry);
+ snprintf(statbuffer, sizeof statbuffer, "Chemistry: %s",
+ dmi->battery.chemistry);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Design Capacity : %s",
+ dmi->battery.design_capacity);
+ snprintf(statbuffer, sizeof statbuffer, "Design Capacity: %s",
+ dmi->battery.design_capacity);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Design Voltage : %s",
+ dmi->battery.design_voltage);
+ snprintf(statbuffer, sizeof statbuffer, "Design Voltage : %s",
+ dmi->battery.design_voltage);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "SBDS : %s",
+ dmi->battery.sbds);
+ snprintf(statbuffer, sizeof statbuffer, "SBDS: %s", dmi->battery.sbds);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "SBDS Manuf. Date: %s",
+ dmi->battery.sbds_manufacture_date);
+ snprintf(statbuffer, sizeof statbuffer, "SBDS Manufacture Date: %s",
+ dmi->battery.sbds_manufacture_date);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "SBDS Chemistry : %s",
+ dmi->battery.sbds_chemistry);
+ snprintf(statbuffer, sizeof statbuffer, "SBDS Chemistry : %s",
+ dmi->battery.sbds_chemistry);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Maximum Error : %s",
+ dmi->battery.maximum_error);
+ snprintf(statbuffer, sizeof statbuffer, "Maximum Error (%) : %s",
+ dmi->battery.maximum_error);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "OEM Info : %s",
+ dmi->battery.oem_info);
+ snprintf(statbuffer, sizeof statbuffer, "OEM Info: %s",
+ dmi->battery.oem_info);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ printf("MENU: Battery menu done (%d items)\n", menu->items_count);
+}
diff --git a/com32/hdt/hdt-menu-kernel.c b/com32/hdt/hdt-menu-kernel.c
new file mode 100644
index 00000000..b94d1fed
--- /dev/null
+++ b/com32/hdt/hdt-menu-kernel.c
@@ -0,0 +1,91 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "hdt-menu.h"
+
+/* Main Kernel menu */
+void compute_kernel(struct s_my_menu *menu, struct s_hardware *hardware)
+{
+ char buffer[SUBMENULEN + 1];
+ char infobar[STATLEN + 1];
+ char kernel_modules[LINUX_KERNEL_MODULE_SIZE *
+ MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+ struct pci_device *pci_device;
+
+ menu->menu = add_menu(" Kernel Modules ", -1);
+ menu->items_count = 0;
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ if (hardware->modules_pcimap_return_code == -ENOMODULESPCIMAP) {
+ add_item("The modules.pcimap file is missing",
+ "Missing modules.pcimap file", OPT_INACTIVE, NULL, 0);
+ add_item("Kernel modules can't be computed.",
+ "Missing modules.pcimap file", OPT_INACTIVE, NULL, 0);
+ add_item("Please put one in same dir as hdt",
+ "Missing modules.pcimap file", OPT_INACTIVE, NULL, 0);
+ add_item("", "", OPT_SEP, "", 0);
+ } else {
+ /*
+ * For every detected pci device, grab its kernel module to
+ * compute this submenu
+ */
+ for_each_pci_func(pci_device, hardware->pci_domain) {
+ memset(kernel_modules, 0, sizeof kernel_modules);
+ for (int i = 0;
+ i <
+ pci_device->dev_info->linux_kernel_module_count;
+ i++) {
+ if (i > 0) {
+ strncat(kernel_modules, " | ", 3);
+ }
+ strncat(kernel_modules,
+ pci_device->dev_info->
+ linux_kernel_module[i],
+ LINUX_KERNEL_MODULE_SIZE - 1);
+ }
+ /* No need to add unknown kernel modules */
+ if (strlen(kernel_modules) > 0) {
+ snprintf(buffer, sizeof buffer, "%s (%s)",
+ kernel_modules,
+ pci_device->dev_info->class_name);
+ snprintf(infobar, sizeof infobar,
+ "%04x:%04x %s : %s\n",
+ pci_device->vendor,
+ pci_device->product,
+ pci_device->dev_info->vendor_name,
+ pci_device->dev_info->product_name);
+
+ add_item(buffer, infobar, OPT_INACTIVE, NULL,
+ 0);
+ menu->items_count++;
+ }
+ }
+ }
+
+ printf("MENU: Kernel menu done (%d items)\n", menu->items_count);
+}
diff --git a/com32/hdt/hdt-menu-pci.c b/com32/hdt/hdt-menu-pci.c
new file mode 100644
index 00000000..ab31efd5
--- /dev/null
+++ b/com32/hdt/hdt-menu-pci.c
@@ -0,0 +1,178 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "hdt-menu.h"
+
+/* Dynamic submenu for pci devices */
+static void compute_pci_device(struct s_my_menu *menu,
+ struct pci_device *pci_device,
+ int pci_bus, int pci_slot, int pci_func)
+{
+ char buffer[56];
+ char statbuffer[STATLEN];
+ char kernel_modules[LINUX_KERNEL_MODULE_SIZE *
+ MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+
+ menu->menu = add_menu(" Details ", -1);
+ menu->items_count = 0;
+ set_menu_pos(5, 17);
+
+ snprintf(buffer, sizeof buffer, "Vendor : %s",
+ pci_device->dev_info->vendor_name);
+ snprintf(statbuffer, sizeof statbuffer, "Vendor Name: %s",
+ pci_device->dev_info->vendor_name);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Product : %s",
+ pci_device->dev_info->product_name);
+ snprintf(statbuffer, sizeof statbuffer, "Product Name %s",
+ pci_device->dev_info->product_name);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Class : %s",
+ pci_device->dev_info->class_name);
+ snprintf(statbuffer, sizeof statbuffer, "Class Name: %s",
+ pci_device->dev_info->class_name);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Location: %02x:%02x.%01x", pci_bus,
+ pci_slot, pci_func);
+ snprintf(statbuffer, sizeof statbuffer,
+ "Location on the PCI Bus: %02x:%02x.%01x", pci_bus, pci_slot,
+ pci_func);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "PCI ID : %04x:%04x[%04x:%04x]",
+ pci_device->vendor, pci_device->product,
+ pci_device->sub_vendor, pci_device->sub_product);
+ snprintf(statbuffer, sizeof statbuffer,
+ "vendor:product[sub_vendor:sub_product] : %04x:%04x[%04x:%04x]",
+ pci_device->vendor, pci_device->product,
+ pci_device->sub_vendor, pci_device->sub_product);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ if ((pci_device->dev_info->irq>0) && (pci_device->dev_info->irq<255)) {
+ snprintf(buffer, sizeof buffer,"IRQ : %d", pci_device->dev_info->irq);
+ snprintf(statbuffer, sizeof statbuffer,"IRQ : %d", pci_device->dev_info->irq);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+ }
+
+ snprintf(buffer,sizeof buffer,"Latency : %d",pci_device->dev_info->latency);
+ snprintf(statbuffer,sizeof statbuffer,"Latency : %d",pci_device->dev_info->latency);
+ add_item(buffer,statbuffer,OPT_INACTIVE,NULL,0);
+ menu->items_count++;
+
+ if (pci_device->dev_info->linux_kernel_module_count > 1) {
+ for (int i = 0;
+ i < pci_device->dev_info->linux_kernel_module_count; i++) {
+ if (i > 0) {
+ strncat(kernel_modules, " | ", 3);
+ }
+ strncat(kernel_modules,
+ pci_device->dev_info->linux_kernel_module[i],
+ LINUX_KERNEL_MODULE_SIZE - 1);
+ }
+ snprintf(buffer, sizeof buffer, "Modules : %s", kernel_modules);
+ snprintf(statbuffer, sizeof statbuffer, "Kernel Modules: %s",
+ kernel_modules);
+ } else {
+ snprintf(buffer, sizeof buffer, "Module : %s",
+ pci_device->dev_info->linux_kernel_module[0]);
+ snprintf(statbuffer, sizeof statbuffer, "Kernel Module: %s",
+ pci_device->dev_info->linux_kernel_module[0]);
+ }
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+}
+
+/* Main PCI menu */
+int compute_PCI(struct s_hdt_menu *hdt_menu, struct s_hardware *hardware)
+{
+ int i = 0;
+ char menuname[255][MENULEN + 1];
+ char infobar[255][STATLEN + 1];
+ struct pci_device *pci_device;
+ char kernel_modules[LINUX_KERNEL_MODULE_SIZE *
+ MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+
+ /* For every detected pci device, compute its submenu */
+ for_each_pci_func(pci_device, hardware->pci_domain) {
+ memset(kernel_modules, 0, sizeof kernel_modules);
+ for (int kmod = 0;
+ kmod < pci_device->dev_info->linux_kernel_module_count;
+ kmod++) {
+ if (kmod > 0) {
+ strncat(kernel_modules, " | ", 3);
+ }
+ strncat(kernel_modules,
+ pci_device->dev_info->linux_kernel_module[kmod],
+ LINUX_KERNEL_MODULE_SIZE - 1);
+ }
+ if (pci_device->dev_info->linux_kernel_module_count == 0)
+ strlcpy(kernel_modules, "unknown", 7);
+
+ compute_pci_device(&(hdt_menu->pci_sub_menu[i]), pci_device,
+ __pci_bus, __pci_slot, __pci_func);
+ snprintf(menuname[i], 59, "%s|%s",
+ pci_device->dev_info->vendor_name,
+ pci_device->dev_info->product_name);
+ snprintf(infobar[i], STATLEN,
+ "%02x:%02x.%01x # %s # ID:%04x:%04x[%04x:%04x] # Kmod:%s\n",
+ __pci_bus, __pci_slot, __pci_func,
+ pci_device->dev_info->class_name, pci_device->vendor,
+ pci_device->product, pci_device->sub_vendor,
+ pci_device->sub_product, kernel_modules);
+ i++;
+ }
+
+ hdt_menu->pci_menu.menu = add_menu(" PCI Devices ", -1);
+ hdt_menu->pci_menu.items_count = 0;
+ if (hardware->pci_ids_return_code == -ENOPCIIDS) {
+ add_item("The pci.ids file is missing", "Missing pci.ids file",
+ OPT_INACTIVE, NULL, 0);
+ add_item("PCI Device names can't be computed.",
+ "Missing pci.ids file", OPT_INACTIVE, NULL, 0);
+ add_item("Please put one in same dir as hdt",
+ "Missing pci.ids file", OPT_INACTIVE, NULL, 0);
+ add_item("", "", OPT_SEP, "", 0);
+ }
+ for (int j = 0; j < i; j++) {
+ add_item(menuname[j], infobar[j], OPT_SUBMENU, NULL,
+ hdt_menu->pci_sub_menu[j].menu);
+ hdt_menu->pci_menu.items_count++;
+ }
+ printf("MENU: PCI menu done (%d items)\n",
+ hdt_menu->pci_menu.items_count);
+ return 0;
+}
diff --git a/com32/hdt/hdt-menu-processor.c b/com32/hdt/hdt-menu-processor.c
new file mode 100644
index 00000000..d71fbe1f
--- /dev/null
+++ b/com32/hdt/hdt-menu-processor.c
@@ -0,0 +1,240 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "hdt-menu.h"
+
+/* Compute Processor menu */
+void compute_processor(struct s_my_menu *menu, struct s_hardware *hardware)
+{
+ char buffer[SUBMENULEN + 1];
+ char buffer1[SUBMENULEN + 1];
+ char statbuffer[STATLEN + 1];
+
+ menu->menu = add_menu(" Main Processor ", -1);
+ menu->items_count = 0;
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ snprintf(buffer, sizeof buffer, "Vendor : %s", hardware->cpu.vendor);
+ snprintf(statbuffer, sizeof statbuffer, "Vendor: %s",
+ hardware->cpu.vendor);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Model : %s", hardware->cpu.model);
+ snprintf(statbuffer, sizeof statbuffer, "Model: %s",
+ hardware->cpu.model);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Vendor ID : %d",
+ hardware->cpu.vendor_id);
+ snprintf(statbuffer, sizeof statbuffer, "Vendor ID: %d",
+ hardware->cpu.vendor_id);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Family ID : %d", hardware->cpu.family);
+ snprintf(statbuffer, sizeof statbuffer, "Family ID: %d",
+ hardware->cpu.family);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Model ID : %d",
+ hardware->cpu.model_id);
+ snprintf(statbuffer, sizeof statbuffer, "Model ID: %d",
+ hardware->cpu.model_id);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Stepping : %d",
+ hardware->cpu.stepping);
+ snprintf(statbuffer, sizeof statbuffer, "Stepping: %d",
+ hardware->cpu.stepping);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ if (hardware->is_dmi_valid) {
+ snprintf(buffer, sizeof buffer, "FSB : %d",
+ hardware->dmi.processor.external_clock);
+ snprintf(statbuffer, sizeof statbuffer,
+ "Front Side Bus (MHz): %d",
+ hardware->dmi.processor.external_clock);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Cur. Speed: %d",
+ hardware->dmi.processor.current_speed);
+ snprintf(statbuffer, sizeof statbuffer,
+ "Current Speed (MHz): %d",
+ hardware->dmi.processor.current_speed);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Max Speed : %d",
+ hardware->dmi.processor.max_speed);
+ snprintf(statbuffer, sizeof statbuffer, "Max Speed (MHz): %d",
+ hardware->dmi.processor.max_speed);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Upgrade : %s",
+ hardware->dmi.processor.upgrade);
+ snprintf(statbuffer, sizeof statbuffer, "Upgrade: %s",
+ hardware->dmi.processor.upgrade);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+ }
+
+ if (hardware->cpu.flags.smp) {
+ snprintf(buffer, sizeof buffer, "SMP : Yes");
+ snprintf(statbuffer, sizeof statbuffer, "SMP: Yes");
+ } else {
+ snprintf(buffer, sizeof buffer, "SMP : No");
+ snprintf(statbuffer, sizeof statbuffer, "SMP: No");
+ }
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ if (hardware->cpu.flags.lm) {
+ snprintf(buffer, sizeof buffer, "x86_64 : Yes");
+ snprintf(statbuffer, sizeof statbuffer,
+ "x86_64 compatible processor: Yes");
+ } else {
+ snprintf(buffer, sizeof buffer, "X86_64 : No");
+ snprintf(statbuffer, sizeof statbuffer,
+ "X86_64 compatible processor: No");
+ }
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ buffer1[0] = '\0';
+ if (hardware->cpu.flags.fpu)
+ strcat(buffer1, "fpu ");
+ if (hardware->cpu.flags.vme)
+ strcat(buffer1, "vme ");
+ if (hardware->cpu.flags.de)
+ strcat(buffer1, "de ");
+ if (hardware->cpu.flags.pse)
+ strcat(buffer1, "pse ");
+ if (hardware->cpu.flags.tsc)
+ strcat(buffer1, "tsc ");
+ if (hardware->cpu.flags.msr)
+ strcat(buffer1, "msr ");
+ if (hardware->cpu.flags.pae)
+ strcat(buffer1, "pae ");
+ snprintf(buffer, sizeof buffer, "Flags : %s", buffer1);
+ snprintf(statbuffer, sizeof statbuffer, "Flags: %s", buffer1);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ buffer1[0] = '\0';
+ if (hardware->cpu.flags.mce)
+ strcat(buffer1, "mce ");
+ if (hardware->cpu.flags.cx8)
+ strcat(buffer1, "cx8 ");
+ if (hardware->cpu.flags.apic)
+ strcat(buffer1, "apic ");
+ if (hardware->cpu.flags.sep)
+ strcat(buffer1, "sep ");
+ if (hardware->cpu.flags.mtrr)
+ strcat(buffer1, "mtrr ");
+ if (hardware->cpu.flags.pge)
+ strcat(buffer1, "pge ");
+ if (hardware->cpu.flags.mca)
+ strcat(buffer1, "mca ");
+ snprintf(buffer, sizeof buffer, "Flags : %s", buffer1);
+ snprintf(statbuffer, sizeof statbuffer, "Flags: %s", buffer1);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ buffer1[0] = '\0';
+ if (hardware->cpu.flags.cmov)
+ strcat(buffer1, "cmov ");
+ if (hardware->cpu.flags.pat)
+ strcat(buffer1, "pat ");
+ if (hardware->cpu.flags.pse_36)
+ strcat(buffer1, "pse_36 ");
+ if (hardware->cpu.flags.psn)
+ strcat(buffer1, "psn ");
+ if (hardware->cpu.flags.clflsh)
+ strcat(buffer1, "clflsh ");
+ snprintf(buffer, sizeof buffer, "Flags : %s", buffer1);
+ snprintf(statbuffer, sizeof statbuffer, "Flags: %s", buffer1);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ buffer1[0] = '\0';
+ if (hardware->cpu.flags.dts)
+ strcat(buffer1, "dts ");
+ if (hardware->cpu.flags.acpi)
+ strcat(buffer1, "acpi ");
+ if (hardware->cpu.flags.mmx)
+ strcat(buffer1, "mmx ");
+ if (hardware->cpu.flags.sse)
+ strcat(buffer1, "sse ");
+ snprintf(buffer, sizeof buffer, "Flags : %s", buffer1);
+ snprintf(statbuffer, sizeof statbuffer, "Flags: %s", buffer1);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ buffer1[0] = '\0';
+ if (hardware->cpu.flags.sse2)
+ strcat(buffer1, "sse2 ");
+ if (hardware->cpu.flags.ss)
+ strcat(buffer1, "ss ");
+ if (hardware->cpu.flags.htt)
+ strcat(buffer1, "ht ");
+ if (hardware->cpu.flags.acc)
+ strcat(buffer1, "acc ");
+ if (hardware->cpu.flags.syscall)
+ strcat(buffer1, "syscall ");
+ if (hardware->cpu.flags.mp)
+ strcat(buffer1, "mp ");
+ snprintf(buffer, sizeof buffer, "Flags : %s", buffer1);
+ snprintf(statbuffer, sizeof statbuffer, "Flags: %s", buffer1);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ buffer1[0] = '\0';
+ if (hardware->cpu.flags.nx)
+ strcat(buffer1, "nx ");
+ if (hardware->cpu.flags.mmxext)
+ strcat(buffer1, "mmxext ");
+ if (hardware->cpu.flags.lm)
+ strcat(buffer1, "lm ");
+ if (hardware->cpu.flags.nowext)
+ strcat(buffer1, "3dnowext ");
+ if (hardware->cpu.flags.now)
+ strcat(buffer1, "3dnow! ");
+ snprintf(buffer, sizeof buffer, "Flags : %s", buffer1);
+ snprintf(statbuffer, sizeof statbuffer, "Flags: %s", buffer1);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ printf("MENU: Processor menu done (%d items)\n", menu->items_count);
+}
diff --git a/com32/hdt/hdt-menu-pxe.c b/com32/hdt/hdt-menu-pxe.c
new file mode 100644
index 00000000..686117ab
--- /dev/null
+++ b/com32/hdt/hdt-menu-pxe.c
@@ -0,0 +1,120 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "hdt-menu.h"
+
+/* Main Kernel menu */
+void compute_PXE(struct s_my_menu *menu, struct s_hardware *hardware)
+{
+ char buffer[SUBMENULEN + 1];
+ char infobar[STATLEN + 1];
+
+ if (hardware->is_pxe_valid == false)
+ return;
+
+ menu->menu = add_menu(" PXE ", -1);
+ menu->items_count = 0;
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ struct s_pxe *p = &hardware->pxe;
+
+ if (hardware->pci_ids_return_code == -ENOPCIIDS) {
+ snprintf(buffer, sizeof buffer, "PCI Vendor : %d",
+ p->vendor_id);
+ snprintf(infobar, sizeof infobar, "PCI Vendor : %d",
+ p->vendor_id);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "PCI Product : %d",
+ p->vendor_id);
+ snprintf(infobar, sizeof infobar, "PCI Product : %d",
+ p->vendor_id);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "PCI SubVendor : %d",
+ p->subvendor_id);
+ snprintf(infobar, sizeof infobar, "PCI SubVendor : %d",
+ p->subvendor_id);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "PCI SubProduct : %d",
+ p->subproduct_id);
+ snprintf(infobar, sizeof infobar, "PCI SubProduct : %d",
+ p->subproduct_id);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "PCI Revision : %d", p->rev);
+ snprintf(infobar, sizeof infobar, "PCI Revision : %d",
+ p->rev);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer,
+ "PCI Bus Pos. : %02x:%02x.%02x", p->pci_bus,
+ p->pci_dev, p->pci_func);
+ snprintf(infobar, sizeof infobar,
+ "PCI Bus Pos. : %02x:%02x.%02x", p->pci_bus,
+ p->pci_dev, p->pci_func);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ } else {
+
+ snprintf(buffer, sizeof buffer, "Manufacturer : %s",
+ p->pci_device->dev_info->vendor_name);
+ snprintf(infobar, sizeof infobar, "Manufacturer : %s",
+ p->pci_device->dev_info->vendor_name);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Product : %s",
+ p->pci_device->dev_info->product_name);
+ snprintf(infobar, sizeof infobar, "Product : %s",
+ p->pci_device->dev_info->product_name);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+ }
+
+ snprintf(buffer, sizeof buffer, "MAC Address : %s", p->mac_addr);
+ snprintf(infobar, sizeof infobar, "MAC Address : %s", p->mac_addr);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "IP Address : %d.%d.%d.%d",
+ p->ip_addr[0], p->ip_addr[1], p->ip_addr[2], p->ip_addr[3]);
+ snprintf(infobar, sizeof infobar, "IP Address : %d.%d.%d.%d",
+ p->ip_addr[0], p->ip_addr[1], p->ip_addr[2], p->ip_addr[3]);
+ add_item(buffer, infobar, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ printf("MENU: PXE menu done (%d items)\n", menu->items_count);
+}
diff --git a/com32/hdt/hdt-menu-summary.c b/com32/hdt/hdt-menu-summary.c
new file mode 100644
index 00000000..6401221a
--- /dev/null
+++ b/com32/hdt/hdt-menu-summary.c
@@ -0,0 +1,209 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+*/
+
+#include "hdt-menu.h"
+
+/* Computing Summary menu */
+void compute_summarymenu(struct s_my_menu *menu, struct s_hardware *hardware)
+{
+ char buffer[SUBMENULEN + 1];
+ char statbuffer[STATLEN + 1];
+ char bank_number[10];
+
+ menu->menu = add_menu(" Summary ", -1);
+ menu->items_count = 0;
+
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ snprintf(buffer, sizeof buffer, "CPU Vendor : %s",
+ hardware->cpu.vendor);
+ snprintf(statbuffer, sizeof statbuffer, "CPU Vendor: %s",
+ hardware->cpu.vendor);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "CPU Model : %s",
+ hardware->cpu.model);
+ snprintf(statbuffer, sizeof statbuffer, "CPU Model: %s",
+ hardware->cpu.model);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ add_item("", "", OPT_SEP, "", 0);
+ if (hardware->is_dmi_valid == true) {
+
+ snprintf(buffer, sizeof buffer, "System Vendor : %s",
+ hardware->dmi.system.manufacturer);
+ snprintf(statbuffer, sizeof statbuffer, "System Vendor: %s",
+ hardware->dmi.system.manufacturer);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "System Product: %s",
+ hardware->dmi.system.product_name);
+ snprintf(statbuffer, sizeof statbuffer,
+ "System Product Name: %s",
+ hardware->dmi.system.product_name);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "System Serial : %s",
+ hardware->dmi.system.serial);
+ snprintf(statbuffer, sizeof statbuffer,
+ "System Serial Number: %s",
+ hardware->dmi.system.serial);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ add_item("", "", OPT_SEP, "", 0);
+
+ snprintf(buffer, sizeof buffer, "Bios Version : %s",
+ hardware->dmi.bios.version);
+ snprintf(statbuffer, sizeof statbuffer, "Bios Version: %s",
+ hardware->dmi.bios.version);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Bios Release : %s",
+ hardware->dmi.bios.release_date);
+ snprintf(statbuffer, sizeof statbuffer, "Bios Release Date: %s",
+ hardware->dmi.bios.release_date);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ add_item("", "", OPT_SEP, "", 0);
+
+ for (int i = 0; i < hardware->dmi.memory_count; i++) {
+ if (hardware->dmi.memory[i].filled == true) {
+ /* When discovering the first item, let's clear the screen */
+ memset(bank_number, 0, sizeof(bank_number));
+ snprintf(bank_number, sizeof(bank_number),
+ "%d ", i);
+ if (strncmp
+ (hardware->dmi.memory[i].size, "Free", 4)) {
+ snprintf(buffer, sizeof buffer,
+ "Mem bank %02d : %s %s@%s",
+ i,
+ hardware->dmi.memory[i].size,
+ hardware->dmi.memory[i].type,
+ hardware->dmi.memory[i].speed);
+ snprintf(statbuffer, sizeof statbuffer,
+ "Memory bank %02d : %s %s@%s",
+ i,
+ hardware->dmi.memory[i].size,
+ hardware->dmi.memory[i].type,
+ hardware->dmi.memory[i].speed);
+ add_item(buffer, statbuffer,
+ OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+ }
+ }
+ }
+
+ add_item("", "", OPT_SEP, "", 0);
+ }
+
+ snprintf(buffer, sizeof buffer, "Nb PCI Devices: %d",
+ hardware->nb_pci_devices);
+ snprintf(statbuffer, sizeof statbuffer, "Number of PCI Devices: %d",
+ hardware->nb_pci_devices);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ add_item("", "", OPT_SEP, "", 0);
+
+ if (hardware->is_pxe_valid == true) {
+ struct s_pxe *p = &hardware->pxe;
+
+ snprintf(buffer, sizeof buffer, "PXE MAC Address: %s",
+ p->mac_addr);
+ snprintf(statbuffer, sizeof statbuffer, "PXE MAC Address: %s",
+ p->mac_addr);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "PXE IP Address : %d.%d.%d.%d",
+ p->ip_addr[0], p->ip_addr[1], p->ip_addr[2],
+ p->ip_addr[3]);
+ snprintf(statbuffer, sizeof statbuffer,
+ "PXE IP Address: %d.%d.%d.%d", p->ip_addr[0],
+ p->ip_addr[1], p->ip_addr[2], p->ip_addr[3]);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ add_item("", "", OPT_SEP, "", 0);
+ }
+
+ if (hardware->modules_pcimap_return_code != -ENOMODULESPCIMAP) {
+ bool kmod = false;
+ struct pci_device *pci_device;
+ char kernel_modules[LINUX_KERNEL_MODULE_SIZE *
+ MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+
+ /*
+ * For every detected pci device, grab its kernel module to compute
+ * this submenu
+ */
+ for_each_pci_func(pci_device, hardware->pci_domain) {
+ memset(kernel_modules, 0, sizeof kernel_modules);
+ for (int i = 0;
+ i <
+ pci_device->dev_info->linux_kernel_module_count;
+ i++) {
+ if (i > 0) {
+ strncat(kernel_modules, " | ", 3);
+ }
+ strncat(kernel_modules,
+ pci_device->dev_info->
+ linux_kernel_module[i],
+ LINUX_KERNEL_MODULE_SIZE - 1);
+ }
+ /* No need to add unknown kernel modules */
+ if (strlen(kernel_modules) > 0) {
+ snprintf(buffer, sizeof buffer, "%s (%s)",
+ kernel_modules,
+ pci_device->dev_info->class_name);
+ snprintf(statbuffer, sizeof statbuffer,
+ "%04x:%04x %s : %s\n",
+ pci_device->vendor,
+ pci_device->product,
+ pci_device->dev_info->vendor_name,
+ pci_device->dev_info->product_name);
+
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL,
+ 0);
+ menu->items_count++;
+ kmod = true;
+ }
+ }
+ if (kmod == true)
+ add_item("", "", OPT_SEP, "", 0);
+ }
+
+ printf("MENU: Summary menu done (%d items)\n", menu->items_count);
+}
diff --git a/com32/hdt/hdt-menu-syslinux.c b/com32/hdt/hdt-menu-syslinux.c
new file mode 100644
index 00000000..4c874d0e
--- /dev/null
+++ b/com32/hdt/hdt-menu-syslinux.c
@@ -0,0 +1,85 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "syslinux/config.h"
+#include "hdt-menu.h"
+
+/* Computing Syslinux menu */
+void compute_syslinuxmenu(struct s_my_menu *menu, struct s_hardware *hardware)
+{
+ char syslinux_fs_menu[24];
+ char buffer[SUBMENULEN + 1];
+ char statbuffer[STATLEN + 1];
+
+ memset(syslinux_fs_menu, 0, sizeof syslinux_fs_menu);
+
+ snprintf(syslinux_fs_menu, sizeof syslinux_fs_menu, " %s ",
+ hardware->syslinux_fs);
+ menu->menu = add_menu(syslinux_fs_menu, -1);
+ menu->items_count = 0;
+ set_menu_pos(SUBMENU_Y, SUBMENU_X);
+
+ snprintf(buffer, sizeof buffer, "Bootloader : %s",
+ hardware->syslinux_fs);
+ snprintf(statbuffer, sizeof statbuffer, "Bootloader: %s",
+ hardware->syslinux_fs);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Version : %s",
+ hardware->sv->version_string + 2);
+ snprintf(statbuffer, sizeof statbuffer, "Version: %s",
+ hardware->sv->version_string + 2);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Version : %u",
+ hardware->sv->version);
+ snprintf(statbuffer, sizeof statbuffer, "Version: %u",
+ hardware->sv->version);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ snprintf(buffer, sizeof buffer, "Max API : %u",
+ hardware->sv->max_api);
+ snprintf(statbuffer, sizeof statbuffer, "Max API: %u",
+ hardware->sv->max_api);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ add_item("", "", OPT_SEP, "", 0);
+
+ snprintf(buffer, sizeof buffer, "%s",
+ hardware->sv->copyright_string + 1);
+ snprintf(statbuffer, sizeof statbuffer, "%s",
+ hardware->sv->copyright_string + 1);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+
+ printf("MENU: Syslinux menu done (%d items)\n", menu->items_count);
+}
diff --git a/com32/hdt/hdt-menu-vesa.c b/com32/hdt/hdt-menu-vesa.c
new file mode 100644
index 00000000..d969a291
--- /dev/null
+++ b/com32/hdt/hdt-menu-vesa.c
@@ -0,0 +1,106 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+*/
+
+#include "hdt-menu.h"
+
+
+/* Submenu for the vesa card */
+void compute_vesa_card(struct s_my_menu *menu, struct s_hardware *hardware) {
+ char buffer[SUBMENULEN+1];
+ char statbuffer[STATLEN+1];
+
+ menu->menu = add_menu(" VESA Bios ",-1);
+ menu->items_count=0;
+ set_menu_pos(SUBMENU_Y,SUBMENU_X);
+
+ snprintf(buffer,sizeof buffer,"VESA Version: %d.%d",hardware->vesa.major_version,hardware->vesa.minor_version);
+ snprintf(statbuffer,sizeof statbuffer,"Version: %d.%d",hardware->vesa.major_version,hardware->vesa.minor_version);
+ add_item(buffer,statbuffer,OPT_INACTIVE,NULL,0);
+ menu->items_count++;
+
+ snprintf(buffer,sizeof buffer,"Vendor : %s",hardware->vesa.vendor);
+ snprintf(statbuffer,sizeof statbuffer,"Vendor Name: %s",hardware->vesa.vendor);
+ add_item(buffer,statbuffer,OPT_INACTIVE,NULL,0);
+ menu->items_count++;
+
+ snprintf(buffer,sizeof buffer,"Product : %s",hardware->vesa.product);
+ snprintf(statbuffer,sizeof statbuffer,"Product Name: %s",hardware->vesa.product);
+ add_item(buffer,statbuffer,OPT_INACTIVE,NULL,0);
+ menu->items_count++;
+
+ snprintf(buffer,sizeof buffer,"Product Rev.: %s",hardware->vesa.product_revision);
+ snprintf(statbuffer,sizeof statbuffer,"Produt Revision: %s",hardware->vesa.product_revision);
+ add_item(buffer,statbuffer,OPT_INACTIVE,NULL,0);
+ menu->items_count++;
+
+ snprintf(buffer,sizeof buffer,"Software Rev: %s",hardware->vesa.software_rev);
+ snprintf(statbuffer,sizeof statbuffer,"Software Revision: %s",hardware->vesa.software_rev);
+ add_item(buffer,statbuffer,OPT_INACTIVE,NULL,0);
+ menu->items_count++;
+
+ snprintf(buffer,sizeof buffer,"Memory (KB) : %d",hardware->vesa.total_memory*64);
+ snprintf(statbuffer,sizeof statbuffer,"Memory (KB): %d",hardware->vesa.total_memory*64);
+ add_item(buffer,statbuffer,OPT_INACTIVE,NULL,0);
+ menu->items_count++;
+}
+
+/* Submenu for the vesa card */
+void compute_vesa_modes(struct s_my_menu *menu, struct s_hardware *hardware) {
+ char buffer[56];
+ char statbuffer[STATLEN];
+
+ menu->menu = add_menu(" VESA Modes ",-1);
+ menu->items_count=0;
+ set_menu_pos(SUBMENU_Y,SUBMENU_X);
+ for (int i=0;i<hardware->vesa.vmi_count;i++) {
+ struct vesa_mode_info *mi=&hardware->vesa.vmi[i].mi;
+ snprintf(buffer,sizeof buffer,"%4u x %4u x %2ubits vga=%3d",
+ mi->h_res, mi->v_res, mi->bpp, hardware->vesa.vmi[i].mode+0x200);
+ snprintf(statbuffer,sizeof statbuffer,"%4ux%4ux%2ubits vga=%3d",
+ mi->h_res, mi->v_res, mi->bpp, hardware->vesa.vmi[i].mode+0x200);
+ add_item(buffer,statbuffer,OPT_INACTIVE,NULL,0);
+ menu->items_count++;
+ }
+}
+
+/* Main VESA Menu*/
+int compute_VESA(struct s_hdt_menu *hdt_menu, struct s_hardware *hardware) {
+ char buffer[15];
+ compute_vesa_card(&hdt_menu->vesa_card_menu,hardware);
+ compute_vesa_modes(&hdt_menu->vesa_modes_menu,hardware);
+ hdt_menu->vesa_menu.menu = add_menu(" VESA ",-1);
+ hdt_menu->vesa_menu.items_count=0;
+
+ add_item("VESA Bios","VESA Bios",OPT_SUBMENU,NULL,hdt_menu->vesa_card_menu.menu);
+ hdt_menu->vesa_menu.items_count++;
+ snprintf(buffer,sizeof buffer,"%s (%d)","Modes",hardware->vesa.vmi_count);
+ add_item(buffer,"VESA Modes",OPT_SUBMENU,NULL,hdt_menu->vesa_modes_menu.menu);
+ hdt_menu->vesa_menu.items_count++;
+ printf("MENU: VESA menu done (%d items)\n",hdt_menu->vesa_menu.items_count);
+ return 0;
+}
diff --git a/com32/hdt/hdt-menu.c b/com32/hdt/hdt-menu.c
new file mode 100644
index 00000000..a0196c24
--- /dev/null
+++ b/com32/hdt/hdt-menu.c
@@ -0,0 +1,299 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#include "hdt-menu.h"
+
+int start_menu_mode(struct s_hardware *hardware, char *version_string)
+{
+ struct s_hdt_menu hdt_menu;
+
+ memset(&hdt_menu, 0, sizeof(hdt_menu));
+
+ /* Detect every kind of hardware */
+ detect_hardware(hardware);
+
+ /* Setup the menu system */
+ setup_menu(version_string);
+
+ /* Compute all submenus */
+ compute_submenus(&hdt_menu, hardware);
+
+ /* Compute the main menu */
+ compute_main_menu(&hdt_menu, hardware);
+
+#ifdef WITH_MENU_DISPLAY
+ t_menuitem *curr;
+ char cmd[160];
+
+ printf("Starting Menu (%d menus)\n", hdt_menu.total_menu_count);
+ curr = showmenus(hdt_menu.main_menu.menu);
+ /* When we exit the menu, do we have something to do? */
+ if (curr) {
+ /* When want to execute something */
+ if (curr->action == OPT_RUN) {
+ /* Tweak, we want to switch to the cli */
+ if (!strncmp
+ (curr->data, HDT_SWITCH_TO_CLI,
+ sizeof(HDT_SWITCH_TO_CLI))) {
+ return HDT_RETURN_TO_CLI;
+ }
+ strcpy(cmd, curr->data);
+
+ /* Use specific syslinux call if needed */
+ if (issyslinux())
+ runsyslinuxcmd(cmd);
+ else
+ csprint(cmd, 0x07);
+ return 1; // Should not happen when run from SYSLINUX
+ }
+ }
+#endif
+ return 0;
+}
+
+/* In the menu system, what to do on keyboard timeout */
+TIMEOUTCODE ontimeout()
+{
+ // beep();
+ return CODE_WAIT;
+}
+
+/* Keyboard handler for the menu system */
+void keys_handler(t_menusystem * ms, t_menuitem * mi, unsigned int scancode)
+{
+ char nc;
+
+ if ((scancode >> 8) == F1) { // If scancode of F1
+ runhelpsystem(mi->helpid);
+ }
+ /*
+ * If user hit TAB, and item is an "executable" item
+ * and user has privileges to edit it, edit it in place.
+ */
+ if (((scancode & 0xFF) == 0x09) && (mi->action == OPT_RUN)) {
+//(isallowed(username,"editcmd") || isallowed(username,"root"))) {
+ nc = getnumcols();
+ /* User typed TAB and has permissions to edit command line */
+ gotoxy(EDITPROMPT, 1, ms->menupage);
+ csprint("Command line:", 0x07);
+ editstring(mi->data, ACTIONLEN);
+ gotoxy(EDITPROMPT, 1, ms->menupage);
+ cprint(' ', 0x07, nc - 1, ms->menupage);
+ }
+}
+
+/* Setup the Menu system */
+void setup_menu(char *version)
+{
+ /* Creating the menu */
+ init_menusystem(version);
+ set_window_size(0, 0, 24, 80);
+
+ /* Register the menusystem handler */
+ // reg_handler(HDLR_SCREEN,&msys_handler);
+ reg_handler(HDLR_KEYS, &keys_handler);
+
+ /* Register the ontimeout handler, with a time out of 10 seconds */
+ reg_ontimeout(ontimeout, 1000, 0);
+}
+
+/* Compute Main' submenus */
+void compute_submenus(struct s_hdt_menu *hdt_menu, struct s_hardware *hardware)
+{
+
+ /* Compute this menu if a DMI table exists */
+ if (hardware->is_dmi_valid) {
+ if (hardware->dmi.base_board.filled == true)
+ compute_motherboard(&(hdt_menu->mobo_menu),
+ &(hardware->dmi));
+ if (hardware->dmi.chassis.filled == true)
+ compute_chassis(&(hdt_menu->chassis_menu),
+ &(hardware->dmi));
+ if (hardware->dmi.system.filled == true)
+ compute_system(&(hdt_menu->system_menu),
+ &(hardware->dmi));
+ for (int i = 0; i < hardware->dmi.memory_count; i++) {
+ if (hardware->dmi.memory[i].filled == true) {
+ compute_memory(hdt_menu, &(hardware->dmi));
+ break;
+ }
+ }
+ if (hardware->dmi.bios.filled == true)
+ compute_bios(&(hdt_menu->bios_menu), &(hardware->dmi));
+ if (hardware->dmi.battery.filled == true)
+ compute_battery(&(hdt_menu->battery_menu),
+ &(hardware->dmi));
+ }
+
+ compute_processor(&(hdt_menu->cpu_menu), hardware);
+ compute_disks(hdt_menu, hardware->disk_info);
+#ifdef WITH_PCI
+ compute_PCI(hdt_menu, hardware);
+ compute_PXE(&(hdt_menu->pxe_menu), hardware);
+ compute_kernel(&(hdt_menu->kernel_menu), hardware);
+#endif
+ compute_summarymenu(&(hdt_menu->summary_menu), hardware);
+ compute_syslinuxmenu(&(hdt_menu->syslinux_menu), hardware);
+ compute_VESA(hdt_menu,hardware);
+ compute_aboutmenu(&(hdt_menu->about_menu));
+}
+
+void compute_main_menu(struct s_hdt_menu *hdt_menu, struct s_hardware *hardware)
+{
+ char menu_item[64];
+ /* Let's count the number of menus we have */
+ hdt_menu->total_menu_count = 0;
+ hdt_menu->main_menu.items_count = 0;
+
+ hdt_menu->main_menu.menu = add_menu(" Main Menu ", -1);
+ set_item_options(-1, 24);
+
+#ifdef WITH_PCI
+ snprintf(menu_item, sizeof(menu_item), "PC<I> Devices(%2d)\n",
+ hardware->nb_pci_devices);
+ add_item(menu_item, "PCI Devices Menu", OPT_SUBMENU, NULL,
+ hdt_menu->pci_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ hdt_menu->total_menu_count += hdt_menu->pci_menu.items_count;
+#endif
+ if (hdt_menu->disk_menu.items_count > 0) {
+ snprintf(menu_item, sizeof(menu_item), "<D>isks (%2d)\n",
+ hdt_menu->disk_menu.items_count);
+ add_item(menu_item, "Disks Menu", OPT_SUBMENU, NULL,
+ hdt_menu->disk_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ hdt_menu->total_menu_count += hdt_menu->disk_menu.items_count;
+ }
+
+ if (hdt_menu->memory_menu.items_count > 0) {
+ snprintf(menu_item, sizeof(menu_item), "<M>emory (%2d)\n",
+ hdt_menu->memory_menu.items_count);
+ add_item(menu_item, "Memory Menu", OPT_SUBMENU, NULL,
+ hdt_menu->memory_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ hdt_menu->total_menu_count += hdt_menu->memory_menu.items_count;
+ }
+ add_item("<P>rocessor", "Main Processor Menu", OPT_SUBMENU, NULL,
+ hdt_menu->cpu_menu.menu);
+ hdt_menu->main_menu.items_count++;
+
+ if (hardware->is_dmi_valid) {
+ if (hardware->dmi.base_board.filled == true) {
+ add_item("M<o>therboard", "Motherboard Menu",
+ OPT_SUBMENU, NULL, hdt_menu->mobo_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ }
+
+ if (hardware->dmi.bios.filled == true) {
+ add_item("<B>ios", "Bios Menu", OPT_SUBMENU, NULL,
+ hdt_menu->bios_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ }
+
+ if (hardware->dmi.chassis.filled == true) {
+ add_item("<C>hassis", "Chassis Menu", OPT_SUBMENU, NULL,
+ hdt_menu->chassis_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ }
+
+ if (hardware->dmi.system.filled == true) {
+ add_item("<S>ystem", "System Menu", OPT_SUBMENU, NULL,
+ hdt_menu->system_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ }
+
+ if (hardware->dmi.battery.filled == true) {
+ add_item("Ba<t>tery", "Battery Menu", OPT_SUBMENU, NULL,
+ hdt_menu->battery_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ }
+ }
+
+ if (hardware->is_pxe_valid == true) {
+ add_item("P<X>E", "PXE Information Menu", OPT_SUBMENU, NULL,
+ hdt_menu->pxe_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ }
+
+ if (hardware->is_vesa_valid == true) {
+ add_item("<V>ESA","VESA Information Menu", OPT_SUBMENU, NULL,
+ hdt_menu->vesa_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ }
+
+ add_item("", "", OPT_SEP, "", 0);
+#ifdef WITH_PCI
+ if (hardware->modules_pcimap_return_code != -ENOMODULESPCIMAP) {
+ add_item("<K>ernel Modules", "Kernel Modules Menu", OPT_SUBMENU,
+ NULL, hdt_menu->kernel_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ }
+#endif
+ add_item("S<y>slinux", "Syslinux Information Menu", OPT_SUBMENU, NULL,
+ hdt_menu->syslinux_menu.menu);
+ hdt_menu->main_menu.items_count++;
+ add_item("S<u>mmary", "Summary Information Menu", OPT_SUBMENU, NULL,
+ hdt_menu->summary_menu.menu);
+ hdt_menu->main_menu.items_count++;
+
+ add_item("", "", OPT_SEP, "", 0);
+
+ add_item("S<w>itch to CLI", "Switch to Command Line", OPT_RUN,
+ HDT_SWITCH_TO_CLI, 0);
+ add_item("<A>bout", "About Menu", OPT_SUBMENU, NULL,
+ hdt_menu->about_menu.menu);
+ hdt_menu->main_menu.items_count++;
+
+ hdt_menu->total_menu_count += hdt_menu->main_menu.items_count;
+}
+
+void detect_hardware(struct s_hardware *hardware)
+{
+ printf("CPU: Detecting\n");
+ cpu_detect(hardware);
+
+ printf("DISKS: Detecting\n");
+ detect_disks(hardware);
+
+ printf("DMI: Detecting Table\n");
+ if (detect_dmi(hardware) == -ENODMITABLE) {
+ printf("DMI: ERROR ! Table not found ! \n");
+ printf
+ ("DMI: Many hardware components will not be detected ! \n");
+ } else {
+ printf("DMI: Table found ! (version %d.%d)\n",
+ hardware->dmi.dmitable.major_version,
+ hardware->dmi.dmitable.minor_version);
+ }
+#ifdef WITH_PCI
+ detect_pci(hardware);
+ printf("PCI: %d Devices Found\n", hardware->nb_pci_devices);
+#endif
+ printf("VESA: Detecting\n");
+ detect_vesa(hardware);
+}
diff --git a/com32/hdt/hdt-menu.h b/com32/hdt/hdt-menu.h
new file mode 100644
index 00000000..fbb21e26
--- /dev/null
+++ b/com32/hdt/hdt-menu.h
@@ -0,0 +1,128 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#ifndef DEFINE_HDT_MENU_H
+#define DEFINE_HDT_MENU_H
+#include <stdio.h>
+
+#include "menu.h"
+#include "help.h"
+//#include "cpuid.h"
+#include "sys/pci.h"
+#include "hdt-common.h"
+#include "dmi/dmi.h"
+#include "hdt-ata.h"
+
+#define EDITPROMPT 21
+
+#define SUBMENULEN 46
+
+#define SUBMENU_Y 3
+#define SUBMENU_X 29
+
+#define MAX_PCI_SUB_MENU 128
+#define MAX_MEMORY_SUB_MENU 32
+#define MAX_DISK_SUB_MENU 32
+
+struct s_my_menu {
+ unsigned char menu;
+ int items_count;
+};
+
+struct s_hdt_menu {
+ struct s_my_menu main_menu;
+ struct s_my_menu cpu_menu;
+ struct s_my_menu mobo_menu;
+ struct s_my_menu chassis_menu;
+ struct s_my_menu bios_menu;
+ struct s_my_menu system_menu;
+ struct s_my_menu pci_menu;
+ struct s_my_menu pci_sub_menu[MAX_PCI_SUB_MENU];
+ struct s_my_menu kernel_menu;
+ struct s_my_menu memory_menu;
+ struct s_my_menu memory_sub_menu[MAX_MEMORY_SUB_MENU];
+ struct s_my_menu disk_menu;
+ struct s_my_menu disk_sub_menu[MAX_DISK_SUB_MENU];
+ struct s_my_menu battery_menu;
+ struct s_my_menu syslinux_menu;
+ struct s_my_menu about_menu;
+ struct s_my_menu summary_menu;
+ struct s_my_menu pxe_menu;
+ struct s_my_menu vesa_menu;
+ struct s_my_menu vesa_card_menu;
+ struct s_my_menu vesa_modes_menu;
+ int total_menu_count; // Sum of all menus we have
+};
+
+TIMEOUTCODE ontimeout();
+void keys_handler(t_menusystem * ms, t_menuitem * mi, unsigned int scancode);
+
+// PCI Stuff
+int compute_PCI(struct s_hdt_menu *hdt_menu, struct s_hardware *hardware);
+
+// KERNEL Stuff
+void compute_kernel(struct s_my_menu *menu, struct s_hardware *hardware);
+
+// Disk Stuff
+int compute_disk_module(struct s_my_menu *menu, int nb_sub_disk_menu,
+ struct diskinfo *d, int disk_number);
+void compute_disks(struct s_hdt_menu *menu, struct diskinfo *disk_info);
+
+// DMI Stuff
+void compute_motherboard(struct s_my_menu *menu, s_dmi * dmi);
+void compute_battery(struct s_my_menu *menu, s_dmi * dmi);
+void compute_system(struct s_my_menu *menu, s_dmi * dmi);
+void compute_chassis(struct s_my_menu *menu, s_dmi * dmi);
+void compute_bios(struct s_my_menu *menu, s_dmi * dmi);
+void compute_memory(struct s_hdt_menu *menu, s_dmi * dmi);
+
+// Processor Stuff
+void compute_processor(struct s_my_menu *menu, struct s_hardware *hardware);
+
+// Syslinux stuff
+void compute_syslinuxmenu(struct s_my_menu *menu, struct s_hardware *hardware);
+
+// About menu
+void compute_aboutmenu(struct s_my_menu *menu);
+
+// Summary menu
+void compute_summarymenu(struct s_my_menu *menu, struct s_hardware *hardware);
+
+// PXE menu
+void compute_PXE(struct s_my_menu *menu, struct s_hardware *hardware);
+
+//VESA menu
+int compute_VESA(struct s_hdt_menu *hdt_menu, struct s_hardware *hardware);
+
+int start_menu_mode(struct s_hardware *hardware, char *version_string);
+void setup_menu(char *version);
+void compute_main_menu(struct s_hdt_menu *hdt_menu,
+ struct s_hardware *hardware);
+void compute_submenus(struct s_hdt_menu *hdt_menu, struct s_hardware *hardware);
+void detect_hardware(struct s_hardware *hardware);
+#endif
diff --git a/com32/hdt/hdt.c b/com32/hdt/hdt.c
new file mode 100644
index 00000000..93e2fa0b
--- /dev/null
+++ b/com32/hdt/hdt.c
@@ -0,0 +1,81 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+/*
+ * hdt.c
+ *
+ * An Hardware Detection Tool
+ */
+
+#include <stdio.h>
+#include <console.h>
+
+#include "hdt.h"
+#include "hdt-menu.h"
+#include "hdt-cli.h"
+#include "hdt-common.h"
+
+int display_line_nb = 0;
+
+int main(const int argc, const char *argv[])
+{
+ char version_string[256];
+ const char *arg;
+ struct s_hardware hardware;
+
+ snprintf(version_string, sizeof version_string, "%s %s by %s",
+ PRODUCT_NAME,VERSION,AUTHOR);
+
+ /* Cleaning structures */
+ init_hardware(&hardware);
+
+ /* Detecting parameters */
+ detect_parameters(argc, argv, &hardware);
+
+ /* Detecting Syslinux version */
+ detect_syslinux(&hardware);
+
+ /* Opening the Syslinux console */
+ openconsole(&dev_stdcon_r, &dev_ansicon_w);
+
+ clear_screen();
+ printf("%s\n", version_string);
+
+ if ((arg = find_argument(argv + 1, "nomenu")))
+ start_cli_mode(&hardware);
+ else {
+ int return_code = start_menu_mode(&hardware, version_string);
+
+ if (return_code == HDT_RETURN_TO_CLI)
+ start_cli_mode(&hardware);
+ else
+ return return_code;
+ }
+
+ return 0;
+}
diff --git a/com32/hdt/hdt.h b/com32/hdt/hdt.h
new file mode 100644
index 00000000..9f96200b
--- /dev/null
+++ b/com32/hdt/hdt.h
@@ -0,0 +1,42 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2009 Erwan Velu - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * -----------------------------------------------------------------------
+ */
+
+#ifndef DEFINE_HDT_H
+#define DEFINE_HDT_H
+
+#define PRODUCT_NAME "Hardware Detection Tool"
+#define AUTHOR "Erwan Velu"
+#define CONTACT "erwan(dot)velu(point)free(dot)fr"
+#define VERSION "0.2.4"
+
+#define ATTR_PACKED __attribute__((packed))
+
+#define WITH_PCI 1
+#define WITH_MENU_DISPLAY 1
+
+#endif
diff --git a/com32/include/dmi/dmi_processor.h b/com32/include/dmi/dmi_processor.h
deleted file mode 100644
index 26ac97ac..00000000
--- a/com32/include/dmi/dmi_processor.h
+++ /dev/null
@@ -1,482 +0,0 @@
-/* ----------------------------------------------------------------------- *
- *
- * Copyright 2006 Erwan Velu - All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
- * Boston MA 02111-1307, USA; either version 2 of the License, or
- * (at your option) any later version; incorporated herein by reference.
- *
- * ----------------------------------------------------------------------- */
-
-#ifndef DMI_PROCESSOR_H
-#define DMI_PROCESSOR_H
-
-#include "stdbool.h"
-#define PROCESSOR_SOCKET_DESIGNATION_SIZE 32
-#define PROCESSOR_TYPE_SIZE 32
-#define PROCESSOR_FAMILY_SIZE 32
-#define PROCESSOR_MANUFACTURER_SIZE 64
-#define PROCESSOR_VERSION_SIZE 32
-#define PROCESSOR_VOLTAGE_SIZE 16
-#define PROCESSOR_STATUS_SIZE 16
-#define PROCESSOR_UPGRADE_SIZE 16
-#define PROCESSOR_CACHE_SIZE 16
-#define PROCESSOR_SERIAL_SIZE 32
-#define PROCESSOR_ASSET_TAG_SIZE 32
-#define PROCESSOR_PART_NUMBER_SIZE 32
-#define PROCESSOR_ID_SIZE 32
-
-#define PROCESSOR_FLAGS_ELEMENTS 32
-/* Intel AP-485 revision 28, table 5 */
-static const char *cpu_flags_strings[32]={
- "FPU (Floating-point unit on-chip)", /* 0 */
- "VME (Virtual mode extension)",
- "DE (Debugging extension)",
- "PSE (Page size extension)",
- "TSC (Time stamp counter)",
- "MSR (Model specific registers)",
- "PAE (Physical address extension)",
- "MCE (Machine check exception)",
- "CX8 (CMPXCHG8 instruction supported)",
- "APIC (On-chip APIC hardware supported)",
- NULL, /* 10 */
- "SEP (Fast system call)",
- "MTRR (Memory type range registers)",
- "PGE (Page global enable)",
- "MCA (Machine check architecture)",
- "CMOV (Conditional move instruction supported)",
- "PAT (Page attribute table)",
- "PSE-36 (36-bit page size extension)",
- "PSN (Processor serial number present and enabled)",
- "CLFSH (CLFLUSH instruction supported)",
- NULL, /* 20 */
- "DS (Debug store)",
- "ACPI (ACPI supported)",
- "MMX (MMX technology supported)",
- "FXSR (Fast floating-point save and restore)",
- "SSE (Streaming SIMD extensions)",
- "SSE2 (Streaming SIMD extensions 2)",
- "SS (Self-snoop)",
- "HTT (Hyper-threading technology)",
- "TM (Thermal monitor supported)",
- NULL, /* 30 */
- "PBE (Pending break enabled)" /* 31 */
-};
-
-/* this struct have PROCESSOR_FLAGS_ELEMENTS */
-/* each bool is associated to the relevant message above */
-typedef struct {
-bool fpu;
-bool vme;
-bool de;
-bool pse;
-bool tsc;
-bool msr;
-bool pae;
-bool mce;
-bool cx8;
-bool apic;
-bool null_10;
-bool sep;
-bool mtrr;
-bool pge;
-bool mca;
-bool cmov;
-bool pat;
-bool pse_36;
-bool psn;
-bool clfsh;
-bool null_20;
-bool ds;
-bool acpi;
-bool mmx;
-bool fxsr;
-bool sse;
-bool sse2;
-bool ss;
-bool htt;
-bool tm;
-bool null_30;
-bool pbe;
-} __attribute__((__packed__)) s_cpu_flags;
-
-typedef struct {
-u8 type;
-u8 family;
-u8 model;
-u8 stepping;
-u8 minor_stepping;
-} __attribute__((__packed__)) s_signature;
-
-typedef struct {
-char socket_designation[PROCESSOR_SOCKET_DESIGNATION_SIZE];
-char type[PROCESSOR_TYPE_SIZE];
-char family[PROCESSOR_FAMILY_SIZE];
-char manufacturer[PROCESSOR_MANUFACTURER_SIZE];
-char version[PROCESSOR_VERSION_SIZE];
-float voltage;
-u16 external_clock;
-u16 max_speed;
-u16 current_speed;
-char status[PROCESSOR_STATUS_SIZE];
-char upgrade[PROCESSOR_UPGRADE_SIZE];
-char cache1[PROCESSOR_CACHE_SIZE];
-char cache2[PROCESSOR_CACHE_SIZE];
-char cache3[PROCESSOR_CACHE_SIZE];
-char serial[PROCESSOR_SERIAL_SIZE];
-char asset_tag[PROCESSOR_ASSET_TAG_SIZE];
-char part_number[PROCESSOR_PART_NUMBER_SIZE];
-char id[PROCESSOR_ID_SIZE];
-s_cpu_flags cpu_flags;
-s_signature signature;
-} s_processor;
-
-static const char *dmi_processor_type(u8 code)
-{
- /* 3.3.5.1 */
- static const char *type[]={
- "Other", /* 0x01 */
- "Unknown",
- "Central Processor",
- "Math Processor",
- "DSP Processor",
- "Video Processor" /* 0x06 */
- };
-
- if(code>=0x01 && code<=0x06)
- return type[code-0x01];
- return out_of_spec;
-}
-
-static const char *dmi_processor_family(u8 code)
-{
- /* 3.3.5.2 */
- static const char *family[]={
- NULL, /* 0x00 */
- "Other",
- "Unknown",
- "8086",
- "80286",
- "80386",
- "80486",
- "8087",
- "80287",
- "80387",
- "80487",
- "Pentium",
- "Pentium Pro",
- "Pentium II",
- "Pentium MMX",
- "Celeron",
- "Pentium II Xeon",
- "Pentium III",
- "M1",
- "M2",
- NULL, /* 0x14 */
- NULL,
- NULL,
- NULL, /* 0x17 */
- "Duron",
- "K5",
- "K6",
- "K6-2",
- "K6-3",
- "Athlon",
- "AMD2900",
- "K6-2+",
- "Power PC",
- "Power PC 601",
- "Power PC 603",
- "Power PC 603+",
- "Power PC 604",
- "Power PC 620",
- "Power PC x704",
- "Power PC 750",
- NULL, /* 0x28 */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,/* 0x2F */
- "Alpha",
- "Alpha 21064",
- "Alpha 21066",
- "Alpha 21164",
- "Alpha 21164PC",
- "Alpha 21164a",
- "Alpha 21264",
- "Alpha 21364",
- NULL, /* 0x38 */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0x3F */
- "MIPS",
- "MIPS R4000",
- "MIPS R4200",
- "MIPS R4400",
- "MIPS R4600",
- "MIPS R10000",
- NULL, /* 0x46 */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0x4F */
- "SPARC",
- "SuperSPARC",
- "MicroSPARC II",
- "MicroSPARC IIep",
- "UltraSPARC",
- "UltraSPARC II",
- "UltraSPARC IIi",
- "UltraSPARC III",
- "UltraSPARC IIIi",
- NULL, /* 0x59 */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0x5F */
- "68040",
- "68xxx",
- "68000",
- "68010",
- "68020",
- "68030",
- NULL, /* 0x66 */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0x6F */
- "Hobbit",
- NULL, /* 0x71 */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0x77 */
- "Crusoe TM5000",
- "Crusoe TM3000",
- "Efficeon TM8000",
- NULL, /* 0x7B */
- NULL,
- NULL,
- NULL,
- NULL, /* 0x7F */
- "Weitek",
- NULL, /* 0x81 */
- "Itanium",
- "Athlon 64",
- "Opteron",
- "Sempron",
- NULL, /* 0x86 */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0x8F */
- "PA-RISC",
- "PA-RISC 8500",
- "PA-RISC 8000",
- "PA-RISC 7300LC",
- "PA-RISC 7200",
- "PA-RISC 7100LC",
- "PA-RISC 7100",
- NULL, /* 0x97 */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0x9F */
- "V30",
- NULL, /* 0xA1 */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0xAF */
- "Pentium III Xeon",
- "Pentium III Speedstep",
- "Pentium 4",
- "Xeon",
- "AS400",
- "Xeon MP",
- "Athlon XP",
- "Athlon MP",
- "Itanium 2",
- "Pentium M",
- NULL, /* 0xBA */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0xC7 */
- "IBM390",
- "G4",
- "G5",
- NULL, /* 0xCB */
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL, /* 0xF9 */
- "i860",
- "i960",
- NULL, /* 0xFC */
- NULL,
- NULL,
- NULL /* 0xFF */
- /* master.mif has values beyond that, but they can't be used for DMI */
- };
-
- if(family[code]!=NULL) {
- return family[code];
- }
- return out_of_spec;
-}
-
-static const char *dmi_processor_status(u8 code)
-{
- static const char *status[]={
- "Unknown", /* 0x00 */
- "Enabled",
- "Disabled By User",
- "Disabled By BIOS",
- "Idle", /* 0x04 */
- "Other" /* 0x07 */
- };
-
- if(code<=0x04)
- return status[code];
- if(code==0x07)
- return status[0x05];
- return out_of_spec;
-}
-static const char *dmi_processor_upgrade(u8 code)
-{
- /* 3.3.5.5 */
- static const char *upgrade[]={
- "Other", /* 0x01 */
- "Unknown",
- "Daughter Board",
- "ZIF Socket",
- "Replaceable Piggy Back",
- "None",
- "LIF Socket",
- "Slot 1",
- "Slot 2",
- "370-pin Socket",
- "Slot A",
- "Slot M",
- "Socket 423",
- "Socket A (Socket 462)",
- "Socket 478",
- "Socket 754",
- "Socket 940",
- "Socket 939" /* 0x12 */
- };
-
- if(code>=0x01 && code<=0x11)
- return upgrade[code-0x01];
- return out_of_spec;
-}
-
-static void dmi_processor_cache(u16 code, const char *level, u16 ver, char *cache)
-{
- if(code==0xFFFF)
- {
- if(ver>=0x0203)
- sprintf(cache,"Not Provided");
- else
- sprintf(cache,"No %s Cache", level);
- }
- else
- sprintf(cache,"0x%04X", code);
-}
-
-
-#endif
diff --git a/com32/include/string.h b/com32/include/string.h
index af9792b6..c964ee3b 100644
--- a/com32/include/string.h
+++ b/com32/include/string.h
@@ -23,6 +23,7 @@ __extern char *strcat(char *, const char *);
__extern char *strchr(const char *, int);
__extern int strcmp(const char *, const char *);
__extern char *strcpy(char *, const char *);
+__extern char *strpcpy(char *, const char *);
__extern size_t strcspn(const char *, const char *);
__extern char *strdup(const char *);
__extern char *strndup(const char *, size_t);
diff --git a/com32/include/sys/pci.h b/com32/include/sys/pci.h
index 1de095af..18e97548 100644
--- a/com32/include/sys/pci.h
+++ b/com32/include/sys/pci.h
@@ -4,18 +4,34 @@
#include <inttypes.h>
#include <sys/io.h>
-#define MAX_PCI_FUNC 8
-#define MAX_PCI_DEVICES 32
-#define MAX_PCI_BUSES 256
+#define MAX_PCI_FUNC 8
+#define MAX_PCI_DEVICES 32
+#define MAX_PCI_BUSES 256
+#define LINUX_KERNEL_MODULE_SIZE 64
+#define PCI_VENDOR_NAME_SIZE 256
+#define PCI_PRODUCT_NAME_SIZE 256
+#define PCI_CLASS_NAME_SIZE 256
+#define MAX_KERNEL_MODULES_PER_PCI_DEVICE 10
+#define MAX_PCI_CLASSES 256
typedef uint32_t pciaddr_t;
+enum {
+ ENOPCIIDS = 100,
+ ENOMODULESPCIMAP
+};
+
/* a structure for extended pci information */
/* XXX: use pointers for these? */
struct pci_dev_info {
- char vendor_name[256];
- char product_name[256];
- char linux_kernel_module[64];
+ char vendor_name[PCI_VENDOR_NAME_SIZE];
+ char product_name[PCI_PRODUCT_NAME_SIZE];
+ char linux_kernel_module[LINUX_KERNEL_MODULE_SIZE][MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+ int linux_kernel_module_count;
+ char class_name[PCI_CLASS_NAME_SIZE]; /* The most precise class name */
+ char category_name[PCI_CLASS_NAME_SIZE]; /*The general category*/
+ uint8_t irq;
+ uint8_t latency;
};
/* PCI device (really, function) */
@@ -117,7 +133,8 @@ struct pci_domain *pci_scan(void);
void free_pci_domain(struct pci_domain *domain);
struct match * find_pci_device(const struct pci_domain *pci_domain,
struct match *list);
-int get_name_from_pci_ids(struct pci_domain *pci_domain);
-int get_module_name_from_pci_ids(struct pci_domain *pci_domain);
-
+int get_name_from_pci_ids(struct pci_domain *pci_domain, char *pciids_path);
+int get_module_name_from_pci_ids(struct pci_domain *pci_domain, char *modules_pcimap_path);
+int get_class_name_from_pci_ids(struct pci_domain *pci_domain, char *pciids_path);
+void gather_additional_pci_config(struct pci_domain *domain);
#endif /* _SYS_PCI_H */
diff --git a/com32/include/syslinux/pxe.h b/com32/include/syslinux/pxe.h
index 7550817f..31a4041e 100644
--- a/com32/include/syslinux/pxe.h
+++ b/com32/include/syslinux/pxe.h
@@ -62,6 +62,38 @@ typedef struct {
uint16_t seg;
} segoff16_t;
+typedef struct {
+uint8_t opcode;
+#define BOOTP_REQ 1
+#define BOOTP_REP 2
+uint8_t Hardware;
+uint8_t Hardlen;
+uint8_t Gatehops;
+uint32_t ident;
+uint16_t seconds;
+uint16_t Flags;
+#define BOOTP_BCAST 0x8000
+in_addr_t cip; /* Client IP address*/
+in_addr_t yip; /* You IP address*/
+in_addr_t sip; /* next server IP address*/
+in_addr_t gip; /*relay agent IP address */
+mac_addr_t CAddr;
+uint8_t Sname[64];
+uint8_t bootfile[128];
+union
+ {
+ #define BOOTP_DHCPVEND 1024
+ uint8_t d[BOOTP_DHCPVEND];
+ struct {
+ uint8_t magic[4];
+ #define VM_RFC1048 0x63825363L
+ uint32_t flags;
+ uint8_t pad[56];
+ } v;
+ } vendor;
+} __packed pxe_bootp_t;
+
+
/* Function calling structures and constants */
typedef struct s_PXENV_GET_CACHED_INFO
@@ -528,5 +560,6 @@ typedef struct s_PXENV_UNDI_ISR
/* SYSLINUX-defined PXE utility functions */
int pxe_get_cached_info(int level, void **buf, size_t *len);
+int pxe_get_nic_type(t_PXENV_UNDI_GET_NIC_TYPE *gnt);
#endif /* _SYSLINUX_PXE_H */
diff --git a/com32/lib/MCONFIG b/com32/lib/MCONFIG
index e40cf83c..aea0ed74 100644
--- a/com32/lib/MCONFIG
+++ b/com32/lib/MCONFIG
@@ -1,6 +1,5 @@
# -*- makefile -*-
-topdir = ../..
include $(topdir)/MCONFIG
GCCOPT := $(call gcc_ok,-std=gnu99,) \
diff --git a/com32/lib/Makefile b/com32/lib/Makefile
index 0cc40617..6c137f9d 100644
--- a/com32/lib/Makefile
+++ b/com32/lib/Makefile
@@ -1,4 +1,10 @@
+#
+# ONLY INCLUDE MIT OR 2/3-BSD-LICENSED CODE IN THIS LIBRARY
+#
+
# Include configuration rules
+NOGPL := 1
+topdir = ../..
include MCONFIG
LIBOBJS = \
@@ -11,8 +17,8 @@ LIBOBJS = \
exit.o onexit.o \
perror.o printf.o puts.o qsort.o realloc.o seed48.o snprintf.o \
sprintf.o srand48.o sscanf.o stack.o strcasecmp.o strcat.o \
- strchr.o strcmp.o strcpy.o strdup.o strerror.o strlen.o \
- strnlen.o \
+ strchr.o strcmp.o strcpy.o strpcpy.o strdup.o strlen.o \
+ strerror.o strnlen.o \
strncasecmp.o strncat.o strncmp.o strncpy.o strndup.o \
stpcpy.o stpncpy.o \
strntoimax.o strntoumax.o strrchr.o strsep.o strspn.o strstr.o \
@@ -92,7 +98,7 @@ LIBOBJS = \
syslinux/initramfs_file.o syslinux/initramfs_loadfile.o \
syslinux/initramfs_archive.o \
\
- syslinux/pxe_get_cached.o \
+ syslinux/pxe_get_cached.o syslinux/pxe_get_nic.o \
\
syslinux/adv.o syslinux/advwrite.o syslinux/getadv.o \
syslinux/setadv.o
@@ -113,7 +119,7 @@ libcom32.a : $(LIBOBJS)
tidy dist clean:
rm -f sys/vesa/alphatbl.c
- find . \( -name \*.o -o -name .\*.d -o -name \*.tmp \) -print0 | \
+ find . \( -name \*.o -o -name \*.a -o -name .\*.d -o -name \*.tmp \) -print0 | \
xargs -0r rm -f
spotless: clean
diff --git a/com32/lib/pci/scan.c b/com32/lib/pci/scan.c
index 98df0dd3..dd5d6402 100644
--- a/com32/lib/pci/scan.c
+++ b/com32/lib/pci/scan.c
@@ -73,7 +73,7 @@ static int hex_to_int(char *hexa)
/* Try to match any pci device to the appropriate kernel module */
/* it uses the modules.pcimap from the boot device */
-int get_module_name_from_pci_ids(struct pci_domain *domain)
+int get_module_name_from_pci_ids(struct pci_domain *domain, char *modules_pcimap_path)
{
char line[MAX_LINE];
char module_name[21]; // the module name field is 21 char long
@@ -83,7 +83,7 @@ int get_module_name_from_pci_ids(struct pci_domain *domain)
char sub_vendor_id[16];
char sub_product_id[16];
FILE *f;
- struct pci_device *dev;
+ struct pci_device *dev=NULL;
/* Intializing the linux_kernel_module for each pci device to "unknown" */
/* adding a dev_info member if needed */
@@ -94,18 +94,21 @@ int get_module_name_from_pci_ids(struct pci_domain *domain)
if (!dev->dev_info)
return -1;
}
- strcpy(dev->dev_info->linux_kernel_module, "unknown");
+ for (int i=0;i<MAX_KERNEL_MODULES_PER_PCI_DEVICE;i++) {
+ strlcpy(dev->dev_info->linux_kernel_module[i], "unknown",7);
+ }
}
/* Opening the modules.pcimap (of a linux kernel) from the boot device */
- f=fopen("modules.pcimap", "r");
+ f=fopen(modules_pcimap_path, "r");
if (!f)
- return -1;
+ return -ENOMODULESPCIMAP;
strcpy(vendor_id,"0000");
strcpy(product_id,"0000");
strcpy(sub_product_id,"0000");
strcpy(sub_vendor_id,"0000");
+ dev->dev_info->linux_kernel_module_count=0;
/* for each line we found in the modules.pcimap */
while ( fgets(line, sizeof line, f) ) {
@@ -134,35 +137,136 @@ int get_module_name_from_pci_ids(struct pci_domain *domain)
/* Searching the next field */
result = strtok( NULL, delims );
}
+ int int_vendor_id=hex_to_int(vendor_id);
+ int int_sub_vendor_id=hex_to_int(sub_vendor_id);
+ int int_product_id=hex_to_int(product_id);
+ int int_sub_product_id=hex_to_int(sub_product_id);
/* if a pci_device matches an entry, fill the linux_kernel_module with
the appropriate kernel module */
for_each_pci_func(dev, domain) {
- if (hex_to_int(vendor_id) == dev->vendor &&
- hex_to_int(product_id) == dev->product &&
- (hex_to_int(sub_product_id) & dev->sub_product)
+ if (int_vendor_id == dev->vendor &&
+ int_product_id == dev->product &&
+ (int_sub_product_id & dev->sub_product)
== dev->sub_product &&
- (hex_to_int(sub_vendor_id) & dev->sub_vendor)
- == dev->sub_vendor)
- strcpy(dev->dev_info->linux_kernel_module, module_name);
+ (int_sub_vendor_id & dev->sub_vendor)
+ == dev->sub_vendor) {
+ strcpy(dev->dev_info->linux_kernel_module[dev->dev_info->linux_kernel_module_count], module_name);
+ dev->dev_info->linux_kernel_module_count++;
+ }
}
}
fclose(f);
return 0;
}
+/* Try to match any pci device to the appropriate class name */
+/* it uses the pci.ids from the boot device */
+int get_class_name_from_pci_ids(struct pci_domain *domain, char *pciids_path)
+{
+ char line[MAX_LINE];
+ char class_name[PCI_CLASS_NAME_SIZE];
+ char sub_class_name[PCI_CLASS_NAME_SIZE];
+ char class_id_str[5];
+ char sub_class_id_str[5];
+ FILE *f;
+ struct pci_device *dev;
+ bool class_mode=false;
+
+ /* Intializing the vendor/product name for each pci device to "unknown" */
+ /* adding a dev_info member if needed */
+ for_each_pci_func(dev, domain) {
+ /* initialize the dev_info structure if it doesn't exist yet. */
+ if (! dev->dev_info) {
+ dev->dev_info = zalloc(sizeof *dev->dev_info);
+ if (!dev->dev_info)
+ return -1;
+ }
+ strlcpy(dev->dev_info->class_name,"unknown",7);
+ }
+
+ /* Opening the pci.ids from the boot device */
+ f = fopen(pciids_path,"r");
+ if (!f)
+ return -ENOPCIIDS;
+
+ /* for each line we found in the pci.ids */
+ while ( fgets(line, sizeof line, f) ) {
+ /* Skipping uncessary lines */
+ if ((line[0] == '#') || (line[0] == ' ') ||
+ (line[0] == 10))
+ continue;
+
+ /* Until we found a line starting with a 'C', we are not parsing classes */
+ if (line[0] == 'C')
+ class_mode=true;
+ if (class_mode == false)
+ continue;
+ strlcpy(class_name,"unknown",7);
+ /* If the line doesn't start with a tab, it means that's a class name */
+ if (line[0] != '\t') {
+
+ /* ignore the two first char and then copy 2 chars (class id)*/
+ strlcpy(class_id_str,&line[2],2);
+ class_id_str[2]=0;
+
+ /* the class name is the next field */
+ strlcpy(class_name,skipspace(strstr(line," ")),PCI_CLASS_NAME_SIZE-1);
+ remove_eol(class_name);
+
+ int int_class_id_str=hex_to_int(class_id_str);
+ /* assign the class_name to any matching pci device */
+ for_each_pci_func(dev, domain) {
+ if (int_class_id_str == dev->class[2]) {
+ strlcpy(dev->dev_info->class_name,class_name,PCI_CLASS_NAME_SIZE-1);
+ /* This value is usually the main category*/
+ strlcpy(dev->dev_info->category_name,class_name+4,PCI_CLASS_NAME_SIZE-1);
+ }
+ }
+ /* if we have a tab + a char, it means this is a sub class name */
+ } else if ((line[0] == '\t') && (line[1] != '\t')) {
+
+ /* the sub class name the second field */
+ strlcpy(sub_class_name,skipspace(strstr(line," ")),PCI_CLASS_NAME_SIZE-1);
+ remove_eol(sub_class_name);
+
+ /* the sub class id is first field */
+ strlcpy(sub_class_id_str,&line[1],2);
+ sub_class_id_str[2]=0;
+
+ int int_class_id_str=hex_to_int(class_id_str);
+ int int_sub_class_id_str=hex_to_int(sub_class_id_str);
+ /* assign the product_name to any matching pci device */
+ for_each_pci_func(dev, domain) {
+ if (int_class_id_str == dev->class[2] &&
+ int_sub_class_id_str == dev->class[1])
+ strlcpy(dev->dev_info->class_name,sub_class_name,PCI_CLASS_NAME_SIZE-1);
+ }
+
+ }
+ }
+ fclose(f);
+ return 0;
+}
+
+
/* Try to match any pci device to the appropriate vendor and product name */
/* it uses the pci.ids from the boot device */
-int get_name_from_pci_ids(struct pci_domain *domain)
+int get_name_from_pci_ids(struct pci_domain *domain, char *pciids_path)
{
char line[MAX_LINE];
- char vendor[255];
+ char vendor[PCI_VENDOR_NAME_SIZE];
char vendor_id[5];
- char product[255];
+ char product[PCI_PRODUCT_NAME_SIZE];
char product_id[5];
char sub_product_id[5];
char sub_vendor_id[5];
FILE *f;
struct pci_device *dev;
+ bool skip_to_next_vendor=false;
+ uint16_t int_vendor_id;
+ uint16_t int_product_id;
+ uint16_t int_sub_product_id;
+ uint16_t int_sub_vendor_id;
/* Intializing the vendor/product name for each pci device to "unknown" */
/* adding a dev_info member if needed */
@@ -173,19 +277,19 @@ int get_name_from_pci_ids(struct pci_domain *domain)
if (!dev->dev_info)
return -1;
}
- strcpy(dev->dev_info->vendor_name,"unknown");
- strcpy(dev->dev_info->product_name,"unknown");
+ strlcpy(dev->dev_info->vendor_name,"unknown",7);
+ strlcpy(dev->dev_info->product_name,"unknown",7);
}
/* Opening the pci.ids from the boot device */
- f = fopen("pci.ids","r");
+ f = fopen(pciids_path,"r");
if (!f)
- return -1;
+ return -ENOPCIIDS;
- strcpy(vendor_id,"0000");
- strcpy(product_id,"0000");
- strcpy(sub_product_id,"0000");
- strcpy(sub_vendor_id,"0000");
+ strlcpy(vendor_id,"0000",4);
+ strlcpy(product_id,"0000",4);
+ strlcpy(sub_product_id,"0000",4);
+ strlcpy(sub_vendor_id,"0000",4);
/* for each line we found in the pci.ids */
while ( fgets(line, sizeof line, f) ) {
@@ -193,6 +297,7 @@ int get_name_from_pci_ids(struct pci_domain *domain)
if ((line[0] == '#') || (line[0] == ' ') || (line[0] == 'C') ||
(line[0] == 10))
continue;
+
/* If the line doesn't start with a tab, it means that's a vendor id */
if (line[0] != '\t') {
@@ -201,26 +306,35 @@ int get_name_from_pci_ids(struct pci_domain *domain)
/* the vendor name is the next field */
vendor_id[4]=0;
- strlcpy(vendor,skipspace(strstr(line," ")),255);
+ strlcpy(vendor,skipspace(strstr(line," ")),PCI_VENDOR_NAME_SIZE-1);
remove_eol(vendor);
/* init product_id, sub_product and sub_vendor */
- strcpy(product_id,"0000");
- strcpy(sub_product_id,"0000");
- strcpy(sub_vendor_id,"0000");
+ strlcpy(product_id,"0000",4);
+ strlcpy(sub_product_id,"0000",4);
+ strlcpy(sub_vendor_id,"0000",4);
- /* ffff is an invalid vendor id */
- if (strstr(vendor_id,"ffff")) break;
- /* assign the vendor_name to any matching pci device */
+ /* Unless we found a matching device, we have to skip to the next vendor */
+ skip_to_next_vendor=true;
+
+ int_vendor_id=hex_to_int(vendor_id);
+ /* Iterate in all pci devices to find a matching vendor */
for_each_pci_func(dev, domain) {
- if (hex_to_int(vendor_id) == dev->vendor)
- strlcpy(dev->dev_info->vendor_name,vendor,255);
+ /* if one device that match this vendor */
+ if (int_vendor_id == dev->vendor) {
+ /* copy the vendor name for this device */
+ strlcpy(dev->dev_info->vendor_name,vendor,PCI_VENDOR_NAME_SIZE-1);
+ /* Some pci devices match this vendor, so we have to found them */
+ skip_to_next_vendor=false;
+ /* Let's loop on the other devices as some may have the same vendor */
+ }
}
- /* if we have a tab + a char, it means this is a product id */
- } else if ((line[0] == '\t') && (line[1] != '\t')) {
+ /* if we have a tab + a char, it means this is a product id
+ * but we only look at it if we own some pci devices of the current vendor*/
+ } else if ((line[0] == '\t') && (line[1] != '\t') && (skip_to_next_vendor == false)) {
/* the product name the second field */
- strlcpy(product,skipspace(strstr(line," ")),255);
+ strlcpy(product,skipspace(strstr(line," ")),PCI_PRODUCT_NAME_SIZE-1);
remove_eol(product);
/* the product id is first field */
@@ -228,22 +342,27 @@ int get_name_from_pci_ids(struct pci_domain *domain)
product_id[4]=0;
/* init sub_product and sub_vendor */
- strcpy(sub_product_id,"0000");
- strcpy(sub_vendor_id,"0000");
+ strlcpy(sub_product_id,"0000",4);
+ strlcpy(sub_vendor_id,"0000",4);
+ int_vendor_id=hex_to_int(vendor_id);
+ int_product_id=hex_to_int(product_id);
/* assign the product_name to any matching pci device */
for_each_pci_func(dev, domain) {
- if (hex_to_int(vendor_id) == dev->vendor &&
- hex_to_int(product_id) == dev->product)
- strlcpy(dev->dev_info->product_name,product,255);
+ if (int_vendor_id == dev->vendor &&
+ int_product_id == dev->product) {
+ strlcpy(dev->dev_info->vendor_name,vendor,PCI_VENDOR_NAME_SIZE-1);
+ strlcpy(dev->dev_info->product_name,product,PCI_PRODUCT_NAME_SIZE-1);
+ }
}
- /* if we have two tabs, it means this is a sub product */
- } else if ((line[0] == '\t') && (line[1] == '\t')) {
+ /* if we have two tabs, it means this is a sub product
+ * but we only look at it if we own some pci devices of the current vendor*/
+ } else if ((line[0] == '\t') && (line[1] == '\t') && (skip_to_next_vendor == false)) {
/* the product name is last field */
- strlcpy(product,skipspace(strstr(line," ")),255);
- strlcpy(product,skipspace(strstr(product," ")),255);
+ strlcpy(product,skipspace(strstr(line," ")),PCI_PRODUCT_NAME_SIZE-1);
+ strlcpy(product,skipspace(strstr(product," ")),PCI_PRODUCT_NAME_SIZE-1);
remove_eol(product);
/* the sub_vendor id is first field */
@@ -254,13 +373,19 @@ int get_name_from_pci_ids(struct pci_domain *domain)
strlcpy(sub_product_id,&line[7],4);
sub_product_id[4]=0;
+ int_vendor_id=hex_to_int(vendor_id);
+ int_sub_vendor_id=hex_to_int(sub_vendor_id);
+ int_product_id=hex_to_int(product_id);
+ int_sub_product_id=hex_to_int(sub_product_id);
/* assign the product_name to any matching pci device */
for_each_pci_func(dev, domain) {
- if (hex_to_int(vendor_id) == dev->vendor &&
- hex_to_int(product_id) == dev->product &&
- hex_to_int(sub_product_id) == dev->sub_product &&
- hex_to_int(sub_vendor_id) == dev->sub_vendor)
- strlcpy(dev->dev_info->product_name,product,255);
+ if (int_vendor_id == dev->vendor &&
+ int_product_id == dev->product &&
+ int_sub_product_id == dev->sub_product &&
+ int_sub_vendor_id == dev->sub_vendor) {
+ strlcpy(dev->dev_info->vendor_name,vendor,PCI_VENDOR_NAME_SIZE-1);
+ strlcpy(dev->dev_info->product_name,product,PCI_PRODUCT_NAME_SIZE-1);
+ }
}
}
}
@@ -387,6 +512,40 @@ struct pci_domain *pci_scan(void)
return NULL;
}
+/* gathering additional configuration*/
+void gather_additional_pci_config(struct pci_domain *domain)
+{
+ struct pci_bus *bus = NULL;
+ struct pci_slot *slot = NULL;
+ unsigned int nbus, ndev, nfunc, maxfunc;
+ pciaddr_t a;
+ int cfgtype;
+ cfgtype = pci_set_config_type(PCI_CFG_AUTO);
+ (void)cfgtype;
+
+ for (nbus = 0; nbus < MAX_PCI_BUSES; nbus++) {
+ bus = NULL;
+
+ for (ndev = 0; ndev < MAX_PCI_DEVICES; ndev++) {
+ maxfunc = 1; /* Assume a single-function device */
+ slot = NULL;
+
+ for (nfunc = 0; nfunc < maxfunc; nfunc++) {
+ a = pci_mkaddr(nbus, ndev, nfunc, 0);
+ struct pci_device *dev = domain->bus[nbus]->slot[ndev]->func[nfunc];
+ if (! dev->dev_info) {
+ dev->dev_info = zalloc(sizeof *dev->dev_info);
+ if (!dev->dev_info)
+ return;
+ }
+ dev->dev_info->irq = pci_readb(a + 0x3c);
+ dev->dev_info->latency = pci_readb(a + 0x0d);
+ }
+ }
+ }
+}
+
+
void free_pci_domain(struct pci_domain *domain)
{
struct pci_bus *bus;
diff --git a/com32/lib/strpcpy.c b/com32/lib/strpcpy.c
new file mode 100644
index 00000000..e181e78f
--- /dev/null
+++ b/com32/lib/strpcpy.c
@@ -0,0 +1,20 @@
+/*
+ * strpcpy.c
+ *
+ * strpcpy() - strcpy() which returns a pointer to the final null
+ */
+
+#include <string.h>
+
+char *strpcpy(char *dst, const char *src)
+{
+ char *q = dst;
+ const char *p = src;
+ char ch;
+
+ do {
+ *q++ = ch = *p++;
+ } while ( ch );
+
+ return q-1;
+}
diff --git a/com32/lib/sys/vesa/vesa.h b/com32/lib/sys/vesa/vesa.h
index e67a3108..a7150b35 100644
--- a/com32/lib/sys/vesa/vesa.h
+++ b/com32/lib/sys/vesa/vesa.h
@@ -38,7 +38,7 @@ struct vesa_general_info {
far_ptr_t vendor_string;
uint8_t capabilities[4];
far_ptr_t video_mode_ptr;
- uint32_t total_memory;
+ uint16_t total_memory;
uint16_t oem_software_rev;
far_ptr_t oem_vendor_name_ptr;
diff --git a/com32/lib/syslinux/load_linux.c b/com32/lib/syslinux/load_linux.c
index b7720562..cca2efd0 100644
--- a/com32/lib/syslinux/load_linux.c
+++ b/com32/lib/syslinux/load_linux.c
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 2007-2008 H. Peter Anvin - All Rights Reserved
+ * Copyright 2007-2009 H. Peter Anvin - All Rights Reserved
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
@@ -290,9 +290,9 @@ int syslinux_boot_linux(void *kernel_buf, size_t kernel_size,
if (irf_size) {
for (ml = amap; ml->type != SMT_END; ml = ml->next) {
addr_t adj_start = (ml->start+align_mask) & ~align_mask;
- if (ml->type == SMT_FREE &&
- ml->next->start - adj_start >= irf_size)
- best_addr = (ml->next->start - irf_size) & ~align_mask;
+ addr_t adj_end = ml->next->start & ~align_mask;
+ if (ml->type == SMT_FREE && adj_end-adj_start >= irf_size)
+ best_addr = (adj_end - irf_size) & ~align_mask;
}
if (!best_addr)
diff --git a/com32/lib/syslinux/pxe_get_nic.c b/com32/lib/syslinux/pxe_get_nic.c
new file mode 100644
index 00000000..b779542c
--- /dev/null
+++ b/com32/lib/syslinux/pxe_get_nic.c
@@ -0,0 +1,61 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2007-2008 H. Peter Anvin - All Rights Reserved
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall
+ * be included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * pxe_get_cached.c
+ *
+ * PXE call "get cached info"
+ */
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <com32.h>
+
+#include <syslinux/pxe.h>
+
+/* Returns the status code from PXE (0 on success),
+ or -1 on invocation failure */
+int pxe_get_nic_type(t_PXENV_UNDI_GET_NIC_TYPE *gnt)
+{
+ com32sys_t regs;
+
+ memset(&regs, 0, sizeof regs);
+ regs.eax.w[0] = 0x0009;
+ regs.ebx.w[0] = PXENV_UNDI_GET_NIC_TYPE;
+ regs.es = SEG( __com32.cs_bounce);
+ regs.edi.w[0] = OFFS( __com32.cs_bounce);
+
+ __intcall(0x22, &regs, &regs);
+
+ memcpy(gnt, __com32.cs_bounce, sizeof(t_PXENV_UNDI_GET_NIC_TYPE));
+
+ if (regs.eflags.l & EFLAGS_CF)
+ return -1;
+
+ return gnt->Status;
+}
diff --git a/com32/lib/syslinux/shuffle.c b/com32/lib/syslinux/shuffle.c
index cb2751af..b891722d 100644
--- a/com32/lib/syslinux/shuffle.c
+++ b/com32/lib/syslinux/shuffle.c
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 2007-2008 H. Peter Anvin - All Rights Reserved
+ * Copyright 2007-2009 H. Peter Anvin - All Rights Reserved
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
@@ -44,11 +44,18 @@
#ifndef DEBUG
# define DEBUG 0
#endif
+
+#define dprintf(f, ...) ((void)0)
+#define dprintf2(f, ...) ((void)0)
+
#if DEBUG
# include <stdio.h>
+# undef dprintf
# define dprintf printf
-#else
-# define dprintf(f, ...) ((void)0)
+# if DEBUG > 1
+# undef dprintf2
+# define dprintf2 printf
+# endif
#endif
struct shuffle_descriptor {
@@ -76,8 +83,9 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
struct syslinux_movelist *moves = NULL, *mp;
struct syslinux_memmap *rxmap = NULL, *ml;
struct shuffle_descriptor *dp, *dbuf;
- int np, nb, rv = -1;
+ int np, nb, nl, rv = -1;
int desc_blocks, need_blocks;
+ int need_ptrs;
addr_t desczone, descfree, descaddr, descoffs;
int nmoves, nzero;
struct shuffle_descriptor primaries[2];
@@ -89,7 +97,7 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
nzero++;
}
- /* Find the larges contiguous region unused by input *and* output;
+ /* Find the largest contiguous region unused by input *and* output;
this is where we put the move descriptor list */
rxmap = syslinux_dup_memmap(memmap);
@@ -111,7 +119,7 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
if (!rxmap)
goto bail;
- desc_blocks = (nzero+DESC_BLOCK_SIZE)/(DESC_BLOCK_SIZE-1);
+ desc_blocks = (nzero+DESC_BLOCK_SIZE-1)/(DESC_BLOCK_SIZE-1);
for (;;) {
addr_t descmem = desc_blocks*
sizeof(struct shuffle_descriptor)*DESC_BLOCK_SIZE;
@@ -124,7 +132,7 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
if (syslinux_add_memmap(&rxmap, descaddr, descmem, SMT_RESERVED))
goto bail;
-#if DEBUG
+#if DEBUG > 1
syslinux_dump_movelist(stdout, fraglist);
#endif
@@ -135,7 +143,7 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
for (mp = moves; mp; mp = mp->next)
nmoves++;
- need_blocks = (nmoves+nzero)/(DESC_BLOCK_SIZE-1);
+ need_blocks = (nmoves+nzero+DESC_BLOCK_SIZE-1)/(DESC_BLOCK_SIZE-1);
if (desc_blocks >= need_blocks)
break; /* Sufficient memory, yay */
@@ -143,7 +151,7 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
desc_blocks = need_blocks; /* Try again... */
}
-#if DEBUG
+#if DEBUG > 1
dprintf("Final movelist:\n");
syslinux_dump_movelist(stdout, moves);
#endif
@@ -151,7 +159,8 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
syslinux_free_memmap(rxmap);
rxmap = NULL;
- dbuf = malloc((nmoves+nzero+desc_blocks)*sizeof(struct shuffle_descriptor));
+ need_ptrs = nmoves+nzero+desc_blocks-1;
+ dbuf = malloc(need_ptrs*sizeof(struct shuffle_descriptor));
if (!dbuf)
goto bail;
@@ -165,12 +174,13 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
/* Copy the move sequence into the descriptor buffer */
np = 0;
nb = 0;
+ nl = nmoves+nzero;
dp = dbuf;
for (mp = moves; mp; mp = mp->next) {
if (nb == DESC_BLOCK_SIZE-1) {
dp->dst = -1; /* Load new descriptors */
dp->src = (addr_t)(dp+1) + descoffs;
- dp->len = sizeof(*dp)*min(nmoves, DESC_BLOCK_SIZE);
+ dp->len = sizeof(*dp)*min(nl, DESC_BLOCK_SIZE);
dprintf("[ %08x %08x %08x ]\n", dp->dst, dp->src, dp->len);
dp++; np++;
nb = 0;
@@ -179,8 +189,8 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
dp->dst = mp->dst;
dp->src = mp->src;
dp->len = mp->len;
- dprintf("[ %08x %08x %08x ]\n", dp->dst, dp->src, dp->len);
- dp++; np++; nb++;
+ dprintf2("[ %08x %08x %08x ]\n", dp->dst, dp->src, dp->len);
+ dp++; np++; nb++; nl--;
}
/* Copy bzero operations into the descriptor buffer */
@@ -189,7 +199,7 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
if (nb == DESC_BLOCK_SIZE-1) {
dp->dst = (addr_t)-1; /* Load new descriptors */
dp->src = (addr_t)(dp+1) + descoffs;
- dp->len = sizeof(*dp)*min(nmoves, DESC_BLOCK_SIZE);
+ dp->len = sizeof(*dp)*min(nl, DESC_BLOCK_SIZE);
dprintf("[ %08x %08x %08x ]\n", dp->dst, dp->src, dp->len);
dp++; np++;
nb = 0;
@@ -198,11 +208,16 @@ int syslinux_prepare_shuffle(struct syslinux_movelist *fraglist,
dp->dst = ml->start;
dp->src = (addr_t)-1; /* bzero region */
dp->len = ml->next->start - ml->start;
- dprintf("[ %08x %08x %08x ]\n", dp->dst, dp->src, dp->len);
- dp++; np++; nb++;
+ dprintf2("[ %08x %08x %08x ]\n", dp->dst, dp->src, dp->len);
+ dp++; np++; nb++; nl--;
}
}
+ if (np != need_ptrs) {
+ dprintf("!!! np = %d : nmoves = %d, nzero = %d, desc_blocks = %d\n",
+ np, nmoves, nzero, desc_blocks);
+ }
+
/* Set up the primary descriptors in the bounce buffer.
The first one moves the descriptor list into its designated safe
zone, the second one loads the first descriptor block. */
diff --git a/com32/modules/Makefile b/com32/modules/Makefile
index 930e89b6..5a8a88c4 100644
--- a/com32/modules/Makefile
+++ b/com32/modules/Makefile
@@ -1,6 +1,6 @@
## -----------------------------------------------------------------------
##
-## Copyright 2001-2008 H. Peter Anvin - All Rights Reserved
+## Copyright 2001-2009 H. Peter Anvin - All Rights Reserved
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -29,10 +29,14 @@ all: $(MODULES) $(TESTFILES)
pcitest.elf : pcitest.o $(LIBS) $(C_LIBS)
$(LD) $(LDFLAGS) -o $@ $^
-cpuidtest.elf : cpuidtest.o cpuid.o $(LIBS) $(C_LIBS)
+cpuidtest.elf : cpuidtest.o $(GPLLIB) $(LIBS) $(C_LIBS)
$(LD) $(LDFLAGS) -o $@ $^
-dmitest.elf : dmitest.o dmi_utils.o dmi.o $(LIBS) $(C_LIBS)
+.PRECIOUS: %.o
+dmitest.o: dmitest.c
+ $(CC) $(CFLAGS) $(GPLINCLUDE) -c -o $@ $<
+
+dmitest.elf : dmi_utils.o dmitest.o $(GPLLIB) $(LIBS) $(C_LIBS)
$(LD) $(LDFLAGS) -o $@ $^
ethersel.elf : ethersel.o $(LIBS) $(C_LIBS)
diff --git a/com32/modules/cmd.c b/com32/modules/cmd.c
index f0b0a968..1a7f0ffe 100644
--- a/com32/modules/cmd.c
+++ b/com32/modules/cmd.c
@@ -16,27 +16,10 @@
* Execute arbitrary commands
*/
-#include <string.h>
-#include <alloca.h>
-#include <console.h>
#include <com32.h>
-int main(int argc, const char *argv[])
+int main(void)
{
- size_t len = 0;
- char *cmd;
- char *tmp;
- int i;
-
- openconsole(&dev_stdcon_r, &dev_stdcon_w);
-
- for (i = 1; i < argc; i++)
- len += strlen(argv[i]) + 1;
-
- tmp = cmd = alloca(len);
-
- for (i = 1; i < argc; i++)
- tmp += sprintf(tmp, "%s%s", argv[i], (i == argc-1) ? "" : " ");
-
- syslinux_run_command(cmd);
+ syslinux_run_command(__com32.cs_cmdline);
+ return -1;
}
diff --git a/com32/modules/dmi_utils.c b/com32/modules/dmi_utils.c
index df03ba7c..e0baa873 100644
--- a/com32/modules/dmi_utils.c
+++ b/com32/modules/dmi_utils.c
@@ -51,7 +51,7 @@ int i;
void display_base_board_features(s_dmi *dmi) {
int i;
- for (i=0;i<=BASE_BOARD_NB_ELEMENTS; i++) {
+ for (i=0;i<BASE_BOARD_NB_ELEMENTS; i++) {
if (((bool *)(& dmi->base_board.features))[i] == true) {
moreprintf("\t\t%s\n", base_board_features_strings[i]);
}
@@ -60,7 +60,7 @@ int i;
void display_processor_flags(s_dmi *dmi) {
int i;
- for (i=0;i<=PROCESSOR_FLAGS_ELEMENTS; i++) {
+ for (i=0;i<PROCESSOR_FLAGS_ELEMENTS; i++) {
if (((bool *)(& dmi->processor.cpu_flags))[i] == true) {
moreprintf("\t\t%s\n", cpu_flags_strings[i]);
}
diff --git a/com32/modules/dmitest.c b/com32/modules/dmitest.c
index 64f0635d..07febc51 100644
--- a/com32/modules/dmitest.c
+++ b/com32/modules/dmitest.c
@@ -39,6 +39,44 @@
char display_line;
+void display_memory(s_dmi *dmi) {
+ int i;
+ for (i=0;i<dmi->memory_count;i++) {
+ moreprintf("Memory Bank %d\n",i);
+ moreprintf("\tForm Factor : %s\n",dmi->memory[i].form_factor);
+ moreprintf("\tType : %s\n",dmi->memory[i].type);
+ moreprintf("\tType Detail : %s\n",dmi->memory[i].type_detail);
+ moreprintf("\tSpeed : %s\n",dmi->memory[i].speed);
+ moreprintf("\tSize : %s\n",dmi->memory[i].size);
+ moreprintf("\tDevice Set : %s\n",dmi->memory[i].device_set);
+ moreprintf("\tDevice Loc. : %s\n",dmi->memory[i].device_locator);
+ moreprintf("\tBank Locator : %s\n",dmi->memory[i].bank_locator);
+ moreprintf("\tTotal Width : %s\n",dmi->memory[i].total_width);
+ moreprintf("\tData Width : %s\n",dmi->memory[i].data_width);
+ moreprintf("\tError : %s\n",dmi->memory[i].error);
+ moreprintf("\tVendor : %s\n",dmi->memory[i].manufacturer);
+ moreprintf("\tSerial : %s\n",dmi->memory[i].serial);
+ moreprintf("\tAsset Tag : %s\n",dmi->memory[i].asset_tag);
+ moreprintf("\tPart Number : %s\n",dmi->memory[i].part_number);
+ }
+}
+
+void display_battery(s_dmi *dmi) {
+ moreprintf("Battery\n");
+ moreprintf("\tVendor : %s\n",dmi->battery.manufacturer);
+ moreprintf("\tManufacture Date : %s\n",dmi->battery.manufacture_date);
+ moreprintf("\tSerial : %s\n",dmi->battery.serial);
+ moreprintf("\tName : %s\n",dmi->battery.name);
+ moreprintf("\tChemistry : %s\n",dmi->battery.chemistry);
+ moreprintf("\tDesign Capacity : %s\n",dmi->battery.design_capacity);
+ moreprintf("\tDesign Voltage : %s\n",dmi->battery.design_voltage);
+ moreprintf("\tSBDS : %s\n",dmi->battery.sbds);
+ moreprintf("\tSBDS Manufact. Date : %s\n",dmi->battery.sbds_manufacture_date);
+ moreprintf("\tSBDS Chemistry : %s\n",dmi->battery.sbds_chemistry);
+ moreprintf("\tMaximum Error : %s\n",dmi->battery.maximum_error);
+ moreprintf("\tOEM Info : %s\n",dmi->battery.oem_info);
+}
+
void display_bios(s_dmi *dmi) {
moreprintf("BIOS\n");
moreprintf("\tVendor: %s\n",dmi->bios.vendor);
@@ -126,15 +164,20 @@ int main(void)
s_dmi dmi;
openconsole(&dev_stdcon_r, &dev_stdcon_w);
- if ( ! dmi_interate() ) {
- printf("No DMI Structure found\n");
- return -1;
+ if (dmi_iterate(&dmi) == -ENODMITABLE) {
+ printf("No DMI Structure found\n");
+ return -1;
+ } else {
+ printf("DMI %d.%d present.\n",dmi.dmitable.major_version,dmi.dmitable.minor_version);
+ printf("%d structures occupying %d bytes.\n",dmi.dmitable.num, dmi.dmitable.len);
+ printf("DMI table at 0x%08X.\n",dmi.dmitable.base);
}
+
parse_dmitable(&dmi);
for (;;) {
- printf("Available commands are system, chassis, base_board, cpu, bios, all, exit\n");
+ printf("Available commands are system, chassis, base_board, cpu, bios, memory, battery, all, exit\n");
printf("dmi: ");
fgets(buffer, sizeof buffer, stdin);
if ( !strncmp(buffer, "exit", 4) )
@@ -149,12 +192,18 @@ int main(void)
display_cpu(&dmi);
if ( !strncmp(buffer, "bios", 4) )
display_bios(&dmi);
+ if ( !strncmp(buffer, "memory", 6) )
+ display_memory(&dmi);
+ if ( !strncmp(buffer, "battery", 7) )
+ display_battery(&dmi);
if ( !strncmp(buffer, "all", 3) ) {
display_bios(&dmi);
display_system(&dmi);
display_chassis(&dmi);
display_base_board(&dmi);
display_cpu(&dmi);
+ display_memory(&dmi);
+ display_battery(&dmi);
}
}
diff --git a/com32/modules/pcitest.c b/com32/modules/pcitest.c
index 240f19f2..00647535 100644
--- a/com32/modules/pcitest.c
+++ b/com32/modules/pcitest.c
@@ -46,7 +46,7 @@
# define dprintf(...) ((void)0)
#endif
-char display_line;
+char display_line=0;
#define moreprintf(...) \
do { \
display_line++; \
@@ -61,34 +61,82 @@ char display_line;
void display_pci_devices(struct pci_domain *pci_domain) {
struct pci_device *pci_device;
- int ndev = 0;
+ char kernel_modules [LINUX_KERNEL_MODULE_SIZE*MAX_KERNEL_MODULES_PER_PCI_DEVICE];
+
for_each_pci_func(pci_device, pci_domain) {
- printf("[%02x:%02x.%01x]: %s: %04x:%04x[%04x:%04x]) %s:%s\n",
- __pci_bus, __pci_slot, __pci_func,
- pci_device->dev_info->linux_kernel_module,
- pci_device->vendor, pci_device->product,
- pci_device->sub_vendor, pci_device->sub_product,
- pci_device->dev_info->vendor_name,
- pci_device->dev_info->product_name);
- ndev++;
+
+ memset(kernel_modules,0,sizeof kernel_modules);
+
+/* printf("PCI: found %d kernel modules for %04x:%04x[%04x:%04x]\n",
+ pci_device->dev_info->linux_kernel_module_count,
+ pci_device->vendor, pci_device->product,
+ pci_device->sub_vendor, pci_device->sub_product);
+*/
+ for (int i=0; i<pci_device->dev_info->linux_kernel_module_count;i++) {
+ if (i>0) {
+ strncat(kernel_modules," | ",3);
+ }
+ strncat(kernel_modules, pci_device->dev_info->linux_kernel_module[i],LINUX_KERNEL_MODULE_SIZE-1);
+ }
+
+ moreprintf("%04x:%04x[%04x:%04x]: %s\n",
+ pci_device->vendor, pci_device->product,
+ pci_device->sub_vendor, pci_device->sub_product,
+ pci_device->dev_info->class_name);
+
+ moreprintf(" Vendor Name : %s\n", pci_device->dev_info->vendor_name);
+ moreprintf(" Product Name : %s\n", pci_device->dev_info->product_name);
+ moreprintf(" PCI bus position : %02x:%02x.%01x\n", __pci_bus, __pci_slot, __pci_func);
+ moreprintf(" Kernel modules : %s\n\n",kernel_modules);
}
- printf("PCI: %d devices found\n", ndev);
}
int main(int argc, char *argv[])
{
struct pci_domain *pci_domain;
+ int return_code=0;
+ int nb_pci_devices=0;
- openconsole(&dev_null_r, &dev_stdcon_w);
+ openconsole(&dev_stdcon_r, &dev_stdcon_w);
/* Scanning to detect pci buses and devices */
+ printf("PCI: Scanning PCI BUS\n");
pci_domain = pci_scan();
+ struct pci_device *pci_device;
+ for_each_pci_func(pci_device, pci_domain) {
+ nb_pci_devices++;
+ }
+
+ printf("PCI: %d PCI devices found\n",nb_pci_devices);
+
+
+ printf("PCI: Looking for device name\n");
/* Assigning product & vendor name for each device*/
- get_name_from_pci_ids(pci_domain);
+ return_code=get_name_from_pci_ids(pci_domain,"pci.ids");
+ if (return_code == -ENOPCIIDS) {
+ printf("PCI: ERROR !\n");
+ printf("PCI: Unable to open pci.ids in the same directory as pcitest.c32.\n");
+ printf("PCI: PCI Device names can't be computed.\n");
+ }
+
+ printf("PCI: Resolving class names\n");
+ /* Assigning class name for each device*/
+ return_code=get_class_name_from_pci_ids(pci_domain,"pci.ids");
+ if (return_code == -ENOPCIIDS) {
+ printf("PCI: ERROR !\n");
+ printf("PCI: Unable to open pci.ids in the same directory as pcitest.c32.\n");
+ printf("PCI: PCI class names can't be computed.\n");
+ }
+ printf("PCI: Looking for Kernel modules\n");
/* Detecting which kernel module should match each device */
- get_module_name_from_pci_ids(pci_domain);
+ return_code=get_module_name_from_pci_ids(pci_domain,"modules.pcimap");
+ if (return_code == -ENOMODULESPCIMAP) {
+ printf("PCI: ERROR !\n");
+ printf("PCI: Unable to open modules.pcimap in the same directory as pcitest.c32.\n");
+ printf("PCI: Kernel Module names can't be computed.\n");
+ }
/* display the pci devices we found */
display_pci_devices(pci_domain);
diff --git a/core/Makefile b/core/Makefile
index 1106b4cf..ce9fd453 100644
--- a/core/Makefile
+++ b/core/Makefile
@@ -1,6 +1,6 @@
## -----------------------------------------------------------------------
##
-## Copyright 1998-2008 H. Peter Anvin - All Rights Reserved
+## Copyright 1998-2009 H. Peter Anvin - All Rights Reserved
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -123,15 +123,15 @@ spotless: clean
# did not properly terminate the dependency list.
.depend:
rm -f .depend
- for csrc in $(CSRC) ; do $(CC) $(INCLUDE) -MM $$csrc >> .depend ; done
+ for csrc in $(CSRC) ; do $(CC) $(INCLUDE) -MM $$csrc >> .depend ; done ; true
for nsrc in $(NASMSRC) ; do \
( $(NASM) -DDEPEND $(NINCLUDE) -o \
`echo $$nsrc | sed -e 's/\.asm/\.o/'` -M $$nsrc ; \
- echo '' ) >> .depend ; done
+ echo '' ) >> .depend ; done ; true
depend:
rm -f .depend
$(MAKE) .depend
# Include dependencies file
-include .depend
+-include .depend
diff --git a/core/bootsect.inc b/core/bootsect.inc
index 7e8f416d..45fb7a80 100644
--- a/core/bootsect.inc
+++ b/core/bootsect.inc
@@ -1,6 +1,6 @@
;; -----------------------------------------------------------------------
;;
-;; Copyright 1994-2008 H. Peter Anvin - All Rights Reserved
+;; Copyright 1994-2009 H. Peter Anvin - All Rights Reserved
;;
;; This program is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
@@ -26,12 +26,13 @@
is_bootsector:
%if IS_SYSLINUX || IS_MDSLINUX
; Transfer zero bytes
- mov byte [CopySuper],0
+ push word 0
jmp short load_bootsec
is_bss_sector:
; Transfer the superblock
- mov byte [CopySuper],superblock_len
+SuperSize equ $+1
+ push word superblock_len_fat16
%endif
load_bootsec:
mov edi, 100000h
@@ -49,15 +50,13 @@ load_bootsec:
mov [EntryPoint],eax ; Jump to this address when done
%if IS_SYSLINUX || IS_MDSLINUX
- movzx ecx,byte [CopySuper]
- jcxz .not_bss
+ xchg eax,ecx ; ECX[31:16] <- 0
+ pop cx
; For a BSS boot sector we have to patch.
mov esi,superblock
mov edi,100000h+(superblock-bootsec)
call bcopy
-
-.not_bss:
%endif
xor edx,edx
diff --git a/core/isolinux.asm b/core/isolinux.asm
index 8ec74e5a..51d3bcd3 100644
--- a/core/isolinux.asm
+++ b/core/isolinux.asm
@@ -8,7 +8,7 @@
; available. It is based on the SYSLINUX boot loader for MS-DOS
; floppies.
;
-; Copyright 1994-2008 H. Peter Anvin - All Rights Reserved
+; Copyright 1994-2009 H. Peter Anvin - All Rights Reserved
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
@@ -932,9 +932,9 @@ getlinsec_cdrom:
mov [si+8],eax
.loop:
push bp ; Sectors left
- cmp bp,[MaxTransfer]
+ cmp bp,[MaxTransferCD]
jbe .bp_ok
- mov bp,[MaxTransfer]
+ mov bp,[MaxTransferCD]
.bp_ok:
mov [si+2],bp
push si
@@ -979,7 +979,7 @@ xint13: mov byte [RetryCount],retry_count
shr ah,1 ; Otherwise, try to reduce
adc ah,0 ; the max transfer size, but not to 0
.setsize:
- mov [MaxTransfer],ah
+ mov [MaxTransferCD],ah
mov [dapa+2],ah
.again:
pop ax
@@ -1072,7 +1072,9 @@ bios_cbios: dw getlinsec_cbios, bios_cbios_str
bios_ebios: dw getlinsec_ebios, bios_ebios_str
%endif
-MaxTransfer dw 32 ; Max sectors per transfer
+; Maximum transfer size
+MaxTransfer dw 127 ; Hard disk modes
+MaxTransferCD dw 32 ; CD mode
rl_checkpt equ $ ; Must be <= 800h
diff --git a/core/ldlinux.asm b/core/ldlinux.asm
index a24f396a..2219d5f3 100644
--- a/core/ldlinux.asm
+++ b/core/ldlinux.asm
@@ -11,7 +11,7 @@
; from MS-LOSS, and can be especially useful in conjunction with the
; umsdos filesystem.
;
-; Copyright 1994-2008 H. Peter Anvin - All Rights Reserved
+; Copyright 1994-2009 H. Peter Anvin - All Rights Reserved
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
@@ -211,9 +211,13 @@ superinfo_size equ ($-superblock)-1 ; How much to expand
;
; This is as far as FAT12/16 and FAT32 are consistent
;
- zb 54 ; FAT12/16 need 26 more bytes,
- ; FAT32 need 54 more bytes
-superblock_len equ $-superblock
+ ; FAT12/16 need 26 more bytes,
+ ; FAT32 need 54 more bytes
+ ;
+superblock_len_fat16 equ $-superblock+26
+superblock_len_fat32 equ $-superblock+54
+ zb 54 ; Maximum needed size
+superblock_max equ $-superblock
SecPerClust equ bxSecPerClust
;
@@ -865,6 +869,7 @@ getfattype:
add eax,[DataArea]
mov [RootDir],eax
mov cl,nextcluster_fat28-(nextcluster+2)
+ mov byte [SuperSize],superblock_len_fat32
.setsize:
mov byte [nextcluster+1],cl
diff --git a/core/runkernel.inc b/core/runkernel.inc
index 143920d0..f42abf08 100644
--- a/core/runkernel.inc
+++ b/core/runkernel.inc
@@ -1,6 +1,6 @@
;; -----------------------------------------------------------------------
;;
-;; Copyright 1994-2008 H. Peter Anvin - All Rights Reserved
+;; Copyright 1994-2009 H. Peter Anvin - All Rights Reserved
;;
;; This program is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
@@ -536,10 +536,16 @@ parse_load_initrd:
je .get_chunk
; Compute the initrd target location
+ ; Note: we round to a page boundary twice here. The first
+ ; time it is to make sure we don't use any fractional page
+ ; which may be valid RAM but which will be ignored by the
+ ; kernel (and therefore is inaccessible.) The second time
+ ; it is to make sure we start out on page boundary.
mov edx,[cs:InitRDEnd]
sub edx,[cs:InitRDStart]
mov [su_ramdisklen],edx
mov eax,[cs:MyHighMemSize]
+ and ax,0F000h ; Round to a page boundary
sub eax,edx
and ax,0F000h ; Round to a page boundary
mov [su_ramdiskat],eax
diff --git a/gpxe/src/Makefile b/gpxe/src/Makefile
index 147f6997..a627d967 100644
--- a/gpxe/src/Makefile
+++ b/gpxe/src/Makefile
@@ -117,8 +117,8 @@ install :
#
VERSION_MAJOR = 0
VERSION_MINOR = 9
-VERSION_PATCH = 6
-EXTRAVERSION = +
+VERSION_PATCH = 7
+EXTRAVERSION =
MM_VERSION = $(VERSION_MAJOR).$(VERSION_MINOR)
VERSION = $(MM_VERSION).$(VERSION_PATCH)$(EXTRAVERSION)
CFLAGS += -DVERSION_MAJOR=$(VERSION_MAJOR) \
diff --git a/gpxe/src/Makefile.housekeeping b/gpxe/src/Makefile.housekeeping
index 2146d9cb..2ab842e6 100644
--- a/gpxe/src/Makefile.housekeeping
+++ b/gpxe/src/Makefile.housekeeping
@@ -286,10 +286,6 @@ CFLAGS += $(EXTRA_CFLAGS)
ASFLAGS += $(EXTRA_ASFLAGS)
LDFLAGS += $(EXTRA_LDFLAGS)
-# Embedded image(s), or default if not set
-#
-EMBEDDED_IMAGE = image/default.gpxe
-
# Inhibit -Werror if NO_WERROR is specified on make command line
#
ifneq ($(NO_WERROR),1)
diff --git a/gpxe/src/arch/i386/interface/pcbios/ibft.c b/gpxe/src/arch/i386/interface/pcbios/ibft.c
index ffa65964..43d1f85f 100644
--- a/gpxe/src/arch/i386/interface/pcbios/ibft.c
+++ b/gpxe/src/arch/i386/interface/pcbios/ibft.c
@@ -137,6 +137,17 @@ static void ibft_set_ipaddr_option ( struct ibft_ipaddr *ipaddr,
}
/**
+ * Read IP address from iBFT (for debugging)
+ *
+ * @v strings iBFT string block descriptor
+ * @v string String field
+ * @ret ipaddr IP address string
+ */
+static const char * ibft_ipaddr ( struct ibft_ipaddr *ipaddr ) {
+ return inet_ntoa ( ipaddr->in );
+}
+
+/**
* Allocate a string within iBFT
*
* @v strings iBFT string block descriptor
@@ -215,6 +226,18 @@ static int ibft_set_string_option ( struct ibft_string_block *strings,
}
/**
+ * Read string from iBFT (for debugging)
+ *
+ * @v strings iBFT string block descriptor
+ * @v string String field
+ * @ret data String content (or "<empty>")
+ */
+static const char * ibft_string ( struct ibft_string_block *strings,
+ struct ibft_string *string ) {
+ return ( ( ( char * ) strings->table ) + string->offset );
+}
+
+/**
* Fill in NIC portion of iBFT
*
* @v nic NIC portion of iBFT
@@ -231,11 +254,16 @@ static int ibft_fill_nic ( struct ibft_nic *nic,
/* Extract values from DHCP configuration */
ibft_set_ipaddr_option ( &nic->ip_address, &ip_setting );
+ DBG ( "iBFT NIC IP = %s\n", ibft_ipaddr ( &nic->ip_address ) );
ibft_set_ipaddr_option ( &nic->gateway, &gateway_setting );
+ DBG ( "iBFT NIC gateway = %s\n", ibft_ipaddr ( &nic->gateway ) );
ibft_set_ipaddr_option ( &nic->dns[0], &dns_setting );
+ DBG ( "iBFT NIC DNS = %s\n", ibft_ipaddr ( &nic->dns[0] ) );
if ( ( rc = ibft_set_string_option ( strings, &nic->hostname,
&hostname_setting ) ) != 0 )
return rc;
+ DBG ( "iBFT NIC hostname = %s\n",
+ ibft_string ( strings, &nic->hostname ) );
/* Derive subnet mask prefix from subnet mask */
fetch_ipv4_setting ( NULL, &netmask_setting, &netmask_addr );
@@ -245,11 +273,15 @@ static int ibft_fill_nic ( struct ibft_nic *nic,
netmask_addr.s_addr >>= 1;
}
nic->subnet_mask_prefix = netmask_count;
+ DBG ( "iBFT NIC subnet = /%d\n", nic->subnet_mask_prefix );
/* Extract values from net-device configuration */
memcpy ( nic->mac_address, netdev->ll_addr,
sizeof ( nic->mac_address ) );
+ DBG ( "iBFT NIC MAC = %s\n",
+ netdev->ll_protocol->ntoa ( nic->mac_address ) );
nic->pci_bus_dev_func = netdev->dev->desc.location;
+ DBG ( "iBFT NIC PCI = %04x\n", nic->pci_bus_dev_func );
return 0;
}
@@ -269,6 +301,8 @@ static int ibft_fill_initiator ( struct ibft_initiator *initiator,
if ( ( rc = ibft_set_string ( strings, &initiator->initiator_name,
initiator_iqn ) ) != 0 )
return rc;
+ DBG ( "iBFT initiator hostname = %s\n",
+ ibft_string ( strings, &initiator->initiator_name ) );
return 0;
}
@@ -286,17 +320,23 @@ static int ibft_fill_target_chap ( struct ibft_target *target,
struct iscsi_session *iscsi ) {
int rc;
- if ( ! iscsi->initiator_username )
+ if ( ! ( iscsi->status & ISCSI_STATUS_AUTH_FORWARD_REQUIRED ) )
return 0;
+
+ assert ( iscsi->initiator_username );
assert ( iscsi->initiator_password );
target->chap_type = IBFT_CHAP_ONE_WAY;
if ( ( rc = ibft_set_string ( strings, &target->chap_name,
iscsi->initiator_username ) ) != 0 )
return rc;
+ DBG ( "iBFT target username = %s\n",
+ ibft_string ( strings, &target->chap_name ) );
if ( ( rc = ibft_set_string ( strings, &target->chap_secret,
iscsi->initiator_password ) ) != 0 )
return rc;
+ DBG ( "iBFT target password = <redacted>\n" );
+
return 0;
}
@@ -313,19 +353,25 @@ static int ibft_fill_target_reverse_chap ( struct ibft_target *target,
struct iscsi_session *iscsi ) {
int rc;
- if ( ! iscsi->target_username )
+ if ( ! ( iscsi->status & ISCSI_STATUS_AUTH_REVERSE_REQUIRED ) )
return 0;
- assert ( iscsi->target_password );
+
assert ( iscsi->initiator_username );
assert ( iscsi->initiator_password );
+ assert ( iscsi->target_username );
+ assert ( iscsi->target_password );
target->chap_type = IBFT_CHAP_MUTUAL;
if ( ( rc = ibft_set_string ( strings, &target->reverse_chap_name,
iscsi->target_username ) ) != 0 )
return rc;
+ DBG ( "iBFT target reverse username = %s\n",
+ ibft_string ( strings, &target->chap_name ) );
if ( ( rc = ibft_set_string ( strings, &target->reverse_chap_secret,
iscsi->target_password ) ) != 0 )
return rc;
+ DBG ( "iBFT target reverse password = <redacted>\n" );
+
return 0;
}
@@ -346,10 +392,14 @@ static int ibft_fill_target ( struct ibft_target *target,
/* Fill in Target values */
ibft_set_ipaddr ( &target->ip_address, sin_target->sin_addr );
+ DBG ( "iBFT target IP = %s\n", ibft_ipaddr ( &target->ip_address ) );
target->socket = ntohs ( sin_target->sin_port );
+ DBG ( "iBFT target port = %d\n", target->socket );
if ( ( rc = ibft_set_string ( strings, &target->target_name,
iscsi->target_iqn ) ) != 0 )
return rc;
+ DBG ( "iBFT target name = %s\n",
+ ibft_string ( strings, &target->target_name ) );
if ( ( rc = ibft_fill_target_chap ( target, strings, iscsi ) ) != 0 )
return rc;
if ( ( rc = ibft_fill_target_reverse_chap ( target, strings,
diff --git a/gpxe/src/arch/i386/interface/pxe/pxe_call.c b/gpxe/src/arch/i386/interface/pxe/pxe_call.c
index 04aaf3b2..06dee25c 100644
--- a/gpxe/src/arch/i386/interface/pxe/pxe_call.c
+++ b/gpxe/src/arch/i386/interface/pxe/pxe_call.c
@@ -433,22 +433,24 @@ void pxe_init_structures ( void ) {
* @ret rc Return status code
*/
int pxe_start_nbp ( void ) {
- int discard_b, discard_c;
+ int discard_b, discard_c, discard_d, discard_D;
uint16_t rc;
/* Far call to PXE NBP */
- __asm__ __volatile__ ( REAL_CODE ( "pushw %%cx\n\t"
- "pushw %%ax\n\t"
- "movw %%cx, %%es\n\t"
+ __asm__ __volatile__ ( REAL_CODE ( "movw %%cx, %%es\n\t"
+ "pushw %%es\n\t"
+ "pushw %%di\n\t"
"sti\n\t"
"lcall $0, $0x7c00\n\t"
"addw $4, %%sp\n\t" )
: "=a" ( rc ), "=b" ( discard_b ),
- "=c" ( discard_c )
- : "a" ( __from_text16 ( &ppxe ) ),
- "b" ( __from_text16 ( &pxenv ) ),
- "c" ( rm_cs )
- : "edx", "esi", "edi", "ebp", "memory" );
+ "=c" ( discard_c ), "=d" ( discard_d ),
+ "=D" ( discard_D )
+ : "a" ( 0 ), "b" ( __from_text16 ( &pxenv ) ),
+ "c" ( rm_cs ),
+ "d" ( virt_to_phys ( &pxenv ) ),
+ "D" ( __from_text16 ( &ppxe ) )
+ : "esi", "ebp", "memory" );
return rc;
}
diff --git a/gpxe/src/arch/i386/interface/pxe/pxe_entry.S b/gpxe/src/arch/i386/interface/pxe/pxe_entry.S
index 68b7374f..22ef4181 100644
--- a/gpxe/src/arch/i386/interface/pxe/pxe_entry.S
+++ b/gpxe/src/arch/i386/interface/pxe/pxe_entry.S
@@ -178,6 +178,7 @@ pxe_entry_common:
* Returns:
* %ax : 0x564e
* %es:bx : Far pointer to the PXENV+ structure
+ * %edx : Physical address of the PXENV+ structure
* CF cleared
* Corrupts:
* none
@@ -191,9 +192,12 @@ pxe_int_1a:
cmpw $0x5650, %ax
jne 1f
/* INT 1A,5650 - PXE installation check */
- pushw %cs
- popw %es
+ xorl %edx, %edx
+ movw %cs, %dx
+ movw %dx, %es
movw $pxenv, %bx
+ shll $4, %edx
+ addl $pxenv, %edx
movw $0x564e, %ax
popfw
clc
diff --git a/gpxe/src/arch/i386/prefix/pxeprefix.S b/gpxe/src/arch/i386/prefix/pxeprefix.S
index ee0f4d94..b3b7947f 100644
--- a/gpxe/src/arch/i386/prefix/pxeprefix.S
+++ b/gpxe/src/arch/i386/prefix/pxeprefix.S
@@ -31,18 +31,10 @@
pushl $STACK_MAGIC
movw %ss, %cs:pxe_ss
movl %esp, %cs:pxe_esp
- movw %sp, %bp
- movl (10*4+4*2+4)(%bp),%ebp /* !PXE address */
- /* Set up %ds */
+ /* Set up segments */
movw %cs, %ax
movw %ax, %ds
- /* Record PXENV+ and !PXE nominal addresses */
- movw %es, pxenv_segment /* PXENV+ address */
- movw %bx, pxenv_offset
- movl %ebp, ppxe_segoff /* !PXE address */
- /* Set up %es and %fs */
- movw %ax, %es
movw $0x40, %ax /* BIOS data segment access */
movw %ax, %fs
/* Set up stack just below 0x7c00 */
@@ -60,16 +52,57 @@
.previous
/*****************************************************************************
- * Verify PXENV+ structure and record parameters of interest
+ * Find us a usable !PXE or PXENV+ entry point
*****************************************************************************
*/
-detect_pxenv:
- /* Signature check */
- les pxenv_segoff, %bx
- cmpl $0x4e455850, %es:(%bx) /* 'PXEN' signature */
- jne no_pxenv
- cmpw $0x2b56, %es:4(%bx) /* 'V+' signature */
- jne no_pxenv
+detect_pxe:
+ /* Plan A: !PXE pointer from the stack */
+ lgsl pxe_esp, %ebp /* %gs:%bp -> original stack */
+ lesw %gs:52(%bp), %bx
+ call is_valid_ppxe
+ je have_ppxe
+
+ /* Plan B: PXENV+ pointer from initial ES:BX */
+ movw %gs:32(%bp),%bx
+ movw %gs:8(%bp),%es
+ call is_valid_pxenv
+ je have_pxenv
+
+ /* Plan C: PXENV+ structure via INT 1Ah */
+ movw $0x5650, %ax
+ int $0x1a
+ jc 1f
+ cmpw $0x564e, %ax
+ jne 1f
+ call is_valid_pxenv
+ je have_pxenv
+1:
+ /* Plan D: scan base memory for !PXE */
+ call memory_scan_ppxe
+ je have_ppxe
+
+ /* Plan E: scan base memory for PXENV+ */
+ call memory_scan_pxenv
+ jne stack_not_found
+
+have_pxenv:
+ movw %bx, pxenv_offset
+ movw %es, pxenv_segment
+
+ cmpw $0x201, %es:6(%bx) /* API version >= 2.01 */
+ jb 1f
+ cmpb $0x2c, %es:8(%bx) /* ... and structure long enough */
+ jb 2f
+
+ lesw %es:0x28(%bx), %bx /* Find !PXE from PXENV+ */
+ call is_valid_ppxe
+ je have_ppxe
+2:
+ call memory_scan_ppxe /* We are *supposed* to have !PXE... */
+ je have_ppxe
+1:
+ lesw pxenv_segoff, %bx /* Nope, we're stuck with PXENV+ */
+
/* Record entry point and UNDI segments */
pushl %es:0x0a(%bx) /* Entry point */
popl entry_segoff
@@ -79,36 +112,22 @@ detect_pxenv:
pushw %es:0x20(%bx) /* UNDI data segment */
pushw %es:0x22(%bx) /* UNDI data size */
popl undi_data_segoff
+
/* Print "PXENV+ at <address>" */
movw $10f, %si
call print_message
call print_segoff
movb $( ',' ), %al
call print_character
- jmp 99f
+ jmp check_have_stack
.section ".prefix.data", "aw", @progbits
10: .asciz " PXENV+ at "
.previous
-no_pxenv:
- xorl %eax, %eax
- movl %eax, pxenv_segoff
-
-99:
-
-/*****************************************************************************
- * Verify !PXE structure and record parameters of interest
- *****************************************************************************
- */
-detect_ppxe:
- /* Signature check */
- les ppxe_segoff, %bx
- cmpl $0x45585021, %es:(%bx) /* '!PXE' signature */
- jne no_ppxe
- /* Record structure address, entry point, and UNDI segments */
- pushw %es
- popw ppxe_segment
+have_ppxe:
movw %bx, ppxe_offset
+ movw %es, ppxe_segment
+
pushl %es:0x10(%bx) /* Entry point */
popl entry_segoff
pushw %es:0x30(%bx) /* UNDI code segment */
@@ -123,17 +142,60 @@ detect_ppxe:
call print_segoff
movb $( ',' ), %al
call print_character
- jmp 99f
+ jmp check_have_stack
.section ".prefix.data", "aw", @progbits
10: .asciz " !PXE at "
.previous
-no_ppxe:
- xorl %eax, %eax
- movl %eax, ppxe_segoff
+is_valid_ppxe:
+ cmpl $0x45585021, %es:(%bx)
+ jne 1f
+ movzbw %es:4(%bx), %cx
+ cmpw $0x58, %cx
+ jae is_valid_checksum
+1:
+ ret
+
+is_valid_pxenv:
+ cmpl $0x4e455850, %es:(%bx)
+ jne 1b
+ cmpw $0x2b56, %es:4(%bx)
+ jne 1b
+ movzbw %es:8(%bx), %cx
+ cmpw $0x28, %cx
+ jb 1b
+
+is_valid_checksum:
+ pushw %ax
+ movw %bx, %si
+ xorw %ax, %ax
+2:
+ es lodsb
+ addb %al, %ah
+ loopw 2b
+ popw %ax
+ ret
+
+memory_scan_ppxe:
+ movw $is_valid_ppxe, %dx
+ jmp memory_scan_common
-99:
+memory_scan_pxenv:
+ movw $is_valid_pxenv, %dx
+memory_scan_common:
+ movw %fs:(0x13), %ax
+ shlw $6, %ax
+ decw %ax
+1: incw %ax
+ cmpw $( 0xa000 - 1 ), %ax
+ ja 2f
+ movw %ax, %es
+ xorw %bx, %bx
+ call *%dx
+ jne 1b
+2: ret
+
/*****************************************************************************
* Sanity check: we must have an entry point
*****************************************************************************
@@ -144,6 +206,7 @@ check_have_stack:
testl %eax, %eax
jnz 99f
/* No entry point: print message and skip everything else */
+stack_not_found:
movw $10f, %si
call print_message
jmp finished
@@ -529,8 +592,8 @@ print_pxe_error:
*/
.section ".prefix.data"
-pxe_ss: .word 0
pxe_esp: .long 0
+pxe_ss: .word 0
pxe_parameter_structure: .fill 20
diff --git a/gpxe/src/core/main.c b/gpxe/src/core/main.c
index 8d360c42..bd2428f0 100644
--- a/gpxe/src/core/main.c
+++ b/gpxe/src/core/main.c
@@ -71,13 +71,17 @@ __asmcall int main ( void ) {
shell();
} else {
/* User doesn't want shell; load and execute the first
- * image. If booting fails (i.e. if the image
- * returns, or fails to execute), offer a second
- * chance to enter the shell for diagnostics.
+ * image, or autoboot() if we have no images. If
+ * booting fails for any reason, offer a second chance
+ * to enter the shell for diagnostics.
*/
- for_each_image ( image ) {
- image_exec ( image );
- break;
+ if ( have_images() ) {
+ for_each_image ( image ) {
+ image_exec ( image );
+ break;
+ }
+ } else {
+ autoboot();
}
if ( shell_banner() )
diff --git a/gpxe/src/crypto/axtls/aes.c b/gpxe/src/crypto/axtls/aes.c
index 9154a515..0c0d7247 100644
--- a/gpxe/src/crypto/axtls/aes.c
+++ b/gpxe/src/crypto/axtls/aes.c
@@ -152,10 +152,6 @@ static const unsigned char Rcon[30]=
0xb3,0x7d,0xfa,0xef,0xc5,0x91,
};
-/* ----- static functions ----- */
-static void AES_encrypt(const AES_CTX *ctx, uint32_t *data);
-static void AES_decrypt(const AES_CTX *ctx, uint32_t *data);
-
/* Perform doubling in Galois Field GF(2^8) using the irreducible polynomial
x^8+x^4+x^3+x+1 */
static unsigned char AES_xtime(uint32_t x)
@@ -257,6 +253,7 @@ void AES_convert_key(AES_CTX *ctx)
}
}
+#if 0
/**
* Encrypt a byte sequence (with a block size 16) using the AES cipher.
*/
@@ -358,11 +355,12 @@ void AES_cbc_decrypt(AES_CTX *ctx, const uint8_t *msg, uint8_t *out, int length)
l2n(xor2, iv);
l2n(xor3, iv);
}
+#endif
/**
* Encrypt a single block (16 bytes) of data
*/
-static void AES_encrypt(const AES_CTX *ctx, uint32_t *data)
+void AES_encrypt(const AES_CTX *ctx, uint32_t *data)
{
/* To make this code smaller, generate the sbox entries on the fly.
* This will have a really heavy effect upon performance.
@@ -418,7 +416,7 @@ static void AES_encrypt(const AES_CTX *ctx, uint32_t *data)
/**
* Decrypt a single block (16 bytes) of data
*/
-static void AES_decrypt(const AES_CTX *ctx, uint32_t *data)
+void AES_decrypt(const AES_CTX *ctx, uint32_t *data)
{
uint32_t tmp[4];
uint32_t xt0,xt1,xt2,xt3,xt4,xt5,xt6;
diff --git a/gpxe/src/crypto/axtls/crypto.h b/gpxe/src/crypto/axtls/crypto.h
index de1dbeb4..12acb27f 100644
--- a/gpxe/src/crypto/axtls/crypto.h
+++ b/gpxe/src/crypto/axtls/crypto.h
@@ -55,6 +55,8 @@ void AES_cbc_encrypt(AES_CTX *ctx, const uint8_t *msg,
uint8_t *out, int length);
void AES_cbc_decrypt(AES_CTX *ks, const uint8_t *in, uint8_t *out, int length);
void AES_convert_key(AES_CTX *ctx);
+void AES_encrypt(const AES_CTX *ctx, uint32_t *data);
+void AES_decrypt(const AES_CTX *ctx, uint32_t *data);
/**************************************************************************
* RC4 declarations
diff --git a/gpxe/src/crypto/axtls_aes.c b/gpxe/src/crypto/axtls_aes.c
index ac7e921d..51e1924e 100644
--- a/gpxe/src/crypto/axtls_aes.c
+++ b/gpxe/src/crypto/axtls_aes.c
@@ -1,12 +1,58 @@
-#include "crypto/axtls/crypto.h"
+/*
+ * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
#include <string.h>
#include <errno.h>
+#include <byteswap.h>
#include <gpxe/crypto.h>
+#include <gpxe/cbc.h>
#include <gpxe/aes.h>
+#include "crypto/axtls/crypto.h"
+
+/** @file
+ *
+ * AES algorithm
+ *
+ */
+
+/** Basic AES blocksize */
+#define AES_BLOCKSIZE 16
+
+/** AES context */
+struct aes_context {
+ /** AES context for AXTLS */
+ AES_CTX axtls_ctx;
+ /** Cipher is being used for decrypting */
+ int decrypting;
+};
+/**
+ * Set key
+ *
+ * @v ctx Context
+ * @v key Key
+ * @v keylen Key length
+ * @ret rc Return status code
+ */
static int aes_setkey ( void *ctx, const void *key, size_t keylen ) {
- AES_CTX *aesctx = ctx;
+ struct aes_context *aes_ctx = ctx;
AES_MODE mode;
+ void *iv;
switch ( keylen ) {
case ( 128 / 8 ):
@@ -19,36 +65,103 @@ static int aes_setkey ( void *ctx, const void *key, size_t keylen ) {
return -EINVAL;
}
- AES_set_key ( aesctx, key, aesctx->iv, mode );
+ /* IV is not a relevant concept at this stage; use a dummy
+ * value that will have no side-effects.
+ */
+ iv = &aes_ctx->axtls_ctx.iv;
+
+ AES_set_key ( &aes_ctx->axtls_ctx, key, iv, mode );
+
+ aes_ctx->decrypting = 0;
+
return 0;
}
-static void aes_setiv ( void *ctx, const void *iv ) {
- AES_CTX *aesctx = ctx;
+/**
+ * Set initialisation vector
+ *
+ * @v ctx Context
+ * @v iv Initialisation vector
+ */
+static void aes_setiv ( void *ctx __unused, const void *iv __unused ) {
+ /* Nothing to do */
+}
- memcpy ( aesctx->iv, iv, sizeof ( aesctx->iv ) );
+/**
+ * Call AXTLS' AES_encrypt() or AES_decrypt() functions
+ *
+ * @v axtls_ctx AXTLS AES context
+ * @v src Data to process
+ * @v dst Buffer for output
+ * @v func AXTLS AES function to call
+ */
+static void aes_call_axtls ( AES_CTX *axtls_ctx, const void *src, void *dst,
+ void ( * func ) ( const AES_CTX *axtls_ctx,
+ uint32_t *data ) ){
+ const uint32_t *srcl = src;
+ uint32_t *dstl = dst;
+ unsigned int i;
+
+ /* AXTLS' AES_encrypt() and AES_decrypt() functions both
+ * expect to deal with an array of four dwords in host-endian
+ * order.
+ */
+ for ( i = 0 ; i < 4 ; i++ )
+ dstl[i] = ntohl ( srcl[i] );
+ func ( axtls_ctx, dstl );
+ for ( i = 0 ; i < 4 ; i++ )
+ dstl[i] = htonl ( dstl[i] );
}
-static void aes_encrypt ( void *ctx, const void *data, void *dst,
+/**
+ * Encrypt data
+ *
+ * @v ctx Context
+ * @v src Data to encrypt
+ * @v dst Buffer for encrypted data
+ * @v len Length of data
+ */
+static void aes_encrypt ( void *ctx, const void *src, void *dst,
size_t len ) {
- AES_CTX *aesctx = ctx;
+ struct aes_context *aes_ctx = ctx;
- AES_cbc_encrypt ( aesctx, data, dst, len );
+ assert ( len == AES_BLOCKSIZE );
+ if ( aes_ctx->decrypting )
+ assert ( 0 );
+ aes_call_axtls ( &aes_ctx->axtls_ctx, src, dst, AES_encrypt );
}
-static void aes_decrypt ( void *ctx, const void *data, void *dst,
+/**
+ * Decrypt data
+ *
+ * @v ctx Context
+ * @v src Data to decrypt
+ * @v dst Buffer for decrypted data
+ * @v len Length of data
+ */
+static void aes_decrypt ( void *ctx, const void *src, void *dst,
size_t len ) {
- AES_CTX *aesctx = ctx;
+ struct aes_context *aes_ctx = ctx;
- AES_cbc_decrypt ( aesctx, data, dst, len );
+ assert ( len == AES_BLOCKSIZE );
+ if ( ! aes_ctx->decrypting ) {
+ AES_convert_key ( &aes_ctx->axtls_ctx );
+ aes_ctx->decrypting = 1;
+ }
+ aes_call_axtls ( &aes_ctx->axtls_ctx, src, dst, AES_decrypt );
}
-struct crypto_algorithm aes_algorithm = {
- .name = "aes",
- .ctxsize = sizeof ( AES_CTX ),
- .blocksize = 16,
- .setkey = aes_setkey,
- .setiv = aes_setiv,
- .encode = aes_encrypt,
- .decode = aes_decrypt,
+/** Basic AES algorithm */
+static struct cipher_algorithm aes_algorithm = {
+ .name = "aes",
+ .ctxsize = sizeof ( struct aes_context ),
+ .blocksize = AES_BLOCKSIZE,
+ .setkey = aes_setkey,
+ .setiv = aes_setiv,
+ .encrypt = aes_encrypt,
+ .decrypt = aes_decrypt,
};
+
+/* AES with cipher-block chaining */
+CBC_CIPHER ( aes_cbc, aes_cbc_algorithm,
+ aes_algorithm, struct aes_context, AES_BLOCKSIZE );
diff --git a/gpxe/src/crypto/axtls_sha1.c b/gpxe/src/crypto/axtls_sha1.c
index 62ff878a..841e193b 100644
--- a/gpxe/src/crypto/axtls_sha1.c
+++ b/gpxe/src/crypto/axtls_sha1.c
@@ -6,8 +6,7 @@ static void sha1_init ( void *ctx ) {
SHA1Init ( ctx );
}
-static void sha1_update ( void *ctx, const void *data, void *dst __unused,
- size_t len ) {
+static void sha1_update ( void *ctx, const void *data, size_t len ) {
SHA1Update ( ctx, data, len );
}
@@ -15,12 +14,12 @@ static void sha1_final ( void *ctx, void *out ) {
SHA1Final ( ctx, out );
}
-struct crypto_algorithm sha1_algorithm = {
+struct digest_algorithm sha1_algorithm = {
.name = "sha1",
.ctxsize = SHA1_CTX_SIZE,
.blocksize = 64,
.digestsize = SHA1_DIGEST_SIZE,
.init = sha1_init,
- .encode = sha1_update,
+ .update = sha1_update,
.final = sha1_final,
};
diff --git a/gpxe/src/crypto/cbc.c b/gpxe/src/crypto/cbc.c
new file mode 100644
index 00000000..c7116ea9
--- /dev/null
+++ b/gpxe/src/crypto/cbc.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 2009 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <string.h>
+#include <assert.h>
+#include <gpxe/crypto.h>
+#include <gpxe/cbc.h>
+
+/** @file
+ *
+ * Cipher-block chaining
+ *
+ */
+
+/**
+ * XOR data blocks
+ *
+ * @v src Input data
+ * @v dst Second input data and output data buffer
+ * @v len Length of data
+ */
+static void cbc_xor ( const void *src, void *dst, size_t len ) {
+ const uint32_t *srcl = src;
+ uint32_t *dstl = dst;
+ unsigned int i;
+
+ /* Assume that block sizes will always be dword-aligned, for speed */
+ assert ( ( len % sizeof ( *srcl ) ) == 0 );
+
+ for ( i = 0 ; i < ( len / sizeof ( *srcl ) ) ; i++ )
+ dstl[i] ^= srcl[i];
+}
+
+/**
+ * Encrypt data
+ *
+ * @v ctx Context
+ * @v src Data to encrypt
+ * @v dst Buffer for encrypted data
+ * @v len Length of data
+ * @v raw_cipher Underlying cipher algorithm
+ * @v cbc_ctx CBC context
+ */
+void cbc_encrypt ( void *ctx, const void *src, void *dst, size_t len,
+ struct cipher_algorithm *raw_cipher, void *cbc_ctx ) {
+ size_t blocksize = raw_cipher->blocksize;
+
+ assert ( ( len % blocksize ) == 0 );
+
+ while ( len ) {
+ cbc_xor ( src, cbc_ctx, blocksize );
+ cipher_encrypt ( raw_cipher, ctx, cbc_ctx, dst, blocksize );
+ memcpy ( cbc_ctx, dst, blocksize );
+ dst += blocksize;
+ src += blocksize;
+ len -= blocksize;
+ }
+}
+
+/**
+ * Decrypt data
+ *
+ * @v ctx Context
+ * @v src Data to decrypt
+ * @v dst Buffer for decrypted data
+ * @v len Length of data
+ * @v raw_cipher Underlying cipher algorithm
+ * @v cbc_ctx CBC context
+ */
+void cbc_decrypt ( void *ctx, const void *src, void *dst, size_t len,
+ struct cipher_algorithm *raw_cipher, void *cbc_ctx ) {
+ size_t blocksize = raw_cipher->blocksize;
+
+ assert ( ( len % blocksize ) == 0 );
+
+ while ( len ) {
+ cipher_decrypt ( raw_cipher, ctx, src, dst, blocksize );
+ cbc_xor ( cbc_ctx, dst, blocksize );
+ memcpy ( cbc_ctx, src, blocksize );
+ dst += blocksize;
+ src += blocksize;
+ len -= blocksize;
+ }
+}
diff --git a/gpxe/src/crypto/chap.c b/gpxe/src/crypto/chap.c
index 59b70e39..d0784d25 100644
--- a/gpxe/src/crypto/chap.c
+++ b/gpxe/src/crypto/chap.c
@@ -42,7 +42,7 @@
* eventually be freed by a call to chap_finish().
*/
int chap_init ( struct chap_response *chap,
- struct crypto_algorithm *digest ) {
+ struct digest_algorithm *digest ) {
size_t state_len;
void *state;
diff --git a/gpxe/src/crypto/cipher.c b/gpxe/src/crypto/cipher.c
deleted file mode 100644
index 9c392009..00000000
--- a/gpxe/src/crypto/cipher.c
+++ /dev/null
@@ -1,24 +0,0 @@
-#include <stdint.h>
-#include <errno.h>
-#include <gpxe/crypto.h>
-
-int cipher_encrypt ( struct crypto_algorithm *crypto,
- void *ctx, const void *src, void *dst,
- size_t len ) {
- if ( ( len & ( crypto->blocksize - 1 ) ) ) {
- return -EINVAL;
- }
- crypto->encode ( ctx, src, dst, len );
- return 0;
-}
-
-int cipher_decrypt ( struct crypto_algorithm *crypto,
- void *ctx, const void *src, void *dst,
- size_t len ) {
- if ( ( len & ( crypto->blocksize - 1 ) ) ) {
- return -EINVAL;
- }
- crypto->decode ( ctx, src, dst, len );
- return 0;
-}
-
diff --git a/gpxe/src/crypto/crypto_null.c b/gpxe/src/crypto/crypto_null.c
index 120ef0a6..8cc9217a 100644
--- a/gpxe/src/crypto/crypto_null.c
+++ b/gpxe/src/crypto/crypto_null.c
@@ -25,45 +25,61 @@
#include <string.h>
#include <gpxe/crypto.h>
-static void null_init ( void *ctx __unused ) {
+static void digest_null_init ( void *ctx __unused ) {
/* Do nothing */
}
-static int null_setkey ( void *ctx __unused, const void *key __unused,
- size_t keylen __unused ) {
+static void digest_null_update ( void *ctx __unused, const void *src __unused,
+ size_t len __unused ) {
/* Do nothing */
- return 0;
}
-static void null_setiv ( void *ctx __unused, const void *iv __unused ) {
+static void digest_null_final ( void *ctx __unused, void *out __unused ) {
/* Do nothing */
}
-static void null_encode ( void *ctx __unused, const void *src,
- void *dst, size_t len ) {
- if ( dst )
- memcpy ( dst, src, len );
-}
+struct digest_algorithm digest_null = {
+ .name = "null",
+ .ctxsize = 0,
+ .blocksize = 1,
+ .digestsize = 0,
+ .init = digest_null_init,
+ .update = digest_null_update,
+ .final = digest_null_final,
+};
-static void null_decode ( void *ctx __unused, const void *src,
- void *dst, size_t len ) {
- if ( dst )
- memcpy ( dst, src, len );
+static int cipher_null_setkey ( void *ctx __unused, const void *key __unused,
+ size_t keylen __unused ) {
+ /* Do nothing */
+ return 0;
}
-static void null_final ( void *ctx __unused, void *out __unused ) {
+static void cipher_null_setiv ( void *ctx __unused,
+ const void *iv __unused ) {
/* Do nothing */
}
-struct crypto_algorithm crypto_null = {
+static void cipher_null_encrypt ( void *ctx __unused, const void *src,
+ void *dst, size_t len ) {
+ memcpy ( dst, src, len );
+}
+
+static void cipher_null_decrypt ( void *ctx __unused, const void *src,
+ void *dst, size_t len ) {
+ memcpy ( dst, src, len );
+}
+
+struct cipher_algorithm cipher_null = {
.name = "null",
.ctxsize = 0,
.blocksize = 1,
- .digestsize = 0,
- .init = null_init,
- .setkey = null_setkey,
- .setiv = null_setiv,
- .encode = null_encode,
- .decode = null_decode,
- .final = null_final,
+ .setkey = cipher_null_setkey,
+ .setiv = cipher_null_setiv,
+ .encrypt = cipher_null_encrypt,
+ .decrypt = cipher_null_decrypt,
+};
+
+struct pubkey_algorithm pubkey_null = {
+ .name = "null",
+ .ctxsize = 0,
};
diff --git a/gpxe/src/crypto/hmac.c b/gpxe/src/crypto/hmac.c
index 6884bde9..be0298a7 100644
--- a/gpxe/src/crypto/hmac.c
+++ b/gpxe/src/crypto/hmac.c
@@ -35,7 +35,7 @@
* @v key Key
* @v key_len Length of key
*/
-static void hmac_reduce_key ( struct crypto_algorithm *digest,
+static void hmac_reduce_key ( struct digest_algorithm *digest,
void *key, size_t *key_len ) {
uint8_t digest_ctx[digest->ctxsize];
@@ -58,7 +58,7 @@ static void hmac_reduce_key ( struct crypto_algorithm *digest,
* will be replaced with its own digest, and key_len will be updated
* accordingly).
*/
-void hmac_init ( struct crypto_algorithm *digest, void *digest_ctx,
+void hmac_init ( struct digest_algorithm *digest, void *digest_ctx,
void *key, size_t *key_len ) {
unsigned char k_ipad[digest->blocksize];
unsigned int i;
@@ -93,7 +93,7 @@ void hmac_init ( struct crypto_algorithm *digest, void *digest_ctx,
* will be replaced with its own digest, and key_len will be updated
* accordingly).
*/
-void hmac_final ( struct crypto_algorithm *digest, void *digest_ctx,
+void hmac_final ( struct digest_algorithm *digest, void *digest_ctx,
void *key, size_t *key_len, void *hmac ) {
unsigned char k_opad[digest->blocksize];
unsigned int i;
diff --git a/gpxe/src/crypto/md5.c b/gpxe/src/crypto/md5.c
index 1fed24fc..76fb8a69 100644
--- a/gpxe/src/crypto/md5.c
+++ b/gpxe/src/crypto/md5.c
@@ -167,8 +167,7 @@ static void md5_init(void *context)
mctx->byte_count = 0;
}
-static void md5_update(void *context, const void *data, void *dst __unused,
- size_t len)
+static void md5_update(void *context, const void *data, size_t len)
{
struct md5_ctx *mctx = context;
const u32 avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f);
@@ -224,12 +223,12 @@ static void md5_final(void *context, void *out)
memset(mctx, 0, sizeof(*mctx));
}
-struct crypto_algorithm md5_algorithm = {
+struct digest_algorithm md5_algorithm = {
.name = "md5",
.ctxsize = MD5_CTX_SIZE,
.blocksize = ( MD5_BLOCK_WORDS * 4 ),
.digestsize = MD5_DIGEST_SIZE,
.init = md5_init,
- .encode = md5_update,
+ .update = md5_update,
.final = md5_final,
};
diff --git a/gpxe/src/dl360.gpxe b/gpxe/src/dl360.gpxe
deleted file mode 100644
index 237555b7..00000000
--- a/gpxe/src/dl360.gpxe
+++ /dev/null
@@ -1,4 +0,0 @@
-#!gpxe
-kernel http://www.zytor.com/dl360/pxelinux.0
-set filename http://www.zytor.com/dl360/pxelinux.0
-boot
diff --git a/gpxe/src/drivers/block/scsi.c b/gpxe/src/drivers/block/scsi.c
index 71d22040..b22bd20f 100644
--- a/gpxe/src/drivers/block/scsi.c
+++ b/gpxe/src/drivers/block/scsi.c
@@ -60,8 +60,8 @@ static int scsi_command ( struct scsi_device *scsi,
/* Something went wrong with the issuing mechanism,
* (rather than with the command itself)
*/
- DBG ( "SCSI %p " SCSI_CDB_FORMAT " err %d\n",
- scsi, SCSI_CDB_DATA ( command->cdb ), rc );
+ DBG ( "SCSI %p " SCSI_CDB_FORMAT " err %s\n",
+ scsi, SCSI_CDB_DATA ( command->cdb ), strerror ( rc ) );
return rc;
}
diff --git a/gpxe/src/drivers/net/mlx_ipoib/MT23108_PRM.h b/gpxe/src/drivers/net/mlx_ipoib/MT23108_PRM.h
deleted file mode 100644
index 646e94e4..00000000
--- a/gpxe/src/drivers/net/mlx_ipoib/MT23108_PRM.h
+++ /dev/null
@@ -1,2800 +0,0 @@
-/*
- This software is available to you under a choice of one of two
- licenses. You may choose to be licensed under the terms of the GNU
- General Public License (GPL) Version 2, available at
- <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
- license, available in the LICENSE.TXT file accompanying this
- software. These details are also available at
- <http://openib.org/license.html>.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- SOFTWARE.
-
- Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
-*/
-
-/***
- *** This file was generated at "Tue Sep 6 09:14:00 2005"
- *** by:
- *** % csp_bf -copyright=/mswg/misc/license-header.txt -prefix tavorprm_ -bits -fixnames MT23108_PRM.csp
- ***/
-
-#ifndef H_prefix_tavorprm_bits_fixnames_MT23108_PRM_csp_H
-#define H_prefix_tavorprm_bits_fixnames_MT23108_PRM_csp_H
-
-#include "bit_ops.h"
-
-/* Send doorbell */
-
-struct tavorprm_send_doorbell_st { /* Little Endian */
- pseudo_bit_t nopcode[0x00005]; /* Opcode of descriptor to be executed */
- pseudo_bit_t f[0x00001]; /* Fence bit. If set, descriptor is fenced */
- pseudo_bit_t nda[0x0001a]; /* Bits 31:6 of descriptors virtual address */
-/* -------------- */
- pseudo_bit_t nds[0x00006]; /* Next descriptor size (in 16-byte chunks) */
- pseudo_bit_t reserved0[0x00002];
- pseudo_bit_t qpn[0x00018]; /* QP number this doorbell is rung on */
-/* -------------- */
-};
-
-/* ACCESS_DDR_inject_errors_input_modifier */
-
-struct tavorprm_access_ddr_inject_errors_input_modifier_st { /* Little Endian */
- pseudo_bit_t index3[0x00007];
- pseudo_bit_t q3[0x00001];
- pseudo_bit_t index2[0x00007];
- pseudo_bit_t q2[0x00001];
- pseudo_bit_t index1[0x00007];
- pseudo_bit_t q1[0x00001];
- pseudo_bit_t index0[0x00007];
- pseudo_bit_t q0[0x00001];
-/* -------------- */
-};
-
-/* ACCESS_DDR_inject_errors_input_parameter */
-
-struct tavorprm_access_ddr_inject_errors_input_parameter_st { /* Little Endian */
- pseudo_bit_t ba[0x00002]; /* Bank Address */
- pseudo_bit_t da[0x00002]; /* Dimm Address */
- pseudo_bit_t reserved0[0x0001c];
-/* -------------- */
- pseudo_bit_t ra[0x00010]; /* Row Address */
- pseudo_bit_t ca[0x00010]; /* Column Address */
-/* -------------- */
-};
-
-/* Address Path */
-
-struct tavorprm_address_path_st { /* Little Endian */
- pseudo_bit_t pkey_index[0x00007]; /* PKey table index */
- pseudo_bit_t reserved0[0x00011];
- pseudo_bit_t port_number[0x00002]; /* Specific port associated with this QP/EE.
- 1 - Port 1
- 2 - Port 2
- other - reserved */
- pseudo_bit_t reserved1[0x00006];
-/* -------------- */
- pseudo_bit_t rlid[0x00010]; /* Remote (Destination) LID */
- pseudo_bit_t my_lid_path_bits[0x00007];/* Source LID - the lower 7 bits (upper bits are taken from PortInfo) */
- pseudo_bit_t g[0x00001]; /* Global address enable - if set, GRH will be formed for packet header */
- pseudo_bit_t reserved2[0x00005];
- pseudo_bit_t rnr_retry[0x00003]; /* RNR retry count (see C9-132 in IB spec Vol 1)
- 0-6 - number of retries
- 7 - infinite */
-/* -------------- */
- pseudo_bit_t hop_limit[0x00008]; /* IPv6 hop limit */
- pseudo_bit_t max_stat_rate[0x00003];/* Maximum static rate control.
- 0 - 4X injection rate
- 1 - 1X injection rate
- other - reserved
- */
- pseudo_bit_t reserved3[0x00005];
- pseudo_bit_t mgid_index[0x00006]; /* Index to port GID table */
- pseudo_bit_t reserved4[0x00005];
- pseudo_bit_t ack_timeout[0x00005]; /* Local ACK timeout - Transport timer for activation of retransmission mechanism. Refer to IB spec Vol1 9.7.6.1.3 for further details.
- The transport timer is set to 4.096us*2^ack_timeout, if ack_timeout is 0 then transport timer is disabled. */
-/* -------------- */
- pseudo_bit_t flow_label[0x00014]; /* IPv6 flow label */
- pseudo_bit_t tclass[0x00008]; /* IPv6 TClass */
- pseudo_bit_t sl[0x00004]; /* InfiniBand Service Level (SL) */
-/* -------------- */
- pseudo_bit_t rgid_127_96[0x00020]; /* Remote GID[127:96] */
-/* -------------- */
- pseudo_bit_t rgid_95_64[0x00020]; /* Remote GID[95:64] */
-/* -------------- */
- pseudo_bit_t rgid_63_32[0x00020]; /* Remote GID[63:32] */
-/* -------------- */
- pseudo_bit_t rgid_31_0[0x00020]; /* Remote GID[31:0] */
-/* -------------- */
-};
-
-/* HCA Command Register (HCR) */
-
-struct tavorprm_hca_command_register_st { /* Little Endian */
- pseudo_bit_t in_param_h[0x00020]; /* Input Parameter: parameter[63:32] or pointer[63:32] to input mailbox (see command description) */
-/* -------------- */
- pseudo_bit_t in_param_l[0x00020]; /* Input Parameter: parameter[31:0] or pointer[31:0] to input mailbox (see command description) */
-/* -------------- */
- pseudo_bit_t input_modifier[0x00020];/* Input Parameter Modifier */
-/* -------------- */
- pseudo_bit_t out_param_h[0x00020]; /* Output Parameter: parameter[63:32] or pointer[63:32] to output mailbox (see command description) */
-/* -------------- */
- pseudo_bit_t out_param_l[0x00020]; /* Output Parameter: parameter[31:0] or pointer[31:0] to output mailbox (see command description) */
-/* -------------- */
- pseudo_bit_t reserved0[0x00010];
- pseudo_bit_t token[0x00010]; /* Software assigned token to the command, to uniquely identify it. The token is returned to the software in the EQE reported. */
-/* -------------- */
- pseudo_bit_t opcode[0x0000c]; /* Command opcode */
- pseudo_bit_t opcode_modifier[0x00004];/* Opcode Modifier, see specific description for each command. */
- pseudo_bit_t reserved1[0x00006];
- pseudo_bit_t e[0x00001]; /* Event Request
- 0 - Don't report event (software will poll the GO bit)
- 1 - Report event to EQ when the command completes */
- pseudo_bit_t go[0x00001]; /* Go (0=Software ownership for the HCR, 1=Hardware ownership for the HCR)
- Software can write to the HCR only if Go bit is cleared.
- Software must set the Go bit to trigger the HW to execute the command. Software must not write to this register value other than 1 for the Go bit. */
- pseudo_bit_t status[0x00008]; /* Command execution status report. Valid only if command interface in under SW ownership (Go bit is cleared)
- 0 - command completed without error. If different than zero, command execution completed with error. Syndrom encoding is depended on command executed and is defined for each command */
-/* -------------- */
-};
-
-/* EQ Doorbell */
-
-struct tavorprm_eq_cmd_doorbell_st { /* Little Endian */
- pseudo_bit_t eqn[0x00006]; /* EQ accessed */
- pseudo_bit_t reserved0[0x00012];
- pseudo_bit_t eq_cmd[0x00008]; /* Command to be executed on EQ
- 01 - increment Consumer_indx by one
- 02 - Request notification for next event (Arm EQ)
- 03 - Disarm CQ (CQ number is specified in EQ_param)
- 04 - set Consumer_indx to value of EQ_param
- 05 - move EQ to Always Armed state
- other - reserved */
-/* -------------- */
- pseudo_bit_t eq_param[0x00020]; /* parameter to be used by EQ commands 03 and 04. Reserved for other commands. */
-/* -------------- */
-};
-
-/* CQ Doorbell */
-
-struct tavorprm_cq_cmd_doorbell_st { /* Little Endian */
- pseudo_bit_t cqn[0x00018]; /* CQ number accessed */
- pseudo_bit_t cq_cmd[0x00008]; /* Command to be executed on CQ
- 01 - Increment Consumer_indx by cq_param plus 1
- 02 - Request notification for next Solicited or Unsolicited completion event. CQ_param must contain last succesfully polled consumer index. For newly generated CQs the CQ_param should contain (initial consumer index-1) modulu CQ size. When working with CQs with overrun detection, CQ_param can be set to 0xFFFFFFFF (HW will use the last polled index).
- 03 - Request notification for next Solicited completion event CQ_param must contain last succesfully polled consumer index. For newly generated CQs the CQ_param should contain (initial consumer index-1) modulu CQ size. When working with CQs with overrun detection, CQ_param can be set to 0xFFFFFFFF (HW will use the last polled index).
- 04 - Set Consumer_indx to value of CQ_param
- 05 - Request notification for multiple completions (see Advanced Topics chater)
- other - reserved */
-/* -------------- */
- pseudo_bit_t cq_param[0x00020]; /* parameter to be used by CQ command */
-/* -------------- */
-};
-
-/* Receive doorbell */
-
-struct tavorprm_receive_doorbell_st { /* Little Endian */
- pseudo_bit_t nds[0x00006]; /* Next descriptor size (in 16-byte chunks)
- Must be zero for SRQ doorbells */
- pseudo_bit_t nda[0x0001a]; /* Bits 31:6 of descriptors virtual address */
-/* -------------- */
- pseudo_bit_t credits[0x00008]; /* Amount of credits ((length of the chain) posted with the doorbell on receive queue. Chain of up to 256 descriptors can be linked with single doorbell. Zero value in this field means 256. */
- pseudo_bit_t qpn[0x00018]; /* QP number or SRQ number this doorbell is rung on */
-/* -------------- */
-};
-
-/* RD-send doorbell */
-
-struct tavorprm_rd_send_doorbell_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t een[0x00018]; /* End-to-end context number (reliable datagram)
- Must be zero for Nop and Bind operations */
-/* -------------- */
- pseudo_bit_t reserved1[0x00008];
- pseudo_bit_t qpn[0x00018]; /* QP number this doorbell is rung on */
-/* -------------- */
- struct tavorprm_send_doorbell_st snd_params;/* Send parameters */
-/* -------------- */
-};
-
-/* Multicast Group Member QP */
-
-struct tavorprm_mgmqp_st { /* Little Endian */
- pseudo_bit_t qpn_i[0x00018]; /* QPN_i: QP number which is a member in this multicast group. Valid only if Qi bit is set. Length of the QPN_i list is set in INIT_HCA */
- pseudo_bit_t reserved0[0x00007];
- pseudo_bit_t qi[0x00001]; /* Qi: QPN_i is valid */
-/* -------------- */
-};
-
-/* vsd */
-
-struct tavorprm_vsd_st { /* Little Endian */
- pseudo_bit_t vsd_dw0[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw1[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw2[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw3[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw4[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw5[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw6[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw7[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw8[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw9[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw10[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw11[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw12[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw13[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw14[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw15[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw16[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw17[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw18[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw19[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw20[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw21[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw22[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw23[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw24[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw25[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw26[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw27[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw28[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw29[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw30[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw31[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw32[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw33[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw34[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw35[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw36[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw37[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw38[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw39[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw40[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw41[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw42[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw43[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw44[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw45[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw46[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw47[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw48[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw49[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw50[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw51[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw52[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw53[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw54[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw55[0x00020];
-/* -------------- */
-};
-
-/* ACCESS_DDR_inject_errors */
-
-struct tavorprm_access_ddr_inject_errors_st { /* Little Endian */
- struct tavorprm_access_ddr_inject_errors_input_parameter_st access_ddr_inject_errors_input_parameter;
-/* -------------- */
- struct tavorprm_access_ddr_inject_errors_input_modifier_st access_ddr_inject_errors_input_modifier;
-/* -------------- */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
-};
-
-/* Logical DIMM Information */
-
-struct tavorprm_dimminfo_st { /* Little Endian */
- pseudo_bit_t dimmsize[0x00010]; /* Size of DIMM in units of 2^20 Bytes. This value is valid only when DIMMStatus is 0. */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t dimmstatus[0x00001]; /* DIMM Status
- 0 - Enabled
- 1 - Disabled
- */
- pseudo_bit_t dh[0x00001]; /* When set, the DIMM is Hidden and can not be accessed from the PCI bus. */
- pseudo_bit_t wo[0x00001]; /* When set, the DIMM is write only.
- If data integrity is configured (other than none), the DIMM must be
- only targeted by write transactions where the address and size are multiples of 16 bytes. */
- pseudo_bit_t reserved1[0x00005];
-/* -------------- */
- pseudo_bit_t spd[0x00001]; /* 0 - DIMM SPD was read from DIMM
- 1 - DIMM SPD was read from InfiniHost NVMEM */
- pseudo_bit_t sladr[0x00003]; /* SPD Slave Address 3 LSBits.
- Valid only if spd bit is 0. */
- pseudo_bit_t sock_num[0x00002]; /* DIMM socket number (for double sided DIMM one of the two numbers will be reported) */
- pseudo_bit_t syn[0x00004]; /* Error syndrome (valid regardless of status value)
- 0 - DIMM has no error
- 1 - SPD error (e.g. checksum error, no response, error while reading)
- 2 - DIMM out of bounds (e.g. DIMM rows number is not between 7 and 14, DIMM type is not 2)
- 3 - DIMM conflict (e.g. mix of registered and unbuffered DIMMs, CAS latency conflict)
- 5 - DIMM size trimmed due to configuration (size exceeds)
- other - Error, reserved
- */
- pseudo_bit_t reserved2[0x00016];
-/* -------------- */
- pseudo_bit_t vendor_id_h[0x00020]; /* JDEC Manufacturer ID[63:32] */
-/* -------------- */
- pseudo_bit_t vendor_id_l[0x00020]; /* JDEC Manufacturer ID[31:0] */
-/* -------------- */
- pseudo_bit_t dimm_start_adr_h[0x00020];/* DIMM memory start address [63:32]. This value is valid only when DIMMStatus is 0. */
-/* -------------- */
- pseudo_bit_t dimm_start_adr_l[0x00020];/* DIMM memory start address [31:0]. This value is valid only when DIMMStatus is 0. */
-/* -------------- */
- pseudo_bit_t reserved3[0x00040];
-/* -------------- */
-};
-
-/* UAR Parameters */
-
-struct tavorprm_uar_params_st { /* Little Endian */
- pseudo_bit_t uar_base_addr_h[0x00020];/* UAR Base Address [63:32] (QUERY_HCA only) */
-/* -------------- */
- pseudo_bit_t reserved0[0x00014];
- pseudo_bit_t uar_base_addr_l[0x0000c];/* UAR Base Address [31:20] (QUERY_HCA only) */
-/* -------------- */
- pseudo_bit_t uar_page_sz[0x00008]; /* This field defines the size of each UAR page.
- Size of UAR Page is 4KB*2^UAR_Page_Size */
- pseudo_bit_t reserved1[0x00018];
-/* -------------- */
- pseudo_bit_t reserved2[0x00020];
-/* -------------- */
- pseudo_bit_t uar_scratch_base_addr_h[0x00020];/* Base address of UAR scratchpad [63:32].
- Number of entries in table is UAR BAR size divided by UAR Page Size.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t uar_scratch_base_addr_l[0x00020];/* Base address of UAR scratchpad [31:0].
- Number of entries in table is UAR BAR size divided by UAR Page Size.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t reserved3[0x00040];
-/* -------------- */
-};
-
-/* Translation and Protection Tables Parameters */
-
-struct tavorprm_tptparams_st { /* Little Endian */
- pseudo_bit_t mpt_base_adr_h[0x00020];/* MPT - Memory Protection Table base physical address [63:32].
- Entry size is 64 bytes.
- Table must be aligned to its size.
- Address may be set to zero if address translation and protection is not supported. */
-/* -------------- */
- pseudo_bit_t mpt_base_adr_l[0x00020];/* MPT - Memory Protection Table base physical address [31:0].
- Entry size is 64 bytes.
- Table must be aligned to its size.
- Address may be set to zero if address translation and protection is not supported. */
-/* -------------- */
- pseudo_bit_t log_mpt_sz[0x00006]; /* Log (base 2) of the number of region/windows entries in the MPT table. */
- pseudo_bit_t reserved0[0x00002];
- pseudo_bit_t pfto[0x00005]; /* Page Fault RNR Timeout -
- The field returned in RNR Naks generated when a page fault is detected.
- It has no effect when on-demand-paging is not used. */
- pseudo_bit_t reserved1[0x00003];
- pseudo_bit_t mtt_segment_size[0x00003];/* The size of MTT segment is 64*2^MTT_Segment_Size bytes */
- pseudo_bit_t reserved2[0x0000d];
-/* -------------- */
- pseudo_bit_t mtt_version[0x00008]; /* Version of MTT page walk. Must be zero */
- pseudo_bit_t reserved3[0x00018];
-/* -------------- */
- pseudo_bit_t mtt_base_addr_h[0x00020];/* MTT - Memory Translation table base physical address [63:32].
- Table must be aligned to its size.
- Address may be set to zero if address translation and protection is not supported. */
-/* -------------- */
- pseudo_bit_t mtt_base_addr_l[0x00020];/* MTT - Memory Translation table base physical address [31:0].
- Table must be aligned to its size.
- Address may be set to zero if address translation and protection is not supported. */
-/* -------------- */
- pseudo_bit_t reserved4[0x00040];
-/* -------------- */
-};
-
-/* Multicast Support Parameters */
-
-struct tavorprm_multicastparam_st { /* Little Endian */
- pseudo_bit_t mc_base_addr_h[0x00020];/* Base Address of the Multicast Table [63:32].
- The base address must be aligned to the entry size.
- Address may be set to zero if multicast is not supported. */
-/* -------------- */
- pseudo_bit_t mc_base_addr_l[0x00020];/* Base Address of the Multicast Table [31:0].
- The base address must be aligned to the entry size.
- Address may be set to zero if multicast is not supported. */
-/* -------------- */
- pseudo_bit_t reserved0[0x00040];
-/* -------------- */
- pseudo_bit_t log_mc_table_entry_sz[0x00010];/* Log2 of the Size of multicast group member (MGM) entry.
- Must be greater than 5 (to allow CTRL and GID sections).
- That implies the number of QPs per MC table entry. */
- pseudo_bit_t reserved1[0x00010];
-/* -------------- */
- pseudo_bit_t mc_table_hash_sz[0x00011];/* Number of entries in multicast DGID hash table (must be power of 2)
- INIT_HCA - the required number of entries
- QUERY_HCA - the actual number of entries assigned by firmware (will be less than or equal to the amount required in INIT_HCA) */
- pseudo_bit_t reserved2[0x0000f];
-/* -------------- */
- pseudo_bit_t log_mc_table_sz[0x00005];/* Log2 of the overall number of MC entries in the MCG table (includes both hash and auxiliary tables) */
- pseudo_bit_t reserved3[0x00013];
- pseudo_bit_t mc_hash_fn[0x00003]; /* Multicast hash function
- 0 - Default hash function
- other - reserved */
- pseudo_bit_t reserved4[0x00005];
-/* -------------- */
- pseudo_bit_t reserved5[0x00020];
-/* -------------- */
-};
-
-/* Memory Access Parameters for UD Address Vector Table */
-
-struct tavorprm_udavtable_memory_parameters_st { /* Little Endian */
- pseudo_bit_t l_key[0x00020]; /* L_Key used to access TPT */
-/* -------------- */
- pseudo_bit_t pd[0x00018]; /* PD used by TPT for matching against PD of region entry being accessed. */
- pseudo_bit_t reserved0[0x00005];
- pseudo_bit_t xlation_en[0x00001]; /* When cleared, address is physical address and no translation will be done. When set, address is virtual. TPT will be accessed in both cases for address decoding purposes. */
- pseudo_bit_t reserved1[0x00002];
-/* -------------- */
-};
-
-/* QPC/EEC/CQC/EQC/RDB Parameters */
-
-struct tavorprm_qpcbaseaddr_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00080];
-/* -------------- */
- pseudo_bit_t qpc_base_addr_h[0x00020];/* QPC Base Address [63:32]
- Table must be aligned on its size */
-/* -------------- */
- pseudo_bit_t log_num_of_qp[0x00005];/* Log base 2 of number of supported QPs */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t qpc_base_addr_l[0x00019];/* QPC Base Address [31:7]
- Table must be aligned on its size */
-/* -------------- */
- pseudo_bit_t reserved2[0x00040];
-/* -------------- */
- pseudo_bit_t eec_base_addr_h[0x00020];/* EEC Base Address [63:32]
- Table must be aligned on its size.
- Address may be set to zero if RD is not supported. */
-/* -------------- */
- pseudo_bit_t log_num_of_ee[0x00005];/* Log base 2 of number of supported EEs. */
- pseudo_bit_t reserved3[0x00002];
- pseudo_bit_t eec_base_addr_l[0x00019];/* EEC Base Address [31:7]
- Table must be aligned on its size
- Address may be set to zero if RD is not supported. */
-/* -------------- */
- pseudo_bit_t srqc_base_addr_h[0x00020];/* SRQ Context Base Address [63:32]
- Table must be aligned on its size
- Address may be set to zero if SRQ is not supported. */
-/* -------------- */
- pseudo_bit_t log_num_of_srq[0x00005];/* Log base 2 of number of supported SRQs. */
- pseudo_bit_t srqc_base_addr_l[0x0001b];/* SRQ Context Base Address [31:5]
- Table must be aligned on its size
- Address may be set to zero if SRQ is not supported. */
-/* -------------- */
- pseudo_bit_t cqc_base_addr_h[0x00020];/* CQC Base Address [63:32]
- Table must be aligned on its size */
-/* -------------- */
- pseudo_bit_t log_num_of_cq[0x00005];/* Log base 2 of number of supported CQs. */
- pseudo_bit_t reserved4[0x00001];
- pseudo_bit_t cqc_base_addr_l[0x0001a];/* CQC Base Address [31:6]
- Table must be aligned on its size */
-/* -------------- */
- pseudo_bit_t reserved5[0x00040];
-/* -------------- */
- pseudo_bit_t eqpc_base_addr_h[0x00020];/* Extended QPC Base Address [63:32]
- Table has same number of entries as QPC table.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t eqpc_base_addr_l[0x00020];/* Extended QPC Base Address [31:0]
- Table has same number of entries as QPC table.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t reserved6[0x00040];
-/* -------------- */
- pseudo_bit_t eeec_base_addr_h[0x00020];/* Extended EEC Base Address [63:32]
- Table has same number of entries as EEC table.
- Table must be aligned to entry size.
- Address may be set to zero if RD is not supported. */
-/* -------------- */
- pseudo_bit_t eeec_base_addr_l[0x00020];/* Extended EEC Base Address [31:0]
- Table has same number of entries as EEC table.
- Table must be aligned to entry size.
- Address may be set to zero if RD is not supported. */
-/* -------------- */
- pseudo_bit_t reserved7[0x00040];
-/* -------------- */
- pseudo_bit_t eqc_base_addr_h[0x00020];/* EQC Base Address [63:32]
- Address may be set to zero if EQs are not supported.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t log_num_eq[0x00004]; /* Log base 2 of number of supported EQs.
- Must be 6 or less in InfiniHost. */
- pseudo_bit_t reserved8[0x00002];
- pseudo_bit_t eqc_base_addr_l[0x0001a];/* EQC Base Address [31:6]
- Address may be set to zero if EQs are not supported.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t reserved9[0x00040];
-/* -------------- */
- pseudo_bit_t rdb_base_addr_h[0x00020];/* Base address of table that holds remote read and remote atomic requests [63:32].
- Table must be aligned to RDB entry size (32 bytes).
- Address may be set to zero if remote RDMA reads are not supported.
- Please refer to QP and EE chapter for further explanation on RDB allocation. */
-/* -------------- */
- pseudo_bit_t rdb_base_addr_l[0x00020];/* Base address of table that holds remote read and remote atomic requests [31:0].
- Table must be aligned to RDB entry size (32 bytes).
- This field must always be zero.
- Please refer to QP and EE chapter for further explanation on RDB allocation. */
-/* -------------- */
- pseudo_bit_t reserved10[0x00040];
-/* -------------- */
-};
-
-/* Performance Monitors */
-
-struct tavorprm_performance_monitors_st { /* Little Endian */
- pseudo_bit_t e0[0x00001]; /* Enables counting of respective performance counter */
- pseudo_bit_t e1[0x00001]; /* Enables counting of respective performance counter */
- pseudo_bit_t e2[0x00001]; /* Enables counting of respective performance counter */
- pseudo_bit_t reserved0[0x00001];
- pseudo_bit_t r0[0x00001]; /* If written to as '1 - resets respective performance counter, if written to az '0 - no change to matter */
- pseudo_bit_t r1[0x00001]; /* If written to as '1 - resets respective performance counter, if written to az '0 - no change to matter */
- pseudo_bit_t r2[0x00001]; /* If written to as '1 - resets respective performance counter, if written to az '0 - no change to matter */
- pseudo_bit_t reserved1[0x00001];
- pseudo_bit_t i0[0x00001]; /* Interrupt enable on respective counter overflow. '1 - interrupt enabled, '0 - interrupt disabled. */
- pseudo_bit_t i1[0x00001]; /* Interrupt enable on respective counter overflow. '1 - interrupt enabled, '0 - interrupt disabled. */
- pseudo_bit_t i2[0x00001]; /* Interrupt enable on respective counter overflow. '1 - interrupt enabled, '0 - interrupt disabled. */
- pseudo_bit_t reserved2[0x00001];
- pseudo_bit_t f0[0x00001]; /* Overflow flag. If set, overflow occurred on respective counter. Cleared if written to as '1 */
- pseudo_bit_t f1[0x00001]; /* Overflow flag. If set, overflow occurred on respective counter. Cleared if written to as '1 */
- pseudo_bit_t f2[0x00001]; /* Overflow flag. If set, overflow occurred on respective counter. Cleared if written to as '1 */
- pseudo_bit_t reserved3[0x00001];
- pseudo_bit_t ev_cnt1[0x00005]; /* Specifies event to be counted by Event_counter1 See XXX for events' definition. */
- pseudo_bit_t reserved4[0x00003];
- pseudo_bit_t ev_cnt2[0x00005]; /* Specifies event to be counted by Event_counter2 See XXX for events' definition. */
- pseudo_bit_t reserved5[0x00003];
-/* -------------- */
- pseudo_bit_t clock_counter[0x00020];
-/* -------------- */
- pseudo_bit_t event_counter1[0x00020];
-/* -------------- */
- pseudo_bit_t event_counter2[0x00020];/* Read/write event counter, counting events specified by EvCntl and EvCnt2 fields repsectively. When the event counter reaches is maximum value of 0xFFFFFF, the next event will cause it to roll over to zero, set F1 or F2 bit respectively and generate interrupt by I1 I2 bit respectively. */
-/* -------------- */
-};
-
-/* QP and EE Context Entry */
-
-struct tavorprm_queue_pair_ee_context_entry_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t de[0x00001]; /* Send/Receive Descriptor Event enable - if set, events can be generated upon descriptors' completion on send/receive queue (controlled by E bit in WQE). Invalid in EE context */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t pm_state[0x00002]; /* Path migration state (Migrated, Armed or Rearm)
- 11-Migrated
- 00-Armed
- 01-Rearm
- 10-Reserved
- Should be set to 11 for UD QPs and for QPs which do not support APM */
- pseudo_bit_t reserved2[0x00003];
- pseudo_bit_t st[0x00003]; /* Service type (invalid in EE context):
- 000-Reliable Connection
- 001-Unreliable Connection
- 010-Reliable Datagram (Not supported for InfiniHost MT23108)
- 011-Unreliable Datagram
- 111-MLX transport (raw bits injection). Used for management QPs and RAW */
- pseudo_bit_t reserved3[0x00009];
- pseudo_bit_t state[0x00004]; /* QP/EE state:
- 0 - RST
- 1 - INIT
- 2 - RTR
- 3 - RTS
- 4 - SQEr
- 5 - SQD (Send Queue Drained)
- 6 - ERR
- 7 - Send Queue Draining
- 8 - F - RESERVED
- (Valid for QUERY_QPEE and ERR2RST_QPEE commands only) */
-/* -------------- */
- pseudo_bit_t sched_queue[0x00004]; /* Schedule queue to be used for WQE scheduling to execution. Determines QOS for this QP. */
- pseudo_bit_t reserved4[0x0001c];
-/* -------------- */
- pseudo_bit_t reserved5[0x00018];
- pseudo_bit_t msg_max[0x00005]; /* Max message size allowed on the QP. Maximum message size is 2^msg_Max.
- Must be equal to MTU for UD and MLX QPs. */
- pseudo_bit_t mtu[0x00003]; /* MTU of the QP (Must be the same for both paths: primary and alternative):
- 0x1 - 256 bytes
- 0x2 - 512
- 0x3 - 1024
- 0x4 - 2048
- other - reserved
-
- Should be configured to 0x4 for UD and MLX QPs. */
-/* -------------- */
- pseudo_bit_t usr_page[0x00018]; /* Index (offset) of user page allocated for this QP (see "non_privileged Access to the HCA Hardware"). Not valid (reserved) in EE context. */
- pseudo_bit_t reserved6[0x00008];
-/* -------------- */
- pseudo_bit_t local_qpn_een[0x00018];/* Local QP/EE number Lower bits determine position of this record in QPC table, and - thus - constrained
- This field is valid for QUERY and ERR2RST commands only. */
- pseudo_bit_t reserved7[0x00008];
-/* -------------- */
- pseudo_bit_t remote_qpn_een[0x00018];/* Remote QP/EE number */
- pseudo_bit_t reserved8[0x00008];
-/* -------------- */
- pseudo_bit_t reserved9[0x00040];
-/* -------------- */
- struct tavorprm_address_path_st primary_address_path;/* Primary address path for the QP/EE */
-/* -------------- */
- struct tavorprm_address_path_st alternative_address_path;/* Alternate address path for the QP/EE */
-/* -------------- */
- pseudo_bit_t rdd[0x00018]; /* Reliable Datagram Domain */
- pseudo_bit_t reserved10[0x00008];
-/* -------------- */
- pseudo_bit_t pd[0x00018]; /* QP protection domain. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved11[0x00008];
-/* -------------- */
- pseudo_bit_t wqe_base_adr[0x00020]; /* Bits 63:32 of WQE address for both SQ and RQ.
- Reserved for EE context. */
-/* -------------- */
- pseudo_bit_t wqe_lkey[0x00020]; /* memory key (L-Key) to be used to access WQEs. Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t reserved12[0x00003];
- pseudo_bit_t ssc[0x00001]; /* Send Signaled Completion
- 1 - all send WQEs generate CQEs.
- 0 - only send WQEs with C bit set generate completion.
- Not valid (reserved) in EE context. */
- pseudo_bit_t sic[0x00001]; /* If set - Ignore end to end credits on send queue. Not valid (reserved) in EE context. */
- pseudo_bit_t cur_retry_cnt[0x00003];/* Current transport retry counter (QUERY_QPEE only).
- The current transport retry counter can vary from retry_count down to 1, where 1 means that the last retry attempt is currently executing. */
- pseudo_bit_t cur_rnr_retry[0x00003];/* Current RNR retry counter (QUERY_QPEE only).
- The current RNR retry counter can vary from rnr_retry to 1, where 1 means that the last retry attempt is currently executing. */
- pseudo_bit_t reserved13[0x00002];
- pseudo_bit_t sae[0x00001]; /* If set - Atomic operations enabled on send queue. Not valid (reserved) in EE context. */
- pseudo_bit_t swe[0x00001]; /* If set - RDMA - write enabled on send queue. Not valid (reserved) in EE context. */
- pseudo_bit_t sre[0x00001]; /* If set - RDMA - read enabled on send queue. Not valid (reserved) in EE context. */
- pseudo_bit_t retry_count[0x00003]; /* Transport timeout Retry count */
- pseudo_bit_t reserved14[0x00002];
- pseudo_bit_t sra_max[0x00003]; /* Maximum number of outstanding RDMA-read/Atomic operations allowed in the send queue. Maximum number is 2^SRA_Max. Must be zero in EE context. */
- pseudo_bit_t flight_lim[0x00004]; /* Number of outstanding (in-flight) messages on the wire allowed for this send queue.
- Number of outstanding messages is 2^Flight_Lim.
- Use 0xF for unlimited number of outstanding messages. */
- pseudo_bit_t ack_req_freq[0x00004]; /* ACK required frequency. ACK required bit will be set in every 2^AckReqFreq packets at least. Not valid for RD QP. */
-/* -------------- */
- pseudo_bit_t reserved15[0x00020];
-/* -------------- */
- pseudo_bit_t next_send_psn[0x00018];/* Next PSN to be sent */
- pseudo_bit_t reserved16[0x00008];
-/* -------------- */
- pseudo_bit_t cqn_snd[0x00018]; /* CQ number completions from the send queue to be reported to. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved17[0x00008];
-/* -------------- */
- pseudo_bit_t next_snd_wqe_0[0x00020];/* Pointer and properties of next WQE on send queue. The format is same as next segment (first 8 bytes) in the WQE. This field is read-only and provided for debug purposes. Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t next_snd_wqe_1[0x00020];/* Pointer and properties of next WQE on send queue. The format is same as next segment (first 8 bytes) in the WQE. This field is read-only and provided for debug purposes. Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t last_acked_psn[0x00018];/* The last acknowledged PSN for the requester (QUERY_QPEE only) */
- pseudo_bit_t reserved18[0x00008];
-/* -------------- */
- pseudo_bit_t ssn[0x00018]; /* Requester Send Sequence Number (QUERY_QPEE only) */
- pseudo_bit_t reserved19[0x00008];
-/* -------------- */
- pseudo_bit_t reserved20[0x00003];
- pseudo_bit_t rsc[0x00001]; /* 1 - all receive WQEs generate CQEs.
- 0 - only receive WQEs with C bit set generate completion.
- Not valid (reserved) in EE context.
- */
- pseudo_bit_t ric[0x00001]; /* Invalid Credits.
- 1 - place "Invalid Credits" to ACKs sent from this queue.
- 0 - ACKs report the actual number of end to end credits on the connection.
- Not valid (reserved) in EE context.
- Must be set to 1 on QPs which are attached to SRQ. */
- pseudo_bit_t reserved21[0x00008];
- pseudo_bit_t rae[0x00001]; /* If set - Atomic operations enabled. on receive queue. Not valid (reserved) in EE context. */
- pseudo_bit_t rwe[0x00001]; /* If set - RDMA - write enabled on receive queue. Not valid (reserved) in EE context. */
- pseudo_bit_t rre[0x00001]; /* If set - RDMA - read enabled on receive queue. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved22[0x00005];
- pseudo_bit_t rra_max[0x00003]; /* Maximum number of outstanding RDMA-read/Atomic operations allowed on receive queue is 2^RRA_Max.
- Must be 0 for EE context. */
- pseudo_bit_t reserved23[0x00008];
-/* -------------- */
- pseudo_bit_t next_rcv_psn[0x00018]; /* Next (expected) PSN on receive */
- pseudo_bit_t min_rnr_nak[0x00005]; /* Minimum RNR NAK timer value (TTTTT field encoding according to the IB spec Vol1 9.7.5.2.8).
- Not valid (reserved) in EE context. */
- pseudo_bit_t reserved24[0x00003];
-/* -------------- */
- pseudo_bit_t reserved25[0x00005];
- pseudo_bit_t ra_buff_indx[0x0001b]; /* Index to outstanding read/atomic buffer.
- This field constructs the address to the RDB for maintaining the incoming RDMA read and atomic requests. */
-/* -------------- */
- pseudo_bit_t cqn_rcv[0x00018]; /* CQ number completions from receive queue to be reported to. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved26[0x00008];
-/* -------------- */
- pseudo_bit_t next_rcv_wqe_0[0x00020];/* Pointer and properties of next WQE on the receive queue. This format is same as next segment (first 8 bytes) in the WQE.This field is read-only and provided for debug purposes. Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t next_rcv_wqe_1[0x00020];/* Pointer and properties of next WQE on the receive queue. This format is same as next segment (first 8 bytes) in the WQE.This field is read-only and provided for debug purposes. Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t q_key[0x00020]; /* Q_Key to be validated against received datagrams.
- On send datagrams, if Q_Key[31] specified in the WQE is set, then this Q_Key will be transmitted in the outgoing message.
- Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t srqn[0x00018]; /* SRQN - Shared Receive Queue Number - specifies the SRQ number from which the QP dequeues receive descriptors.
- SRQN is valid only if SRQ bit is set. Not valid (reserved) in EE context. */
- pseudo_bit_t srq[0x00001]; /* SRQ - Shared Receive Queue. If this bit is set, then the QP is associated with a SRQ. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved27[0x00007];
-/* -------------- */
- pseudo_bit_t rmsn[0x00018]; /* Responder current message sequence number (QUERY_QPEE only) */
- pseudo_bit_t reserved28[0x00008];
-/* -------------- */
- pseudo_bit_t reserved29[0x00260];
-/* -------------- */
-};
-
-/* MOD_STAT_CFG */
-
-struct tavorprm_mod_stat_cfg_st { /* Little Endian */
- pseudo_bit_t log_max_srqs[0x00005]; /* Log (base 2) of the number of SRQs to allocate (0 if no SRQs are required), valid only if srq bit is set. */
- pseudo_bit_t reserved0[0x00001];
- pseudo_bit_t srq[0x00001]; /* When set SRQs are supported */
- pseudo_bit_t srq_m[0x00001]; /* Modify SRQ parameters */
- pseudo_bit_t reserved1[0x00018];
-/* -------------- */
- pseudo_bit_t reserved2[0x007e0];
-/* -------------- */
-};
-
-/* SRQ Context */
-
-struct tavorprm_srq_context_st { /* Little Endian */
- pseudo_bit_t wqe_addr_h[0x00020]; /* WQE base address for the SRQ [63:32]
- Must be set at SW2HW_SRQ */
-/* -------------- */
- pseudo_bit_t ds[0x00006]; /* Descriptor Size on the SRQ in units of 16 bytes */
- pseudo_bit_t next_wqe_addr_l[0x0001a];/* Next WQE address for the SRQ [31:6]
- Valid only on QUERY_SRQ and HW2SW_SRQ commands. */
-/* -------------- */
- pseudo_bit_t pd[0x00018]; /* SRQ PD - used for descriptor fetching on the SRQ and for data scatter on send operations on QPs attached to SRQ.
- In InfiniHost MT23108 SRQ.PD must be equal to the PD of all QPs which are attached to the SRQ */
- pseudo_bit_t reserved0[0x00004];
- pseudo_bit_t state[0x00004]; /* SRQ State:
- 1111 - SW Ownership
- 0000 - HW Ownership
- 0001 - Error
- Valid only on QUERY_SRQ and HW2SW_SRQ commands. */
-/* -------------- */
- pseudo_bit_t l_key[0x00020]; /* L_Key for descriptor fetching on the SRQ */
-/* -------------- */
- pseudo_bit_t uar[0x00018]; /* SRQ User Access Region - Index (offset) of user page allocated for the SRQ (see "Non Privileged Access to the HCA HW"). */
- pseudo_bit_t reserved1[0x00008];
-/* -------------- */
- pseudo_bit_t wqe_cnt[0x00010]; /* WQE count on the SRQ.
- Valid only on QUERY_SRQ and HW2SW_SRQ commands. */
- pseudo_bit_t lwm[0x00010]; /* Limit Water Mark - if the LWM is not zero, and the wqe_cnt drops below LWM when a WQE is dequeued from the SRQ, then a SRQ limit event is fired and the LWM is set to zero. */
-/* -------------- */
- pseudo_bit_t reserved2[0x00010];
- pseudo_bit_t reserved3[0x00010];
-/* -------------- */
- pseudo_bit_t reserved4[0x00020];
-/* -------------- */
-};
-
-/* InfiniHost Configuration Registers */
-
-struct tavorprm_mt23108_configuration_registers_st { /* Little Endian */
- pseudo_bit_t reserved0[0x403400];
-/* -------------- */
- struct tavorprm_hca_command_register_st hca_command_interface_register;/* HCA Command Register */
-/* -------------- */
- pseudo_bit_t reserved1[0x00320];
-/* -------------- */
- pseudo_bit_t ecr_h[0x00020]; /* Event Cause Register[63:32]. Each bit in the ECR corresponds to one of the 64 Event Queues in InfiniHost. If bit is set, interrupt was asserted due to event reported on corresponding event queue. This register is read-only; writing to this register will cause undefined results
- */
-/* -------------- */
- pseudo_bit_t ecr_l[0x00020]; /* Event Cause Register[31:0]. Each bit in the ECR corresponds to one of the 64 Event Queues in InfiniHost. If bit is set, interrupt was asserted due to event reported on corresponding event queue. This register is read-only; writing to this register will cause undefined results
- */
-/* -------------- */
- pseudo_bit_t clr_ecr_h[0x00020]; /* Clear Event Cause Register[63:32].
- This register is used to clear bits in ECR register. Each set bit in data written to this register clears corresponding bit in the ECR register, Each bit written with zero has no effect. This register is write-only. Reading from this register will cause undefined result
- */
-/* -------------- */
- pseudo_bit_t clr_ecr_l[0x00020]; /* Clear Event Cause Register[31:0].
- This register is used to clear bits in ECR register. Each set bit in data written to this register clears corresponding bit in the ECR register, Each bit written with zero has no effect. This register is write-only. Reading from this register will cause undefined result
- */
-/* -------------- */
- pseudo_bit_t reserved2[0x4c780];
-/* -------------- */
- pseudo_bit_t reserved3[0x01000];
-/* -------------- */
- pseudo_bit_t reserved4[0x32f6c0];
-/* -------------- */
- pseudo_bit_t clr_int_h[0x00020]; /* Clear Interrupt [63:32]
- This register is used to clear (de-assert) interrupt output pins of InfiniHost. The value to be written in this register is obtained by executing QUERY_ADAPTER command on command interface after system boot. This register is write-only. Reading from this register will cause undefined result */
-/* -------------- */
- pseudo_bit_t clr_int_l[0x00020]; /* Clear Interrupt [31:0]
- This register is used to clear (de-assert) interrupt output pins of InfiniHost. The value to be written in this register is obtained by executing QUERY_ADAPTER command on command interface after system boot. This register is write-only. Reading from this register will cause undefined result */
-/* -------------- */
- pseudo_bit_t reserved5[0x7f900];
-/* -------------- */
-};
-
-/* Schedule queues configuration */
-
-struct tavorprm_cfg_schq_st { /* Little Endian */
- pseudo_bit_t quota[0x00008]; /* Number of WQEs that are executed until preemption of the scheduling queue and switching to the next schedule queue */
- pseudo_bit_t reserved0[0x00018];
-/* -------------- */
- pseudo_bit_t rqsq0[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq0[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq1[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq1[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq2[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq2[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq3[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq3[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq4[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq4[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq5[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq5[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq6[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq6[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq7[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq7[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq8[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq8[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq9[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq9[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq10[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq10[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq11[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq11[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq12[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq12[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq13[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq13[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq14[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq14[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq15[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq15[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq16[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq16[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq17[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq17[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq18[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq18[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq19[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq19[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq20[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq20[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq21[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq21[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq22[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq22[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq23[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq23[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq24[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq24[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq25[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq25[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq26[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq26[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq27[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq27[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq28[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq28[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq29[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq29[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t rqsq30[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq30[0x00008]; /* Weight for responder schedule queue */
- pseudo_bit_t rqsq31[0x00008]; /* Weight for requestor schedule queue */
- pseudo_bit_t rssq31[0x00008]; /* Weight for responder schedule queue */
-/* -------------- */
- pseudo_bit_t reserved1[0x005e0];
-/* -------------- */
-};
-
-/* Query BAR */
-
-struct tavorprm_query_bar_st { /* Little Endian */
- pseudo_bit_t bar_base_h[0x00020]; /* BAR base [63:32] */
-/* -------------- */
- pseudo_bit_t reserved0[0x00014];
- pseudo_bit_t bar_base_l[0x0000c]; /* BAR base [31:20] */
-/* -------------- */
-};
-
-/* Performance Counters */
-
-struct tavorprm_performance_counters_st { /* Little Endian */
- pseudo_bit_t sqpc_access_cnt[0x00020];/* SQPC cache access count */
-/* -------------- */
- pseudo_bit_t sqpc_miss_cnt[0x00020];/* SQPC cache miss count */
-/* -------------- */
- pseudo_bit_t reserved0[0x00040];
-/* -------------- */
- pseudo_bit_t rqpc_access_cnt[0x00020];/* RQPC cache access count */
-/* -------------- */
- pseudo_bit_t rqpc_miss_cnt[0x00020];/* RQPC cache miss count */
-/* -------------- */
- pseudo_bit_t reserved1[0x00040];
-/* -------------- */
- pseudo_bit_t cqc_access_cnt[0x00020];/* CQC cache access count */
-/* -------------- */
- pseudo_bit_t cqc_miss_cnt[0x00020]; /* CQC cache miss count */
-/* -------------- */
- pseudo_bit_t reserved2[0x00040];
-/* -------------- */
- pseudo_bit_t tpt_access_cnt[0x00020];/* TPT cache access count */
-/* -------------- */
- pseudo_bit_t mpt_miss_cnt[0x00020]; /* MPT cache miss count */
-/* -------------- */
- pseudo_bit_t mtt_miss_cnt[0x00020]; /* MTT cache miss count */
-/* -------------- */
- pseudo_bit_t reserved3[0x00620];
-/* -------------- */
-};
-
-/* Transport and CI Error Counters */
-
-struct tavorprm_transport_and_ci_error_counters_st { /* Little Endian */
- pseudo_bit_t rq_num_lle[0x00020]; /* Responder - number of local length errors.
- Local Length Errors: Inbound "Send" request message exceeded the responders available buffer space. */
-/* -------------- */
- pseudo_bit_t sq_num_lle[0x00020]; /* Requester - number of local length errors.
- Length Errors: RDMA READ response message contained too much or too little payload data. */
-/* -------------- */
- pseudo_bit_t rq_num_lqpoe[0x00020]; /* Responder - number local QP operation error.
- 1. Malformed WQE: Responder detected a malformed Receive Queue WQE while processing the packet.
- 2. Local QP Error: Responder detected a local QP related error while executing the request message. The local error prevented the responder from completing the request. */
-/* -------------- */
- pseudo_bit_t sq_num_lqpoe[0x00020]; /* Requester - number local QP operation error
- 1. Local Operation Error: (WQE gather, affiliated or unaffiliated): An error occurred in the requesters local channel interface that either cannot be associated with a certain WQE, or occurred when reading a WQE.
- */
-/* -------------- */
- pseudo_bit_t rq_num_leeoe[0x00020]; /* Responder - number local EE operation error.
- RD */
-/* -------------- */
- pseudo_bit_t sq_num_leeoe[0x00020]; /* Requester - number local EE operation error.
- RD */
-/* -------------- */
- pseudo_bit_t rq_num_lpe[0x00020]; /* Responder - number of local protection errors.
- Local QP (Protection) Error: Responder detected a local access violation error while executing a send request message. The error prevented the responder from completing the request. */
-/* -------------- */
- pseudo_bit_t sq_num_lpe[0x00020]; /* Requester - number of local protection errors.
- Local Memory Protection Error: Requester detected a memory translation/protection (TPT) error.
- */
-/* -------------- */
- pseudo_bit_t rq_num_wrfe[0x00020]; /* Responder - number of CQEs with error generated. */
-/* -------------- */
- pseudo_bit_t sq_num_wrfe[0x00020]; /* Requester - number of CQEs with error generated. */
-/* -------------- */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
- pseudo_bit_t sq_num_mwbe[0x00020]; /* Requester - number of memory window bind errors. */
-/* -------------- */
- pseudo_bit_t reserved1[0x00020];
-/* -------------- */
- pseudo_bit_t sq_num_bre[0x00020]; /* Requester - number of bad response errors.
- Bad response: Unexpected opcode for the response packet received at the expected response PSN. */
-/* -------------- */
- pseudo_bit_t rq_num_lae[0x00020]; /* Responder - number of local access errors.
- Unused. */
-/* -------------- */
- pseudo_bit_t reserved2[0x00040];
-/* -------------- */
- pseudo_bit_t sq_num_rire[0x00020]; /* Requester - number of remote invalid request errors.
- NAK-Invalid Request on:
- 1. Unsupported OpCode: Responder detected an unsupported OpCode.
- 2. Unexpected OpCode: Responder detected an error in the sequence of OpCodes, such as a missing "Last" packet.
- Note: there is no PSN error, thus this does not indicate a dropped packet. */
-/* -------------- */
- pseudo_bit_t rq_num_rire[0x00020]; /* Responder - number of remote invalid request errors.
- NAK may or may not be sent.
- 1. Unsupported or Reserved OpCode: Inbound request OpCode was either reserved, or was for a function not supported by this QP. (E.G. RDMA or ATOMIC on QP not set up for this). For RC this is "QP Async affiliated".
- 2. Misaligned ATOMIC: VA does not point to an aligned address on an atomic operation.
- 3. Too many RDMA READ or ATOMIC Requests: There were more requests received and not ACKed than allowed for the connection.
- 4. Out of Sequence OpCode, current packet is "first" or "Only": The Responder detected an error in the sequence of OpCodes; a missing "Last" packet
- 5. Out of Sequence OpCode, current packet is not "first" or "Only": The Responder detected an error in the sequence of OpCodes; a missing "First" packet
- 6. Local Length Error: Inbound "Send" request message exceeded the responder.s available buffer space.
- 7. Length error: RDMA WRITE request message contained too much or too little payload data compared to the DMA length advertised in the first or only packet.
- 8. Length error: Payload length was not consistent with the opcode:
- a: 0 byte <= "only" <= PMTU bytes
- b: ("first" or "middle") == PMTU bytes
- c: 1byte <= "last" <= PMTU bytes
- 9. Length error: Inbound message exceeded the size supported by the CA port. */
-/* -------------- */
- pseudo_bit_t sq_num_rae[0x00020]; /* Requester - number of remote access errors.
- NAK-Remote Access Error on:
- R_Key Violation: Responder detected an invalid R_Key while executing an RDMA Request. */
-/* -------------- */
- pseudo_bit_t rq_num_rae[0x00020]; /* Responder - number of remote access errors.
- R_Key Violation Responder detected an R_Key violation while executing an RDMA request.
- NAK may or may not be sent. */
-/* -------------- */
- pseudo_bit_t sq_num_roe[0x00020]; /* Requester - number of remote operation errors.
- NAK-Remote Operation Error on:
- Remote Operation Error: Responder encountered an error, (local to the responder), which prevented it from completing the request. */
-/* -------------- */
- pseudo_bit_t rq_num_roe[0x00020]; /* Responder - number of remote operation errors.
- NAK-Remote Operation Error on:
- 1. Malformed WQE: Responder detected a malformed Receive Queue WQE while processing the packet.
- 2. Remote Operation Error: Responder encountered an error, (local to the responder), which prevented it from completing the request. */
-/* -------------- */
- pseudo_bit_t sq_num_tree[0x00020]; /* Requester - number of transport retries exceeded errors.
- 1. Packet sequence error: Retry limit exceeded. Responder detected a PSN larger than it expected. The requestor performed retries, and automatic path migration and additional retries, if applicable, but all attempts failed.
- 2. Implied NAK sequence error: Retry limit exceeded. Requestor detected an ACK with a PSN larger than the expected PSN for an RDMA READ or atomic response. The requestor performed retries, and automatic path migration and additional retries, if applicable, but all attempts failed.
- 3. Local Ack Timeout error: Retry limit exceeded. No ACK response within timer interval. The requestor performed retries, and automatic path migration and additional retries, but all attempts failed. */
-/* -------------- */
- pseudo_bit_t reserved3[0x00020];
-/* -------------- */
- pseudo_bit_t sq_num_rree[0x00020]; /* Requester - number of RNR nak retries exceeded errors.
- RNR NAK Retry error. Retry limit exceeded. Excessive RNR NAKs returned by the responder: Requestor retried the request "n" times, but received RNR NAK each time. */
-/* -------------- */
- pseudo_bit_t reserved4[0x00020];
-/* -------------- */
- pseudo_bit_t sq_num_lrdve[0x00020]; /* Requester - number of local RDD violation errors.
- RD only. */
-/* -------------- */
- pseudo_bit_t rq_num_rirdre[0x00020];/* Responder - number of remote invalid RD request errors.
- RD only. */
-/* -------------- */
- pseudo_bit_t reserved5[0x00040];
-/* -------------- */
- pseudo_bit_t sq_num_rabrte[0x00020];/* Requester - number of remote aborted errors.
- RD only. */
-/* -------------- */
- pseudo_bit_t reserved6[0x00020];
-/* -------------- */
- pseudo_bit_t sq_num_ieecne[0x00020];/* Requester - number of invalid EE context number errors.
- RD only. */
-/* -------------- */
- pseudo_bit_t reserved7[0x00020];
-/* -------------- */
- pseudo_bit_t sq_num_ieecse[0x00020];/* Requester - invalid EE context state errors.
- RD only. */
-/* -------------- */
- pseudo_bit_t reserved8[0x00380];
-/* -------------- */
- pseudo_bit_t rq_num_oos[0x00020]; /* Responder - number of out of sequence requests received.
- Out of Sequence Request Packet: Packet PSN of the inbound request is outside the responders valid PSN window.
- NAK may or may not be sent. */
-/* -------------- */
- pseudo_bit_t sq_num_oos[0x00020]; /* Requester - number of out of sequence Naks received.
- NAK-Sequence Error on:
- 1. Packet sequence error. Retry limit not exceeded: Responder detected a PSN larger than it expected. Requester may retry the request.
- 2. Packet sequence error. Retry limit exceeded: Responder detected a PSN larger than it expected. The requestor performed retries, and automatic path migration and additional retries, if applicable, but all attempts failed. */
-/* -------------- */
- pseudo_bit_t rq_num_mce[0x00020]; /* Responder - number of bad multicast packets received.
- Missing GID or bad GID. */
-/* -------------- */
- pseudo_bit_t reserved9[0x00020];
-/* -------------- */
- pseudo_bit_t rq_num_rsync[0x00020]; /* Responder - number of RESYNC operations.
- RD only. */
-/* -------------- */
- pseudo_bit_t sq_num_rsync[0x00020]; /* Requester - number of RESYNC operations.
- RD only. */
-/* -------------- */
- pseudo_bit_t rq_num_udsdprd[0x00020];/* The number of UD packets silently discarded on the receive queue due to lack of receive descriptor.
- Resources Not Ready Error: A UD WQE is not currently available. */
-/* -------------- */
- pseudo_bit_t reserved10[0x00020];
-/* -------------- */
- pseudo_bit_t rq_num_ucsdprd[0x00020];/* The number of UC packets silently discarded on the receive queue due to lack of receive descriptor.
- Resources Not Ready Error: A UC WQE is not currently available. */
-/* -------------- */
- pseudo_bit_t reserved11[0x003e0];
-/* -------------- */
- pseudo_bit_t num_cqovf[0x00020]; /* Number of CQ overflows.
- Incremented each time a completion is discarded due CQ overflow. */
-/* -------------- */
- pseudo_bit_t num_eqovf[0x00020]; /* Number of EQ overflows.
- Incremented each time EQ enters the overflow state. */
-/* -------------- */
- pseudo_bit_t num_baddb[0x00020]; /* Number of bad doorbells.
- Doorbell dropped due to UAR violation or bad resource state. */
-/* -------------- */
- pseudo_bit_t reserved12[0x002a0];
-/* -------------- */
-};
-
-/* Event_data Field - HCR Completion Event */
-
-struct tavorprm_hcr_completion_event_st { /* Little Endian */
- pseudo_bit_t token[0x00010]; /* HCR Token */
- pseudo_bit_t reserved0[0x00010];
-/* -------------- */
- pseudo_bit_t reserved1[0x00020];
-/* -------------- */
- pseudo_bit_t status[0x00008]; /* HCR Status */
- pseudo_bit_t reserved2[0x00018];
-/* -------------- */
- pseudo_bit_t out_param_h[0x00020]; /* HCR Output Parameter [63:32] */
-/* -------------- */
- pseudo_bit_t out_param_l[0x00020]; /* HCR Output Parameter [31:0] */
-/* -------------- */
- pseudo_bit_t reserved3[0x00020];
-/* -------------- */
-};
-
-/* Completion with Error CQE */
-
-struct tavorprm_completion_with_error_st { /* Little Endian */
- pseudo_bit_t myqpn[0x00018]; /* Indicates the QP for which completion is being reported */
- pseudo_bit_t reserved0[0x00008];
-/* -------------- */
- pseudo_bit_t reserved1[0x00060];
-/* -------------- */
- pseudo_bit_t db_cnt[0x00010]; /* Doorbell count */
- pseudo_bit_t reserved2[0x00008];
- pseudo_bit_t syndrome[0x00008]; /* Completion with error syndrome:
- 0x01 - Local Length Error
- 0x02 - Local QP Operation Error
- 0x03 - Local EE Context Operation Error
- 0x04 - Local Protection Error
- 0x05 - Work Request Flushed Error
- 0x06 - Memory Window Bind Error
- 0x10 - Bad Response Error
- 0x11 - Local Access Error
- 0x12 - Remote Invalid Request Error
- 0x13 - Remote Access Error
- 0x14 - Remote Operation Error
- 0x15 - Transport Retry Counter Exceeded
- 0x16 - RNR Retry Counter Exceeded
- 0x20 - Local RDD Violation Error
- 0x21 - Remote Invalid RD Request
- 0x22 - Remote Aborted Error
- 0x23 - Invalid EE Context Number
- 0x24 - Invalid EE Context State
- other - Reserved
- Syndrome is defined according to the IB specification volume 1. For detailed explanation of the syndromes, refer to chapters 10-11 of the IB specification rev 1.1. */
-/* -------------- */
- pseudo_bit_t reserved3[0x00020];
-/* -------------- */
- pseudo_bit_t wqe_size[0x00006]; /* Size (in 16-byte chunks) of WQE completion is reported for */
- pseudo_bit_t wqe_addr[0x0001a]; /* Bits 31:6 of WQE virtual address completion is reported for. The 6 least significant bits are zero. */
-/* -------------- */
- pseudo_bit_t reserved4[0x00007];
- pseudo_bit_t owner[0x00001]; /* Owner field. Zero value of this field means SW ownership of CQE. */
- pseudo_bit_t reserved5[0x00010];
- pseudo_bit_t opcode[0x00008]; /* The opcode of WQE completion is reported for.
-
- The following values are reported in case of completion with error:
- 0xFE - For completion with error on Receive Queues
- 0xFF - For completion with error on Send Queues */
-/* -------------- */
-};
-
-/* Resize CQ Input Mailbox */
-
-struct tavorprm_resize_cq_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
- pseudo_bit_t start_addr_h[0x00020]; /* Start address of CQ[63:32].
- Must be aligned on CQE size (32 bytes) */
-/* -------------- */
- pseudo_bit_t start_addr_l[0x00020]; /* Start address of CQ[31:0].
- Must be aligned on CQE size (32 bytes) */
-/* -------------- */
- pseudo_bit_t reserved1[0x00018];
- pseudo_bit_t log_cq_size[0x00005]; /* Log (base 2) of the CQ size (in entries) */
- pseudo_bit_t reserved2[0x00003];
-/* -------------- */
- pseudo_bit_t reserved3[0x00060];
-/* -------------- */
- pseudo_bit_t l_key[0x00020]; /* Memory key (L_Key) to be used to access CQ */
-/* -------------- */
- pseudo_bit_t reserved4[0x00100];
-/* -------------- */
-};
-
-/* SYS_EN Output Parameter */
-
-struct tavorprm_sys_en_out_param_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
- pseudo_bit_t spd[0x00001]; /* 0 - DIMM SPD was read from DIMM
- 1 - DIMM SPD was read from InfiniHost NVMEM */
- pseudo_bit_t sladr[0x00003]; /* SPD Slave Address 3 LSBits.
- Valid only if spd bit is 0. */
- pseudo_bit_t sock_num[0x00002]; /* DIMM socket number (for double sided DIMM one of the two numbers will be reported) */
- pseudo_bit_t syn[0x00004]; /* Error Syndrome
- 0 - reserved
- 1 - SPD error (e.g. checksum error, no response, error while reading)
- 2 - DIMM out of bounds (e.g. DIMM rows number is not between 7 and 14, DIMM type is not 2)
- 3 - DIMM conflict (e.g. mix of registered and unbuffered DIMMs, CAS latency conflict)
- 4 - Calibration error
- 5 - reserved
- 6- DDR Memory check failed
- other - Error, reserved */
- pseudo_bit_t reserved1[0x00016];
-/* -------------- */
-};
-
-/* Query Debug Message */
-
-struct tavorprm_query_debug_msg_st { /* Little Endian */
- pseudo_bit_t base_addr_h[0x00020]; /* Debug Buffers Base Address [63:32] */
-/* -------------- */
- pseudo_bit_t base_addr_l[0x00020]; /* Debug Buffers Base Address [31:0] */
-/* -------------- */
- pseudo_bit_t buf_sz[0x00020]; /* Debug Buffer Size (in bytes) */
-/* -------------- */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
- pseudo_bit_t trc_hdr_sz[0x00020]; /* Trace message header size in dwords. */
-/* -------------- */
- pseudo_bit_t trc_arg_num[0x00020]; /* The number of arguments per trace message. */
-/* -------------- */
- pseudo_bit_t reserved1[0x000c0];
-/* -------------- */
- pseudo_bit_t dbg_msk_h[0x00020]; /* Debug messages mask [63:32] */
-/* -------------- */
- pseudo_bit_t dbg_msk_l[0x00020]; /* Debug messages mask [31:0] */
-/* -------------- */
- pseudo_bit_t reserved2[0x00040];
-/* -------------- */
- pseudo_bit_t fs_base_addr0_h[0x00020];/* Base address for format string for irisc 0 bits[63:32] */
-/* -------------- */
- pseudo_bit_t fs_base_addr0_l[0x00020];/* Base address for format string for irisc 0 bits[31:0] */
-/* -------------- */
- pseudo_bit_t fs_base_addr1_h[0x00020];/* Base address for format string for irisc 1 bits[63:32] */
-/* -------------- */
- pseudo_bit_t fs_base_addr1_l[0x00020];/* Base address for format string for irisc 1 bits[31:0] */
-/* -------------- */
- pseudo_bit_t fs_base_addr2_h[0x00020];/* Base address for format string for irisc 2 bits[63:32] */
-/* -------------- */
- pseudo_bit_t fs_base_addr2_l[0x00020];/* Base address for format string for irisc 2 bits[31:0] */
-/* -------------- */
- pseudo_bit_t fs_base_addr3_h[0x00020];/* Base address for format string for irisc 3 bits[63:32] */
-/* -------------- */
- pseudo_bit_t fs_base_addr3_l[0x00020];/* Base address for format string for irisc 3 bits[31:0] */
-/* -------------- */
- pseudo_bit_t fs_base_addr4_h[0x00020];/* Base address for format string for irisc 4 bits[63:32] */
-/* -------------- */
- pseudo_bit_t fs_base_addr4_l[0x00020];/* Base address for format string for irisc 4 bits[31:0] */
-/* -------------- */
- pseudo_bit_t fs_base_addr5_h[0x00020];/* Base address for format string for irisc 5 bits[63:32] */
-/* -------------- */
- pseudo_bit_t fs_base_addr5_l[0x00020];/* Base address for format string for irisc 5 bits[31:0] */
-/* -------------- */
- pseudo_bit_t reserved3[0x00480];
-/* -------------- */
-};
-
-/* User Access Region */
-
-struct tavorprm_uar_st { /* Little Endian */
- struct tavorprm_rd_send_doorbell_st rd_send_doorbell;/* Reliable Datagram SQ Doorbell */
-/* -------------- */
- struct tavorprm_send_doorbell_st send_doorbell;/* SQ Doorbell */
-/* -------------- */
- struct tavorprm_receive_doorbell_st receive_doorbell;/* RQ Doorbell */
-/* -------------- */
- struct tavorprm_cq_cmd_doorbell_st cq_command_doorbell;/* CQ Doorbell */
-/* -------------- */
- struct tavorprm_eq_cmd_doorbell_st eq_command_doorbell;/* EQ Doorbell */
-/* -------------- */
- pseudo_bit_t reserved0[0x01e80];
-/* -------------- */
- pseudo_bit_t infini_blast[256][0x00020];/* InfiniBlast buffer (same format as WQE format)
- Infiniblast is not supported by InfiniHost MT23108 */
-/* -------------- */
-};
-
-/* SET_IB Parameters */
-
-struct tavorprm_set_ib_st { /* Little Endian */
- pseudo_bit_t rqk[0x00001]; /* Reset QKey Violation Counter */
- pseudo_bit_t reserved0[0x00011];
- pseudo_bit_t sig[0x00001]; /* Set System Image GUID to system_image_guid specified.
- system_image_guid and sig must be the same for all ports. */
- pseudo_bit_t reserved1[0x0000d];
-/* -------------- */
- pseudo_bit_t capability_mask[0x00020];/* PortInfo Capability Mask */
-/* -------------- */
- pseudo_bit_t system_image_guid_h[0x00020];/* System Image GUID[63:32], takes effect only if the SIG bit is set
- Must be the same for both ports. */
-/* -------------- */
- pseudo_bit_t system_image_guid_l[0x00020];/* System Image GUID[31:0], takes effect only if the SIG bit is set
- Must be the same for both ports. */
-/* -------------- */
- pseudo_bit_t reserved2[0x00180];
-/* -------------- */
-};
-
-/* Multicast Group Member */
-
-struct tavorprm_mgm_entry_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00006];
- pseudo_bit_t next_gid_index[0x0001a];/* Index of next Multicast Group Member whose GID maps to same MGID_HASH number.
- The index is into the Multicast Group Table, which is the comprised the MGHT and AMGM tables.
- next_gid_index=0 means end of the chain. */
-/* -------------- */
- pseudo_bit_t reserved1[0x00060];
-/* -------------- */
- pseudo_bit_t mgid_128_96[0x00020]; /* Multicast group GID[128:96] in big endian format.
- Use the Reserved GID 0:0:0:0:0:0:0:0 for an invalid entry. */
-/* -------------- */
- pseudo_bit_t mgid_95_64[0x00020]; /* Multicast group GID[95:64] in big endian format.
- Use the Reserved GID 0:0:0:0:0:0:0:0 for an invalid entry. */
-/* -------------- */
- pseudo_bit_t mgid_63_32[0x00020]; /* Multicast group GID[63:32] in big endian format.
- Use the Reserved GID 0:0:0:0:0:0:0:0 for an invalid entry. */
-/* -------------- */
- pseudo_bit_t mgid_31_0[0x00020]; /* Multicast group GID[31:0] in big endian format.
- Use the Reserved GID 0:0:0:0:0:0:0:0 for an invalid entry. */
-/* -------------- */
- struct tavorprm_mgmqp_st mgmqp_0; /* Multicast Group Member QP */
-/* -------------- */
- struct tavorprm_mgmqp_st mgmqp_1; /* Multicast Group Member QP */
-/* -------------- */
- struct tavorprm_mgmqp_st mgmqp_2; /* Multicast Group Member QP */
-/* -------------- */
- struct tavorprm_mgmqp_st mgmqp_3; /* Multicast Group Member QP */
-/* -------------- */
- struct tavorprm_mgmqp_st mgmqp_4; /* Multicast Group Member QP */
-/* -------------- */
- struct tavorprm_mgmqp_st mgmqp_5; /* Multicast Group Member QP */
-/* -------------- */
- struct tavorprm_mgmqp_st mgmqp_6; /* Multicast Group Member QP */
-/* -------------- */
- struct tavorprm_mgmqp_st mgmqp_7; /* Multicast Group Member QP */
-/* -------------- */
-};
-
-/* INIT_IB Parameters */
-
-struct tavorprm_init_ib_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00004];
- pseudo_bit_t vl_cap[0x00004]; /* Maximum VLs supported on the port, excluding VL15.
- Legal values are 1,2,4 and 8. */
- pseudo_bit_t port_width_cap[0x00004];/* IB Port Width
- 1 - 1x
- 3 - 1x, 4x
- 11 - 1x, 4x or 12x (must not be used in InfiniHost MT23108)
- else - Reserved */
- pseudo_bit_t mtu_cap[0x00004]; /* Maximum MTU Supported
- 0x0 - Reserved
- 0x1 - 256
- 0x2 - 512
- 0x3 - 1024
- 0x4 - 2048
- 0x5 - 0xF Reserved */
- pseudo_bit_t g0[0x00001]; /* Set port GUID0 to GUID0 specified */
- pseudo_bit_t ng[0x00001]; /* Set node GUID to node_guid specified.
- node_guid and ng must be the same for all ports. */
- pseudo_bit_t sig[0x00001]; /* Set System Image GUID to system_image_guid specified.
- system_image_guid and sig must be the same for all ports. */
- pseudo_bit_t reserved1[0x0000d];
-/* -------------- */
- pseudo_bit_t max_gid[0x00010]; /* Maximum number of GIDs for the port */
- pseudo_bit_t reserved2[0x00010];
-/* -------------- */
- pseudo_bit_t max_pkey[0x00010]; /* Maximum pkeys for the port.
- Must be the same for both ports. */
- pseudo_bit_t reserved3[0x00010];
-/* -------------- */
- pseudo_bit_t reserved4[0x00020];
-/* -------------- */
- pseudo_bit_t guid0_h[0x00020]; /* EUI-64 GUID assigned by the manufacturer, takes effect only if the G0 bit is set (bits 63:32) */
-/* -------------- */
- pseudo_bit_t guid0_l[0x00020]; /* EUI-64 GUID assigned by the manufacturer, takes effect only if the G0 bit is set (bits 31:0) */
-/* -------------- */
- pseudo_bit_t node_guid_h[0x00020]; /* Node GUID[63:32], takes effect only if the NG bit is set
- Must be the same for both ports. */
-/* -------------- */
- pseudo_bit_t node_guid_l[0x00020]; /* Node GUID[31:0], takes effect only if the NG bit is set
- Must be the same for both ports. */
-/* -------------- */
- pseudo_bit_t system_image_guid_h[0x00020];/* System Image GUID[63:32], takes effect only if the SIG bit is set
- Must be the same for both ports. */
-/* -------------- */
- pseudo_bit_t system_image_guid_l[0x00020];/* System Image GUID[31:0], takes effect only if the SIG bit is set
- Must be the same for both ports. */
-/* -------------- */
- pseudo_bit_t reserved5[0x006c0];
-/* -------------- */
-};
-
-/* Query Device Limitations */
-
-struct tavorprm_query_dev_lim_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00080];
-/* -------------- */
- pseudo_bit_t log_max_qp[0x00005]; /* Log2 of the Maximum number of QPs supported */
- pseudo_bit_t reserved1[0x00003];
- pseudo_bit_t log2_rsvd_qps[0x00004];/* Log (base 2) of the number of QPs reserved for firmware use
- The reserved resources are numbered from 0 to 2^log2_rsvd_qps-1 */
- pseudo_bit_t reserved2[0x00004];
- pseudo_bit_t log_max_qp_sz[0x00008];/* The maximum number of WQEs allowed on the RQ or the SQ is 2^log_max_qp_sz-1 */
- pseudo_bit_t log_max_srq_sz[0x00008];/* The maximum number of WQEs allowed on the SRQ is 2^log_max_srq_sz-1 */
-/* -------------- */
- pseudo_bit_t log_max_ee[0x00005]; /* Log2 of the Maximum number of EE contexts supported */
- pseudo_bit_t reserved3[0x00003];
- pseudo_bit_t log2_rsvd_ees[0x00004];/* Log (base 2) of the number of EECs reserved for firmware use
- The reserved resources are numbered from 0 to 2^log2_rsvd_ees-1 */
- pseudo_bit_t reserved4[0x00004];
- pseudo_bit_t log_max_srqs[0x00005]; /* Log base 2 of the maximum number of SRQs supported, valid only if SRQ bit is set.
- */
- pseudo_bit_t reserved5[0x00007];
- pseudo_bit_t log2_rsvd_srqs[0x00004];/* Log (base 2) of the number of reserved SRQs for firmware use
- The reserved resources are numbered from 0 to 2^log2_rsvd_srqs-1
- This parameter is valid only if the SRQ bit is set. */
-/* -------------- */
- pseudo_bit_t log_max_cq[0x00005]; /* Log2 of the Maximum number of CQs supported */
- pseudo_bit_t reserved6[0x00003];
- pseudo_bit_t log2_rsvd_cqs[0x00004];/* Log (base 2) of the number of CQs reserved for firmware use
- The reserved resources are numbered from 0 to 2^log2_rsrvd_cqs-1 */
- pseudo_bit_t reserved7[0x00004];
- pseudo_bit_t log_max_cq_sz[0x00008];/* Log2 of the Maximum CQEs allowed in a CQ */
- pseudo_bit_t reserved8[0x00008];
-/* -------------- */
- pseudo_bit_t log_max_eq[0x00003]; /* Log2 of the Maximum number of EQs */
- pseudo_bit_t reserved9[0x00005];
- pseudo_bit_t num_rsvd_eqs[0x00004]; /* The number of EQs reserved for firmware use
- The reserved resources are numbered from 0 to num_rsvd_eqs-1
- If 0 - no resources are reserved. */
- pseudo_bit_t reserved10[0x00004];
- pseudo_bit_t log_max_mpts[0x00006]; /* Log (base 2) of the maximum number of MPT entries (the number of Regions/Windows) */
- pseudo_bit_t reserved11[0x0000a];
-/* -------------- */
- pseudo_bit_t log_max_mtt_seg[0x00006];/* Log2 of the Maximum number of MTT segments */
- pseudo_bit_t reserved12[0x00002];
- pseudo_bit_t log2_rsvd_mrws[0x00004];/* Log (base 2) of the number of MPTs reserved for firmware use
- The reserved resources are numbered from 0 to 2^log2_rsvd_mrws-1 */
- pseudo_bit_t reserved13[0x00004];
- pseudo_bit_t log_max_mrw_sz[0x00008];/* Log2 of the Maximum Size of Memory Region/Window */
- pseudo_bit_t reserved14[0x00004];
- pseudo_bit_t log2_rsvd_mtts[0x00004];/* Log (base 2) of the number of MTT segments reserved for firmware use
- The reserved resources are numbered from 0 to 2^log2_rsvd_mtts-1
- */
-/* -------------- */
- pseudo_bit_t log_max_av[0x00006]; /* Log2 of the Maximum number of Address Vectors */
- pseudo_bit_t reserved15[0x0001a];
-/* -------------- */
- pseudo_bit_t log_max_ra_res_qp[0x00006];/* Log2 of the Maximum number of outstanding RDMA read/Atomic per QP as a responder */
- pseudo_bit_t reserved16[0x0000a];
- pseudo_bit_t log_max_ra_req_qp[0x00006];/* Log2 of the maximum number of outstanding RDMA read/Atomic per QP as a requester */
- pseudo_bit_t reserved17[0x0000a];
-/* -------------- */
- pseudo_bit_t log_max_ra_res_global[0x00006];/* Log2 of the maximum number of RDMA read/atomic operations the HCA responder can support globally. That implies the RDB table size. */
- pseudo_bit_t reserved18[0x0001a];
-/* -------------- */
- pseudo_bit_t reserved19[0x00020];
-/* -------------- */
- pseudo_bit_t num_ports[0x00004]; /* Number of IB ports. */
- pseudo_bit_t max_vl[0x00004]; /* Maximum VLs supported on each port, excluding VL15 */
- pseudo_bit_t max_port_width[0x00004];/* IB Port Width
- 1 - 1x
- 3 - 1x, 4x
- 11 - 1x, 4x or 12x
- else - Reserved */
- pseudo_bit_t max_mtu[0x00004]; /* Maximum MTU Supported
- 0x0 - Reserved
- 0x1 - 256
- 0x2 - 512
- 0x3 - 1024
- 0x4 - 2048
- 0x5 - 0xF Reserved */
- pseudo_bit_t local_ca_ack_delay[0x00005];/* The Local CA ACK Delay. This is the value recommended to be returned in Query HCA verb.
- The delay value in microseconds is computed using 4.096us * 2^(Local_CA_ACK_Delay). */
- pseudo_bit_t reserved20[0x0000b];
-/* -------------- */
- pseudo_bit_t log_max_gid[0x00004]; /* Log2 of the maximum number of GIDs per port */
- pseudo_bit_t reserved21[0x0001c];
-/* -------------- */
- pseudo_bit_t log_max_pkey[0x00004]; /* Log2 of the max PKey Table Size (per IB port) */
- pseudo_bit_t reserved22[0x0001c];
-/* -------------- */
- pseudo_bit_t reserved23[0x00020];
-/* -------------- */
- pseudo_bit_t rc[0x00001]; /* RC Transport supported */
- pseudo_bit_t uc[0x00001]; /* UC Transport Supported */
- pseudo_bit_t ud[0x00001]; /* UD Transport Supported */
- pseudo_bit_t rd[0x00001]; /* RD Transport Supported
- RD is not supported in InfiniHost MT23108 */
- pseudo_bit_t raw_ipv6[0x00001]; /* Raw IPv6 Transport Supported */
- pseudo_bit_t raw_ether[0x00001]; /* Raw Ethertype Transport Supported */
- pseudo_bit_t srq[0x00001]; /* SRQ is supported
- */
- pseudo_bit_t reserved24[0x00001];
- pseudo_bit_t pkv[0x00001]; /* PKey Violation Counter Supported */
- pseudo_bit_t qkv[0x00001]; /* QKey Violation Coutner Supported */
- pseudo_bit_t reserved25[0x00006];
- pseudo_bit_t mw[0x00001]; /* Memory windows supported */
- pseudo_bit_t apm[0x00001]; /* Automatic Path Migration Supported */
- pseudo_bit_t atm[0x00001]; /* Atomic operations supported (atomicity is guaranteed between QPs on this HCA) */
- pseudo_bit_t rm[0x00001]; /* Raw Multicast Supported */
- pseudo_bit_t avp[0x00001]; /* Address Vector Port checking supported */
- pseudo_bit_t udm[0x00001]; /* UD Multicast Supported */
- pseudo_bit_t reserved26[0x00002];
- pseudo_bit_t pg[0x00001]; /* Paging on demand supported */
- pseudo_bit_t r[0x00001]; /* Router mode supported */
- pseudo_bit_t reserved27[0x00006];
-/* -------------- */
- pseudo_bit_t log_pg_sz[0x00008]; /* Minimum system page size supported (log2) .
- For proper operation it must be less than or equal the hosting platform (CPU) minimum page size. */
- pseudo_bit_t reserved28[0x00008];
- pseudo_bit_t uar_sz[0x00006]; /* UAR Area Size = 1MB * 2^uar_sz */
- pseudo_bit_t reserved29[0x00006];
- pseudo_bit_t num_rsvd_uars[0x00004];/* The number of UARs reserved for firmware use
- The reserved resources are numbered from 0 to num_reserved_uars-1
- Note that UAR 1 is always for the kernel
- If 0 - no resources are reserved. */
-/* -------------- */
- pseudo_bit_t reserved30[0x00020];
-/* -------------- */
- pseudo_bit_t max_desc_sz[0x00010]; /* Max descriptor size in bytes */
- pseudo_bit_t max_sg[0x00008]; /* The maximum S/G list elements in a WQE (max_desc_sz/16 - 3) */
- pseudo_bit_t reserved31[0x00008];
-/* -------------- */
- pseudo_bit_t reserved32[0x00060];
-/* -------------- */
- pseudo_bit_t log_max_mcg[0x00008]; /* Log2 of the maximum number of multicast groups */
- pseudo_bit_t num_rsvd_mcgs[0x00004];/* The number of MGMs reserved for firmware use in the MGHT.
- The reserved resources are numbered from 0 to num_reserved_mcgs-1
- If 0 - no resources are reserved. */
- pseudo_bit_t reserved33[0x00004];
- pseudo_bit_t log_max_qp_mcg[0x00008];/* Log2 of the maximum number of QPs per multicast group */
- pseudo_bit_t reserved34[0x00008];
-/* -------------- */
- pseudo_bit_t log_max_rdds[0x00006]; /* Log2 of the maximum number of RDDs */
- pseudo_bit_t reserved35[0x00006];
- pseudo_bit_t num_rsvd_rdds[0x00004];/* The number of RDDs reserved for firmware use
- The reserved resources are numbered from 0 to num_reserved_rdds-1.
- If 0 - no resources are reserved. */
- pseudo_bit_t log_max_pd[0x00006]; /* Log2 of the maximum number of PDs */
- pseudo_bit_t reserved36[0x00006];
- pseudo_bit_t num_rsvd_pds[0x00004]; /* The number of PDs reserved for firmware use
- The reserved resources are numbered from 0 to num_reserved_pds-1
- If 0 - no resources are reserved. */
-/* -------------- */
- pseudo_bit_t reserved37[0x000c0];
-/* -------------- */
- pseudo_bit_t qpc_entry_sz[0x00010]; /* QPC Entry Size for the device
- For the InfiniHost MT23108 entry size is 256 bytes */
- pseudo_bit_t eec_entry_sz[0x00010]; /* EEC Entry Size for the device
- For the InfiniHost MT23108 entry size is 256 bytes */
-/* -------------- */
- pseudo_bit_t eqpc_entry_sz[0x00010];/* Extended QPC entry size for the device
- For the InfiniHost MT23108 entry size is 32 bytes */
- pseudo_bit_t eeec_entry_sz[0x00010];/* Extended EEC entry size for the device
- For the InfiniHost MT23108 entry size is 32 bytes */
-/* -------------- */
- pseudo_bit_t cqc_entry_sz[0x00010]; /* CQC entry size for the device
- For the InfiniHost MT23108 entry size is 64 bytes */
- pseudo_bit_t eqc_entry_sz[0x00010]; /* EQ context entry size for the device
- For the InfiniHost MT23108 entry size is 64 bytes */
-/* -------------- */
- pseudo_bit_t uar_scratch_entry_sz[0x00010];/* UAR Scratchpad Entry Size
- For the InfiniHost MT23108 entry size is 32 bytes */
- pseudo_bit_t srq_entry_sz[0x00010]; /* SRQ context entry size for the device
- For the InfiniHost MT23108 entry size is 32 bytes */
-/* -------------- */
- pseudo_bit_t reserved38[0x00380];
-/* -------------- */
-};
-
-/* QUERY_ADAPTER Parameters Block */
-
-struct tavorprm_query_adapter_st { /* Little Endian */
- pseudo_bit_t vendor_id[0x00020]; /* Adapter vendor ID */
-/* -------------- */
- pseudo_bit_t device_id[0x00020]; /* Adapter Device ID */
-/* -------------- */
- pseudo_bit_t revision_id[0x00020]; /* Adapter Revision ID */
-/* -------------- */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
- pseudo_bit_t reserved1[0x00018];
- pseudo_bit_t intapin[0x00008]; /* Interrupt Signal ID of HCA device pin that is connected to the INTA trace in the HCA board.
- 0..39 and 63 are valid values
- 255 means INTA trace in board is not connected to the HCA device.
- All other values are reserved */
-/* -------------- */
- pseudo_bit_t mode_pci[0x00001]; /* Set when the device is operating in conventional PCI mode (as opposed to PCI-X/PCI-Express). */
- pseudo_bit_t mode_32bit[0x00001]; /* Set when the device is operating in 32 bit mode (the sampled bus width is 32 bit). */
- pseudo_bit_t reserved2[0x0001e];
-/* -------------- */
- pseudo_bit_t reserved3[0x00040];
-/* -------------- */
- struct tavorprm_vsd_st vsd;
-/* -------------- */
-};
-
-/* QUERY_FW Parameters Block */
-
-struct tavorprm_query_fw_st { /* Little Endian */
- pseudo_bit_t fw_rev_major[0x00010]; /* Firmware Revision - Major */
- pseudo_bit_t reserved0[0x00010];
-/* -------------- */
- pseudo_bit_t fw_rev_minor[0x00010]; /* Firmware Revision - Minor */
- pseudo_bit_t fw_rev_subminor[0x00010];/* Firmware Sub-minor version (Patch level). */
-/* -------------- */
- pseudo_bit_t cmd_interface_rev[0x00010];/* Command Interface Interpreter Revision ID */
- pseudo_bit_t reserved1[0x00010];
-/* -------------- */
- pseudo_bit_t log_max_outstanding_cmd[0x00008];/* Log2 of the maximum number of commands the HCR can support simultaneously */
- pseudo_bit_t reserved2[0x00017];
- pseudo_bit_t dt[0x00001]; /* Debug Trace Support
- 0 - Debug trace is not supported
- 1 - Debug trace is supported */
-/* -------------- */
- pseudo_bit_t cmd_interface_db[0x00001];/* Set if the device accepts commands by means of special doorbells. */
- pseudo_bit_t reserved3[0x0001f];
-/* -------------- */
- pseudo_bit_t reserved4[0x00060];
-/* -------------- */
- pseudo_bit_t fw_base_addr_h[0x00020];/* Physical Address of Firmware Area in DDR Memory [63:32] */
-/* -------------- */
- pseudo_bit_t fw_base_addr_l[0x00020];/* Physical Address of Firmware Area in DDR Memory [31:0] */
-/* -------------- */
- pseudo_bit_t fw_end_addr_h[0x00020];/* End of firmware address in DDR memory [63:32] */
-/* -------------- */
- pseudo_bit_t fw_end_addr_l[0x00020];/* End of firmware address in DDR memory [31:0] */
-/* -------------- */
- pseudo_bit_t error_buf_start_h[0x00020];/* Read Only buffer for catastrofic error reports. */
-/* -------------- */
- pseudo_bit_t error_buf_start_l[0x00020];
-/* -------------- */
- pseudo_bit_t error_buf_size[0x00020];/* Size in words */
-/* -------------- */
- pseudo_bit_t reserved5[0x000a0];
-/* -------------- */
- pseudo_bit_t cmd_db_dw1[0x00010]; /* offset in bytes from cmd_db_addr_base where DWord 1 of a Command Interface Doorbell should be written. Valid only if CmdInterfaceDb bit is '1' */
- pseudo_bit_t cmd_db_dw0[0x00010]; /* offset in bytes from cmd_db_addr_base where DWord 0 of a Command Interface Doorbell should be written. Valid only if CmdInterfaceDb bit is '1' */
-/* -------------- */
- pseudo_bit_t cmd_db_dw3[0x00010]; /* offset in bytes from cmd_db_addr_base where DWord 3 of a Command Interface Doorbell should be written. Valid only if CmdInterfaceDb bit is '1' */
- pseudo_bit_t cmd_db_dw2[0x00010]; /* offset in bytes from cmd_db_addr_base where DWord 2 of a Command Interface Doorbell should be written. Valid only if CmdInterfaceDb bit is '1' */
-/* -------------- */
- pseudo_bit_t cmd_db_dw5[0x00010]; /* offset in bytes from cmd_db_addr_base where DWord 5 of a Command Interface Doorbell should be written. Valid only if CmdInterfaceDb bit is '1' */
- pseudo_bit_t cmd_db_dw4[0x00010]; /* offset in bytes from cmd_db_addr_base where DWord 4 of a Command Interface Doorbell should be written. Valid only if CmdInterfaceDb bit is '1' */
-/* -------------- */
- pseudo_bit_t cmd_db_dw7[0x00010]; /* offset in bytes from cmd_db_addr_base where DWord 7 of a Command Interface Doorbell should be written. Valid only if CmdInterfaceDb bit is '1' */
- pseudo_bit_t cmd_db_dw6[0x00010]; /* offset in bytes from cmd_db_addr_base where DWord 6 of a Command Interface Doorbell should be written. Valid only if CmdInterfaceDb bit is '1' */
-/* -------------- */
- pseudo_bit_t cmd_db_addr_base_h[0x00020];/* High bits of cmd_db_addr_base, which cmd_db_dw offsets refer to. Valid only if CmdInterfaceDb bit is '1' */
-/* -------------- */
- pseudo_bit_t cmd_db_addr_base_l[0x00020];/* Low bits of cmd_db_addr_base, which cmd_db_dw offsets refer to. Valid only if CmdInterfaceDb bit is '1' */
-/* -------------- */
- pseudo_bit_t reserved6[0x004c0];
-/* -------------- */
-};
-
-/* ACCESS_DDR */
-
-struct tavorprm_access_ddr_st { /* Little Endian */
- struct tavorprm_access_ddr_inject_errors_st access_ddr_inject_errors;
-/* -------------- */
- pseudo_bit_t reserved0[0x00080];
-/* -------------- */
-};
-
-/* QUERY_DDR Parameters Block */
-
-struct tavorprm_query_ddr_st { /* Little Endian */
- pseudo_bit_t ddr_start_adr_h[0x00020];/* DDR memory start address [63:32] */
-/* -------------- */
- pseudo_bit_t ddr_start_adr_l[0x00020];/* DDR memory start address [31:0] */
-/* -------------- */
- pseudo_bit_t ddr_end_adr_h[0x00020];/* DDR memory end address [63:32] */
-/* -------------- */
- pseudo_bit_t ddr_end_adr_l[0x00020];/* DDR memory end address [31:0] */
-/* -------------- */
- pseudo_bit_t di[0x00002]; /* Data Integrity Configuration:
- 00 - none
- 01 - Parity
- 10 - ECC Detection Only
- 11 - ECC With Correction */
- pseudo_bit_t ap[0x00002]; /* Auto Precharge Mode
- 00 - No auto precharge
- 01 - Auto precharge per transaction
- 10 - Auto precharge per 64 bytes
- 11 - reserved */
- pseudo_bit_t dh[0x00001]; /* When set, DDR is Hidden and can not be accessed from the PCI bus. */
- pseudo_bit_t reserved0[0x0001b];
-/* -------------- */
- pseudo_bit_t reserved1[0x00160];
-/* -------------- */
- struct tavorprm_dimminfo_st dimm0; /* Logical DIMM 0 Parameters */
-/* -------------- */
- struct tavorprm_dimminfo_st dimm1; /* Logical DIMM 1 Parameters */
-/* -------------- */
- struct tavorprm_dimminfo_st dimm2; /* Logical DIMM 2 Parameters */
-/* -------------- */
- struct tavorprm_dimminfo_st dimm3; /* Logical DIMM 3 Parameters */
-/* -------------- */
- pseudo_bit_t reserved2[0x00200];
-/* -------------- */
-};
-
-/* INIT_HCA & QUERY_HCA Parameters Block */
-
-struct tavorprm_init_hca_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00060];
-/* -------------- */
- pseudo_bit_t reserved1[0x00018];
- pseudo_bit_t hca_core_clock[0x00008];/* Internal Clock Period (in units of 1/16 ns) (QUERY_HCA only) */
-/* -------------- */
- pseudo_bit_t reserved2[0x00008];
- pseudo_bit_t router_qp[0x00010]; /* Upper 16 bit to be used as a QP number for router mode. Low order 8 bits are taken from the TClass field of the incoming packet.
- Valid only if RE bit is set */
- pseudo_bit_t reserved3[0x00007];
- pseudo_bit_t re[0x00001]; /* Router Mode Enable
- If this bit is set, entire packet (including all headers and ICRC) will be considered as a data payload and will be scattered to memory as specified in the descriptor that is posted on the QP matching the TClass field of packet. */
-/* -------------- */
- pseudo_bit_t udp[0x00001]; /* UD Port Check Enable
- 0 - Port field in Address Vector is ignored
- 1 - HCA will check the port field in AV entry (fetched for UD descriptor) against the Port of the UD QP executing the descriptor. */
- pseudo_bit_t he[0x00001]; /* Host Endianess - Used for Atomic Operations
- 0 - Host is Little Endian
- 1 - Host is Big endian
- */
- pseudo_bit_t ud[0x00001]; /* Force UD address vector protection check. If this bit is set, Passing address vector as immediate data in WQE is suppressed and privileged memory key will be used by hardware to access UD address vector table. */
- pseudo_bit_t reserved4[0x00005];
- pseudo_bit_t responder_exu[0x00004];/* How many execution engines are dedicated to the responder. Legal values are 0x0-0xF. 0 is "auto" */
- pseudo_bit_t reserved5[0x00004];
- pseudo_bit_t wqe_quota[0x0000f]; /* Maximum number of WQEs that are executed prior to preemption of execution unit. 0 - reserved. */
- pseudo_bit_t wqe_quota_en[0x00001]; /* If set - wqe_quota field is used. If cleared - WQE quota is set to "auto" value */
-/* -------------- */
- pseudo_bit_t reserved6[0x00040];
-/* -------------- */
- struct tavorprm_qpcbaseaddr_st qpc_eec_cqc_eqc_rdb_parameters;
-/* -------------- */
- pseudo_bit_t reserved7[0x00080];
-/* -------------- */
- struct tavorprm_udavtable_memory_parameters_st udavtable_memory_parameters;/* Memory Access Parameters for UD Address Vector Table. Used for QPs/EEc that are configured to use protected Address Vectors. */
-/* -------------- */
- pseudo_bit_t reserved8[0x00040];
-/* -------------- */
- struct tavorprm_multicastparam_st multicast_parameters;
-/* -------------- */
- pseudo_bit_t reserved9[0x00080];
-/* -------------- */
- struct tavorprm_tptparams_st tpt_parameters;
-/* -------------- */
- pseudo_bit_t reserved10[0x00080];
-/* -------------- */
- struct tavorprm_uar_params_st uar_parameters;/* UAR Parameters */
-/* -------------- */
- pseudo_bit_t reserved11[0x00600];
-/* -------------- */
-};
-
-/* Event Queue Context Table Entry */
-
-struct tavorprm_eqc_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t st[0x00002]; /* Event delivery state machine
- 01 - Armed
- 10 - Fired
- 11 - Always_Armed (auto-rearm)
- 00 - Reserved */
- pseudo_bit_t reserved1[0x00007];
- pseudo_bit_t oi[0x00001]; /* Ignore overrun on this EQ if this bit is set */
- pseudo_bit_t tr[0x00001]; /* Translation Required. If set - EQ access undergo address translation. */
- pseudo_bit_t reserved2[0x00005];
- pseudo_bit_t owner[0x00004]; /* 0 - SW ownership
- 1 - HW ownership
- Valid for the QUERY_EQ and HW2SW_EQ commands only */
- pseudo_bit_t status[0x00004]; /* EQ status:
- 0000 - OK
- 1001 - EQ overflow
- 1010 - EQ write failure
- Valid for the QUERY_EQ and HW2SW_EQ commands only */
-/* -------------- */
- pseudo_bit_t start_address_h[0x00020];/* Start Address of Event Queue[63:32].
- Must be aligned on 32-byte boundary */
-/* -------------- */
- pseudo_bit_t start_address_l[0x00020];/* Start Address of Event Queue[31:0].
- Must be aligned on 32-byte boundary */
-/* -------------- */
- pseudo_bit_t usr_page[0x00018];
- pseudo_bit_t log_eq_size[0x00005]; /* Amount of entries in this EQ is 2^log_eq_size.
- Log_eq_size must be bigger than 1 */
- pseudo_bit_t reserved3[0x00003];
-/* -------------- */
- pseudo_bit_t pd[0x00018]; /* PD to be used to access EQ */
- pseudo_bit_t reserved4[0x00008];
-/* -------------- */
- pseudo_bit_t intr[0x00008]; /* Interrupt (message) to be generated to report event to INT layer.
- 00iiiiii - specifies GPIO pin to be asserted (according to INTA given in QUERY_ADAPTER)
- 10jjjjjj - specificies type of interrupt message to be generated (total 64 different messages supported).
-
- If interrupt generation is not required one of the two following options should be set:
- 1. ST must be set on creation to Fired state and not EQ arming doorbell should be performed. In this case hardware will not generate any interrupt.
- 2. intr should be set to 60 decimal
- */
- pseudo_bit_t reserved5[0x00018];
-/* -------------- */
- pseudo_bit_t lost_count[0x00020]; /* Number of events lost due to EQ overrun */
-/* -------------- */
- pseudo_bit_t lkey[0x00020]; /* Memory key (L-Key) to be used to access EQ */
-/* -------------- */
- pseudo_bit_t reserved6[0x00040];
-/* -------------- */
- pseudo_bit_t consumer_indx[0x00020];/* Contains next entry to be read upon polling the event queue.
- Must be initalized to '0 while opening EQ */
-/* -------------- */
- pseudo_bit_t producer_indx[0x00020];/* Contains next entry in EQ to be written by the HCA.
- Must be initalized to '0 while opening EQ. */
-/* -------------- */
- pseudo_bit_t reserved7[0x00080];
-/* -------------- */
-};
-
-/* Memory Translation Table (MTT) Entry */
-
-struct tavorprm_mtt_st { /* Little Endian */
- pseudo_bit_t ptag_h[0x00020]; /* High-order bits of physical tag. The size of the field depends on the page size of the region. Maximum PTAG size is 52 bits. */
-/* -------------- */
- pseudo_bit_t p[0x00001]; /* Present bit. If set, page entry is valid. If cleared, access to this page will generate 'non-present page access fault'. */
- pseudo_bit_t reserved0[0x0000b];
- pseudo_bit_t ptag_l[0x00014]; /* Low-order bits of Physical tag. The size of the field depends on the page size of the region. Maximum PTAG size is 52 bits. */
-/* -------------- */
-};
-
-/* Memory Protection Table (MPT) Entry */
-
-struct tavorprm_mpt_st { /* Little Endian */
- pseudo_bit_t ver[0x00004]; /* Version. Must be zero for InfiniHost */
- pseudo_bit_t reserved0[0x00004];
- pseudo_bit_t r_w[0x00001]; /* Defines whether this entry is Region (1) or Window (0) */
- pseudo_bit_t pa[0x00001]; /* Physical address. If set, no virtual-to-physical address translation will be performed for this region */
- pseudo_bit_t lr[0x00001]; /* If set - local read access enabled */
- pseudo_bit_t lw[0x00001]; /* If set - local write access enabled */
- pseudo_bit_t rr[0x00001]; /* If set - Remote read access enabled. */
- pseudo_bit_t rw[0x00001]; /* If set - remote write access enabled */
- pseudo_bit_t a[0x00001]; /* If set - Remote Atomic access is enabled */
- pseudo_bit_t eb[0x00001]; /* If set - Bind is enabled. Valid for region entry only. */
- pseudo_bit_t reserved1[0x00001];
- pseudo_bit_t m_io[0x00001]; /* Memory / I/O
- 1 - Memory commands used on the uplink bus
- 0 - I/O commands used on the uplink bus
- Must be 1 for the InfiniHost MT23108. */
- pseudo_bit_t reserved2[0x0000a];
- pseudo_bit_t status[0x00004]; /* Regios/Window Status
- 0xF - not valid (SW ownership)
- else - HW ownership
- Note that an unbound Window is denoted by the reg_wnd_len field equals zero. */
-/* -------------- */
- pseudo_bit_t page_size[0x00005]; /* Page size used for the region. Actual size is [4K]*2^Page_size bytes.
- page_size should be less than 20. */
- pseudo_bit_t reserved3[0x00002];
- pseudo_bit_t reserved4[0x00001];
- pseudo_bit_t reserved5[0x00018];
-/* -------------- */
- pseudo_bit_t mem_key[0x00020]; /* The memory Key. This field is compared to key used to access the region/window. Lower-order bits are restricted (index to the table). */
-/* -------------- */
- pseudo_bit_t pd[0x00018]; /* Protection Domain */
- pseudo_bit_t reserved6[0x00001];
- pseudo_bit_t reserved7[0x00001];
- pseudo_bit_t reserved8[0x00001];
- pseudo_bit_t reserved9[0x00001];
- pseudo_bit_t reserved10[0x00001];
- pseudo_bit_t reserved11[0x00003];
-/* -------------- */
- pseudo_bit_t start_address_h[0x00020];/* Start Address[63:32] - Virtual Address where this region/window starts */
-/* -------------- */
- pseudo_bit_t start_address_l[0x00020];/* Start Address[31:0] - Virtual Address where this region/window starts */
-/* -------------- */
- pseudo_bit_t reg_wnd_len_h[0x00020];/* Region/Window Length[63:32] */
-/* -------------- */
- pseudo_bit_t reg_wnd_len_l[0x00020];/* Region/Window Length[31:0] */
-/* -------------- */
- pseudo_bit_t lkey[0x00020]; /* Must be 0 for SW2HW_MPT.
- On QUERY_MPT and HW2SW_MPT commands for Memory Window it reflects the LKey of the Region that the Window is bound to. */
-/* -------------- */
- pseudo_bit_t win_cnt[0x00020]; /* Number of windows bound to this region. Valid for regions only.
- The field is valid only for the QUERY_MPT and HW2SW_MPT commands. */
-/* -------------- */
- pseudo_bit_t win_cnt_limit[0x00020];/* The number of windows (limit) that can be bound to this region. If a bind operation is attempted when WIN_CNT == WIN_CNT_LIMIT, the operation will be aborted, a CQE with error will be generated, and the QP will be moved into the error state.
- Zero means no limit.
- Note that for best hardware performance, win_cnt_limit should be set to zero. */
-/* -------------- */
- pseudo_bit_t mtt_seg_adr_h[0x00020];/* Base (first) address of the MTT segment, aligned on segment_size boundary (bits 63:31). */
-/* -------------- */
- pseudo_bit_t reserved12[0x00006];
- pseudo_bit_t mtt_seg_adr_l[0x0001a];/* Base (first) address of the MTT segment, aligned on segment_size boundary (bits 31:6). */
-/* -------------- */
- pseudo_bit_t reserved13[0x00060];
-/* -------------- */
-};
-
-/* Completion Queue Context Table Entry */
-
-struct tavorprm_completion_queue_context_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t st[0x00004]; /* Event delivery state machine
- 0x0 - DISARMED
- 0x1 - ARMED (Request for Notification)
- 0x4 - ARMED SOLICITED (Request Solicited Notification)
- 0xA - FIRED
- other - reserved */
- pseudo_bit_t reserved1[0x00005];
- pseudo_bit_t oi[0x00001]; /* Ignore overrun of this CQ if this bit is set */
- pseudo_bit_t tr[0x00001]; /* Translation Required
- 1 - accesses to CQ will undergo address translation
- 0 - accesses to CQ will not undergo address translation */
- pseudo_bit_t reserved2[0x00009];
- pseudo_bit_t status[0x00004]; /* CQ status
- 0000 - OK
- 1001 - CQ overflow
- 1010 - CQ write failure
- Valid for the QUERY_CQ and HW2SW_CQ commands only */
-/* -------------- */
- pseudo_bit_t start_address_h[0x00020];/* Start address of CQ[63:32].
- Must be aligned on CQE size (32 bytes) */
-/* -------------- */
- pseudo_bit_t start_address_l[0x00020];/* Start address of CQ[31:0].
- Must be aligned on CQE size (32 bytes) */
-/* -------------- */
- pseudo_bit_t usr_page[0x00018]; /* UAR page this CQ can be accessed through (ringinig CQ doorbells) */
- pseudo_bit_t log_cq_size[0x00005]; /* Log (base 2) of the CQ size (in entries).
- Maximum CQ size is 128K CQEs (max log_cq_size is 17) */
- pseudo_bit_t reserved3[0x00003];
-/* -------------- */
- pseudo_bit_t e_eqn[0x00008]; /* Event Queue this CQ reports errors to (e.g. CQ overflow)
- Valid values are 0 to 63
- If configured to value other than 0-63, error events will not be reported on the CQ. */
- pseudo_bit_t reserved4[0x00018];
-/* -------------- */
- pseudo_bit_t c_eqn[0x00008]; /* Event Queue this CQ reports completion events to.
- Valid values are 0 to 63
- If configured to value other than 0-63, completion events will not be reported on the CQ. */
- pseudo_bit_t reserved5[0x00018];
-/* -------------- */
- pseudo_bit_t pd[0x00018]; /* Protection Domain to be used to access CQ.
- Must be the same PD of the CQ L_Key. */
- pseudo_bit_t reserved6[0x00008];
-/* -------------- */
- pseudo_bit_t l_key[0x00020]; /* Memory key (L_Key) to be used to access CQ */
-/* -------------- */
- pseudo_bit_t last_notified_indx[0x00020];/* Maintained by HW.
- Valid for QUERY_CQ and HW2SW_CQ commands only. */
-/* -------------- */
- pseudo_bit_t solicit_producer_indx[0x00020];/* Maintained by HW.
- Valid for QUERY_CQ and HW2SW_CQ commands only.
- */
-/* -------------- */
- pseudo_bit_t consumer_indx[0x00020];/* Contains index to the next entry to be read upon poll for completion. The first completion after passing ownership of CQ from software to hardware will be reported to value passed in this field. Only the low log_cq_size bits may be non-zero. */
-/* -------------- */
- pseudo_bit_t producer_indx[0x00020];/* Points to the next entry to be written to by Hardware. CQ overrun is reported if Producer_indx + 1 equals to Consumer_indx.
- Maintained by HW (valid for the QUERY_CQ and HW2SW_CQ commands only) */
-/* -------------- */
- pseudo_bit_t cqn[0x00018]; /* CQ number. Least significant bits are constrained by the position of this CQ in CQC table
- Valid for the QUERY_CQ and HW2SW_CQ commands only */
- pseudo_bit_t reserved7[0x00008];
-/* -------------- */
- pseudo_bit_t reserved8[0x00060];
-/* -------------- */
-};
-
-/* UD Address Vector */
-
-struct tavorprm_ud_address_vector_st { /* Little Endian */
- pseudo_bit_t pd[0x00018]; /* Protection Domain */
- pseudo_bit_t port_number[0x00002]; /* Port number
- 1 - Port 1
- 2 - Port 2
- other - reserved */
- pseudo_bit_t reserved0[0x00006];
-/* -------------- */
- pseudo_bit_t rlid[0x00010]; /* Remote (Destination) LID */
- pseudo_bit_t my_lid_path_bits[0x00007];/* Source LID - the lower 7 bits (upper bits are taken from PortInfo) */
- pseudo_bit_t g[0x00001]; /* Global address enable - if set, GRH will be formed for packet header */
- pseudo_bit_t reserved1[0x00008];
-/* -------------- */
- pseudo_bit_t hop_limit[0x00008]; /* IPv6 hop limit */
- pseudo_bit_t max_stat_rate[0x00003];/* Maximum static rate control.
- 0 - 4X injection rate
- 1 - 1X injection rate
- other - reserved
- */
- pseudo_bit_t reserved2[0x00001];
- pseudo_bit_t msg[0x00002]; /* Max Message size, size is 256*2^MSG bytes */
- pseudo_bit_t reserved3[0x00002];
- pseudo_bit_t mgid_index[0x00006]; /* Index to port GID table
- mgid_index = (port_number-1) * 2^log_max_gid + gid_index
- Where:
- 1. log_max_gid is taken from QUERY_DEV_LIM command
- 2. gid_index is the index to the GID table */
- pseudo_bit_t reserved4[0x0000a];
-/* -------------- */
- pseudo_bit_t flow_label[0x00014]; /* IPv6 flow label */
- pseudo_bit_t tclass[0x00008]; /* IPv6 TClass */
- pseudo_bit_t sl[0x00004]; /* InfiniBand Service Level (SL) */
-/* -------------- */
- pseudo_bit_t rgid_127_96[0x00020]; /* Remote GID[127:96] */
-/* -------------- */
- pseudo_bit_t rgid_95_64[0x00020]; /* Remote GID[95:64] */
-/* -------------- */
- pseudo_bit_t rgid_63_32[0x00020]; /* Remote GID[63:32] */
-/* -------------- */
- pseudo_bit_t rgid_31_0[0x00020]; /* Remote GID[31:0] */
-/* -------------- */
-};
-
-/* GPIO_event_data */
-
-struct tavorprm_gpio_event_data_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00060];
-/* -------------- */
- pseudo_bit_t gpio_event_hi[0x00020];/* If any bit is set to 1, then a rising/falling event has occurred on the corrsponding GPIO pin. */
-/* -------------- */
- pseudo_bit_t gpio_event_lo[0x00020];/* If any bit is set to 1, then a rising/falling event has occurred on the corrsponding GPIO pin. */
-/* -------------- */
- pseudo_bit_t reserved1[0x00020];
-/* -------------- */
-};
-
-/* Event_data Field - QP/EE Events */
-
-struct tavorprm_qp_ee_event_st { /* Little Endian */
- pseudo_bit_t qpn_een[0x00018]; /* QP/EE/SRQ number event is reported for */
- pseudo_bit_t reserved0[0x00008];
-/* -------------- */
- pseudo_bit_t reserved1[0x00020];
-/* -------------- */
- pseudo_bit_t reserved2[0x0001c];
- pseudo_bit_t e_q[0x00001]; /* If set - EEN if cleared - QP in the QPN/EEN field
- Not valid on SRQ events */
- pseudo_bit_t reserved3[0x00003];
-/* -------------- */
- pseudo_bit_t reserved4[0x00060];
-/* -------------- */
-};
-
-/* InfiniHost Type0 Configuration Header */
-
-struct tavorprm_mt23108_type0_st { /* Little Endian */
- pseudo_bit_t vendor_id[0x00010]; /* Hardwired to 0x15B3 */
- pseudo_bit_t device_id[0x00010]; /* hardwired to 23108 */
-/* -------------- */
- pseudo_bit_t command[0x00010]; /* PCI Command Register */
- pseudo_bit_t status[0x00010]; /* PCI Status Register */
-/* -------------- */
- pseudo_bit_t revision_id[0x00008];
- pseudo_bit_t class_code_hca_class_code[0x00018];
-/* -------------- */
- pseudo_bit_t cache_line_size[0x00008];/* Cache Line Size */
- pseudo_bit_t latency_timer[0x00008];
- pseudo_bit_t header_type[0x00008]; /* hardwired to zero */
- pseudo_bit_t bist[0x00008];
-/* -------------- */
- pseudo_bit_t bar0_ctrl[0x00004]; /* hard-wired to '0100 */
- pseudo_bit_t reserved0[0x00010];
- pseudo_bit_t bar0_l[0x0000c]; /* Lower bits of BAR0 (configuration space) */
-/* -------------- */
- pseudo_bit_t bar0_h[0x00020]; /* Upper 32 bits of BAR0 (configuration space) */
-/* -------------- */
- pseudo_bit_t bar1_ctrl[0x00004]; /* Hardwired to '1100 */
- pseudo_bit_t reserved1[0x00010];
- pseudo_bit_t bar1_l[0x0000c]; /* Lower bits of BAR1 */
-/* -------------- */
- pseudo_bit_t bar1_h[0x00020]; /* upper 32 bits of BAR1 (User Access Revion - UAR - space) */
-/* -------------- */
- pseudo_bit_t bar2_ctrl[0x00004]; /* Hardwired to '1100 */
- pseudo_bit_t reserved2[0x00010];
- pseudo_bit_t bar2_l[0x0000c]; /* Lower bits of BAR2 */
-/* -------------- */
- pseudo_bit_t bar2_h[0x00020]; /* Upper 32 bits of BAR2 - DDR (attached memory) BAR */
-/* -------------- */
- pseudo_bit_t cardbus_cis_pointer[0x00020];
-/* -------------- */
- pseudo_bit_t subsystem_vendor_id[0x00010];/* Specified by the device NVMEM configuration */
- pseudo_bit_t subsystem_id[0x00010]; /* Specified by the device NVMEM configuration */
-/* -------------- */
- pseudo_bit_t expansion_rom_enable[0x00001];/* Expansion ROM Enable. Hardwired to 0 if expansion ROM is disabled in the device NVMEM configuration. */
- pseudo_bit_t reserved3[0x0000a];
- pseudo_bit_t expansion_rom_base_address[0x00015];/* Expansion ROM Base Address (upper 21 bit). Hardwired to 0 if expansion ROM is disabled in the device NVMEM configuration. */
-/* -------------- */
- pseudo_bit_t capabilities_pointer[0x00008];/* Specified by the device NVMEM configuration */
- pseudo_bit_t reserved4[0x00018];
-/* -------------- */
- pseudo_bit_t reserved5[0x00020];
-/* -------------- */
- pseudo_bit_t interrupt_line[0x00008];
- pseudo_bit_t interrupt_pin[0x00008];
- pseudo_bit_t min_gnt[0x00008];
- pseudo_bit_t max_latency[0x00008];
-/* -------------- */
- pseudo_bit_t reserved6[0x00100];
-/* -------------- */
- pseudo_bit_t msi_cap_id[0x00008];
- pseudo_bit_t msi_next_cap_ptr[0x00008];
- pseudo_bit_t msi_en[0x00001];
- pseudo_bit_t multiple_msg_cap[0x00003];
- pseudo_bit_t multiple_msg_en[0x00003];
- pseudo_bit_t cap_64_bit_addr[0x00001];
- pseudo_bit_t reserved7[0x00008];
-/* -------------- */
- pseudo_bit_t msg_addr_l[0x00020];
-/* -------------- */
- pseudo_bit_t msg_addr_h[0x00020];
-/* -------------- */
- pseudo_bit_t msg_data[0x00010];
- pseudo_bit_t reserved8[0x00010];
-/* -------------- */
- pseudo_bit_t pcix_cap_id[0x00008];
- pseudo_bit_t pcix_next_cap_ptr[0x00008];
- pseudo_bit_t pcix_command_reg[0x00010];/* PCIX command register */
-/* -------------- */
- pseudo_bit_t pcix_status_reg[0x00020];/* PCIX Status Register */
-/* -------------- */
- pseudo_bit_t reserved9[0x00440];
-/* -------------- */
-};
-
-/* NTU QP Map Table Entry */
-
-struct tavorprm_ntu_qpm_st { /* Little Endian */
- pseudo_bit_t va_h[0x00020]; /* Bits 63:32 of the virtual address to be used in IB request, Number of bits to be actually used depends on the page size (eg. will use all 52 for 4K page, 51 for 8K page etc). */
-/* -------------- */
- pseudo_bit_t wm[0x00002]; /* Amount of data to fill in to the read response buffer prior to delivering read response to uplink
- 00 - forward
- 01 - MTU
- 10 - full message
- 11 - Reserved */
- pseudo_bit_t mtu[0x00002]; /* MTUI of the channel to be used by this page, value is 256*2MU bytes */
- pseudo_bit_t rd_len[0x00003]; /* Length of speculative prefetch for read, value is 16*2RD_Len bytes */
- pseudo_bit_t fence[0x00002];
- pseudo_bit_t reserved0[0x00002];
- pseudo_bit_t err_fence[0x00001]; /* 0,00 - No action in NTU - normal flow
- 0,01 - Reserved (fence bits value of "01" is not defined)
- 0,10 - Enter PCU transaction to Error fifo, NO fence trap to consequent transaction
- 0,11 - Enter PCU transaction to Error fifo, fence trap to consequent transactions
- 1,xx - Enter PCU transaction to Error fifo, mark QRM indication in error fifo. */
- pseudo_bit_t va_l[0x00014]; /* Bits 31:12 of the virtual address to be used in IB request, Number of bits to be actually used depends on the page size (eg. will use all 52 for 4K page, 51 for 8K page etc). */
-/* -------------- */
- pseudo_bit_t rkey[0x00020]; /* RKey to be places for RDMA IB requests message */
-/* -------------- */
- pseudo_bit_t my_qpn[0x00018]; /* Local QO this page is mapped to */
- pseudo_bit_t s[0x00001]; /* Force solicit event bit in the descriptor */
- pseudo_bit_t e[0x00001]; /* Force E-bit in the descriptor */
- pseudo_bit_t s_r[0x00001]; /* S/R# - generate Send as a result of write hit to this page */
- pseudo_bit_t b[0x00001]; /* Breakpoint - ptransfer control to firmware for every cycle that hits this page */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t ce[0x00001]; /* Cache Enable - entry can be cached if this bit is set. */
- pseudo_bit_t v[0x00001]; /* Valid bit - the entry is valid only if this bit is set */
-/* -------------- */
-};
-
-/* Event Data Field - Performance Monitor */
-
-struct tavorprm_performance_monitor_event_st { /* Little Endian */
- struct tavorprm_performance_monitors_st performance_monitor_snapshot;/* Performance monitor snapshot */
-/* -------------- */
- pseudo_bit_t monitor_number[0x00008];/* 0x01 - SQPC
- 0x02 - RQPC
- 0x03 - CQC
- 0x04 - Rkey
- 0x05 - TLB
- 0x06 - port0
- 0x07 - port1 */
- pseudo_bit_t reserved0[0x00018];
-/* -------------- */
- pseudo_bit_t reserved1[0x00040];
-/* -------------- */
-};
-
-/* Event_data Field - Page Faults */
-
-struct tavorprm_page_fault_event_data_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00040];
-/* -------------- */
- pseudo_bit_t s_r[0x00001]; /* Send (1) or Receive (0) queue caused page fault */
- pseudo_bit_t r_l[0x00001]; /* Remote (1) or local (0) access caused fault */
- pseudo_bit_t w_d[0x00001]; /* WQE (1) or data (0) access caused fault */
- pseudo_bit_t wqv[0x00001]; /* Indicates whether message caused fault consumes descriptor (valid for receive queue only). */
- pseudo_bit_t fault_type[0x00004]; /* 0000-0111 - RESERVED
- 1000 - Translation page not present
- 1001 - RESERVED
- 1010 - Page write access violation
- 1011 - 1101 - RESERVED
- 1110 - Unsupported non-present page fault
- 1111 - unsupported write access fault */
- pseudo_bit_t reserved1[0x00018];
-/* -------------- */
- pseudo_bit_t va_h[0x00020]; /* Virtual address that caused access fault[63:32] */
-/* -------------- */
- pseudo_bit_t va_l[0x00020]; /* Virtual address that caused access fault[31:0] */
-/* -------------- */
- pseudo_bit_t mem_key[0x00020]; /* Memory Key used for address translation */
-/* -------------- */
-};
-
-/* Event_data Field - Port State Change */
-
-struct tavorprm_port_state_change_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00040];
-/* -------------- */
- pseudo_bit_t reserved1[0x0001c];
- pseudo_bit_t p[0x00002]; /* Port number (1 or 2) */
- pseudo_bit_t reserved2[0x00002];
-/* -------------- */
- pseudo_bit_t reserved3[0x00060];
-/* -------------- */
-};
-
-/* Event_data Field - Completion Queue Error */
-
-struct tavorprm_completion_queue_error_st { /* Little Endian */
- pseudo_bit_t cqn[0x00018]; /* CQ number event is reported for */
- pseudo_bit_t reserved0[0x00008];
-/* -------------- */
- pseudo_bit_t reserved1[0x00020];
-/* -------------- */
- pseudo_bit_t syndrome[0x00008]; /* Error syndrome
- 0x01 - CQ overrun
- 0x02 - CQ access violation error */
- pseudo_bit_t reserved2[0x00018];
-/* -------------- */
- pseudo_bit_t reserved3[0x00060];
-/* -------------- */
-};
-
-/* Event_data Field - Completion Event */
-
-struct tavorprm_completion_event_st { /* Little Endian */
- pseudo_bit_t cqn[0x00018]; /* CQ number event is reported for */
- pseudo_bit_t reserved0[0x00008];
-/* -------------- */
- pseudo_bit_t reserved1[0x000a0];
-/* -------------- */
-};
-
-/* Event Queue Entry */
-
-struct tavorprm_event_queue_entry_st { /* Little Endian */
- pseudo_bit_t event_sub_type[0x00008];/* Event Sub Type.
- Defined for events which have sub types, zero elsewhere. */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t event_type[0x00008]; /* Event Type */
- pseudo_bit_t reserved1[0x00008];
-/* -------------- */
- pseudo_bit_t event_data[6][0x00020];/* Delivers auxilary data to handle event. */
-/* -------------- */
- pseudo_bit_t reserved2[0x00007];
- pseudo_bit_t owner[0x00001]; /* Owner of the entry
- 0 SW
- 1 HW */
- pseudo_bit_t reserved3[0x00018];
-/* -------------- */
-};
-
-/* QP/EE State Transitions Command Parameters */
-
-struct tavorprm_qp_ee_state_transitions_st { /* Little Endian */
- pseudo_bit_t opt_param_mask[0x00020];/* This field defines which optional parameters are passed. Each bit specifies whether optional parameter is passed (set) or not (cleared). The optparammask is defined for each QP/EE command. */
-/* -------------- */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
- struct tavorprm_queue_pair_ee_context_entry_st qpc_eec_data;/* QPC/EEC data */
-/* -------------- */
- pseudo_bit_t reserved1[0x007c0];
-/* -------------- */
-};
-
-/* Completion Queue Entry Format */
-
-struct tavorprm_completion_queue_entry_st { /* Little Endian */
- pseudo_bit_t my_qpn[0x00018]; /* Indicates the QP for which completion is being reported */
- pseudo_bit_t reserved0[0x00004];
- pseudo_bit_t ver[0x00004]; /* CQE version.
- 0 for InfiniHost */
-/* -------------- */
- pseudo_bit_t my_ee[0x00018]; /* EE context (for RD only).
- Invalid for Bind and Nop operation on RD. */
- pseudo_bit_t reserved1[0x00008];
-/* -------------- */
- pseudo_bit_t rqpn[0x00018]; /* Remote (source) QP number. Valid in Responder CQE only for Datagram QP. */
- pseudo_bit_t reserved2[0x00008];
-/* -------------- */
- pseudo_bit_t rlid[0x00010]; /* Remote (source) LID of the message. Valid in Responder of UD QP CQE only. */
- pseudo_bit_t ml_path[0x00007]; /* My (destination) LID path bits - these are the lowemost LMC bits of the DLID in an incoming UD packet, higher bits of this field, that are not part of the LMC bits are zeroed by HW.
- Valid in responder of UD QP CQE only.
- Invalid if incoming message DLID is the permissive LID or incoming message is multicast. */
- pseudo_bit_t g[0x00001]; /* GRH present indicator. Valid in Responder of UD QP CQE only. */
- pseudo_bit_t reserved3[0x00001];
- pseudo_bit_t reserved4[0x00003];
- pseudo_bit_t sl[0x00004]; /* Service Level of the message. Valid in Responder of UD QP CQE only. */
-/* -------------- */
- pseudo_bit_t immediate_ethertype_pkey_indx_eecredits[0x00020];/* Valid for receive queue completion only.
- If Opcode field indicates that this was send/write with immediate, this field contains immediate field of the packet.
- If completion corresponds to RAW receive queue, bits 15:0 contain Ethertype field of the packet.
- If completion corresponds to GSI receive queue, bits 31:16 contain index in PKey table that matches PKey of the message arrived.
- For CQE of send queue of the reliable connection service, bits [4:0] of this field contain the encoded EEcredits received in last ACK of the message.
- */
-/* -------------- */
- pseudo_bit_t byte_cnt[0x00020]; /* Byte count of data actually transferred (valid for receive queue completions only) */
-/* -------------- */
- pseudo_bit_t wqe_size[0x00006]; /* Size (in 16-byte chunks) of WQE completion is reported for */
- pseudo_bit_t wqe_adr[0x0001a]; /* Bits 31:6 of WQE virtual address completion is reported for. The 6 least significant bits are zero. */
-/* -------------- */
- pseudo_bit_t reserved5[0x00007];
- pseudo_bit_t owner[0x00001]; /* Owner field. Zero value of this field means SW ownership of CQE. */
- pseudo_bit_t reserved6[0x0000d];
- pseudo_bit_t reserved7[0x00001];
- pseudo_bit_t reserved8[0x00001];
- pseudo_bit_t s[0x00001]; /* If set, completion is reported for Send queue, if cleared - receive queue. */
- pseudo_bit_t opcode[0x00008]; /* The opcode of WQE completion is reported for.
- For CQEs corresponding to send completion, NOPCODE field of the WQE is copied to this field.
- For CQEs corresponding to receive completions, opcode field of last packet in the message copied to this field.
- For CQEs corresponding to the receive queue of QPs mapped to QP1, the opcode will be SEND with Immediate (messages are guaranteed to be SEND only)
-
- The following values are reported in case of completion with error:
- 0xFE - For completion with error on Receive Queues
- 0xFF - For completion with error on Send Queues */
-/* -------------- */
-};
-
-/* */
-
-struct tavorprm_ecc_detect_event_data_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00080];
-/* -------------- */
- pseudo_bit_t cause_lsb[0x00001];
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t cause_msb[0x00001];
- pseudo_bit_t reserved2[0x00002];
- pseudo_bit_t err_rmw[0x00001];
- pseudo_bit_t err_src_id[0x00003];
- pseudo_bit_t err_da[0x00002];
- pseudo_bit_t err_ba[0x00002];
- pseudo_bit_t reserved3[0x00011];
- pseudo_bit_t overflow[0x00001];
-/* -------------- */
- pseudo_bit_t err_ra[0x00010];
- pseudo_bit_t err_ca[0x00010];
-/* -------------- */
-};
-
-/* MAD_IFC Input Mailbox */
-
-struct tavorprm_mad_ifc_st { /* Little Endian */
- pseudo_bit_t request_mad_packet[64][0x00020];/* Request MAD Packet (256bytes) */
-/* -------------- */
- pseudo_bit_t my_qpn[0x00018]; /* Destination QP number from the received MAD.
- This field is reserved if Mad_extended_info indication in the input modifier is clear. */
- pseudo_bit_t reserved0[0x00008];
-/* -------------- */
- pseudo_bit_t rqpn[0x00018]; /* Remote (source) QP number from the received MAD.
- This field is reserved if Mad_extended_info indication in the input modifier is clear. */
- pseudo_bit_t reserved1[0x00008];
-/* -------------- */
- pseudo_bit_t rlid[0x00010]; /* Remote (source) LID from the received MAD.
- This field is reserved if Mad_extended_info indication in the input modifier is clear. */
- pseudo_bit_t ml_path[0x00007]; /* My (destination) LID path bits from the received MAD.
- This field is reserved if Mad_extended_info indication in the input modifier is clear. */
- pseudo_bit_t g[0x00001]; /* If set, the GRH field in valid.
- This field is reserved if Mad_extended_info indication in the input modifier is clear. */
- pseudo_bit_t reserved2[0x00004];
- pseudo_bit_t sl[0x00004]; /* Service Level of the received MAD.
- This field is reserved if Mad_extended_info indication in the input modifier is clear. */
-/* -------------- */
- pseudo_bit_t pkey_indx[0x00010]; /* Index in PKey table that matches PKey of the received MAD.
- This field is reserved if Mad_extended_info indication in the input modifier is clear. */
- pseudo_bit_t reserved3[0x00010];
-/* -------------- */
- pseudo_bit_t reserved4[0x00180];
-/* -------------- */
- pseudo_bit_t grh[10][0x00020]; /* The GRH field of the MAD packet that was scattered to the first 40 bytes pointed to by the scatter list.
- Valid if Mad_extended_info bit (in the input modifier) and g bit are set.
- Otherwise this field is reserved. */
-/* -------------- */
- pseudo_bit_t reserved5[0x004c0];
-/* -------------- */
-};
-
-/* Event_data Field - ECC Detection Event */
-
-struct tavorprm_scrubbing_event_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00080];
-/* -------------- */
- pseudo_bit_t cause_lsb[0x00001]; /* data integrity error cause:
- single ECC error in the 64bit lsb data, on the rise edge of the clock */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t cause_msb[0x00001]; /* data integrity error cause:
- single ECC error in the 64bit msb data, on the fall edge of the clock */
- pseudo_bit_t reserved2[0x00002];
- pseudo_bit_t err_rmw[0x00001]; /* transaction type:
- 0 - read
- 1 - read/modify/write */
- pseudo_bit_t err_src_id[0x00003]; /* source of the transaction: 0x4 - PCI, other - internal or IB */
- pseudo_bit_t err_da[0x00002]; /* Error DIMM address */
- pseudo_bit_t err_ba[0x00002]; /* Error bank address */
- pseudo_bit_t reserved3[0x00011];
- pseudo_bit_t overflow[0x00001]; /* Fatal: ECC error FIFO overflow - ECC errors were detected, which may or may not have been corrected by InfiniHost */
-/* -------------- */
- pseudo_bit_t err_ra[0x00010]; /* Error row address */
- pseudo_bit_t err_ca[0x00010]; /* Error column address */
-/* -------------- */
-};
-
-/* PBL */
-
-struct tavorprm_pbl_st { /* Little Endian */
- pseudo_bit_t mtt_0_h[0x00020]; /* First MTT[63:32] */
-/* -------------- */
- pseudo_bit_t mtt_0_l[0x00020]; /* First MTT[31:0] */
-/* -------------- */
- pseudo_bit_t mtt_1_h[0x00020]; /* Second MTT[63:32] */
-/* -------------- */
- pseudo_bit_t mtt_1_l[0x00020]; /* Second MTT[31:0] */
-/* -------------- */
- pseudo_bit_t mtt_2_h[0x00020]; /* Third MTT[63:32] */
-/* -------------- */
- pseudo_bit_t mtt_2_l[0x00020]; /* Third MTT[31:0] */
-/* -------------- */
- pseudo_bit_t mtt_3_h[0x00020]; /* Fourth MTT[63:32] */
-/* -------------- */
- pseudo_bit_t mtt_3_l[0x00020]; /* Fourth MTT[31:0] */
-/* -------------- */
-};
-
-/* Miscellaneous Counters */
-
-struct tavorprm_misc_counters_st { /* Little Endian */
- pseudo_bit_t ddr_scan_cnt[0x00020]; /* Number of times whole of DDR was scanned */
-/* -------------- */
- pseudo_bit_t reserved0[0x007e0];
-/* -------------- */
-};
-
-/* MAD_IFC Opcode Modifier */
-
-struct tavorprm_mad_ifc_opcode_modifier_st { /* Little Endian */
- pseudo_bit_t mkey[0x00001]; /* Enable MKey validation. */
- pseudo_bit_t bkey[0x00001]; /* Enable BKey validation. */
- pseudo_bit_t reserved0[0x0001d];
- pseudo_bit_t mad_extended_info[0x00001];/* Mad_Extended_Info valid bit.
- Requeried for for trap generation when BKey check is enabled. */
-/* -------------- */
-};
-
-/* MAD_IFC Input Modifier */
-
-struct tavorprm_mad_ifc_input_modifier_st { /* Little Endian */
- pseudo_bit_t port_number[0x00008]; /* Port number (1 or 2). */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t rlid[0x00001]; /* Remote (source) LID from the received MAD.
- This field is required for trap generation upon MKey/BKey validation. */
- pseudo_bit_t reserved1[0x0000f];
-/* -------------- */
-};
-
-/* Fast_Registration_Segment */
-
-struct tavorprm_fast_registration_segment_st { /* Little Endian */
- pseudo_bit_t reserved0[0x0001b];
- pseudo_bit_t lr[0x00001]; /* If set - Local Read access will be enabled */
- pseudo_bit_t lw[0x00001]; /* If set - Local Write access will be enabled */
- pseudo_bit_t rr[0x00001]; /* If set - Remote Read access will be enabled */
- pseudo_bit_t rw[0x00001]; /* If set - Remote Write access will be enabled */
- pseudo_bit_t a[0x00001]; /* If set - Remote Atomic access will be enabled */
-/* -------------- */
- pseudo_bit_t pbl_ptr_63_32[0x00020];/* Physical address pointer [63:32] to the physical block list */
-/* -------------- */
- pseudo_bit_t mem_key[0x00020]; /* Memory Key on which the fast registration is executed on. */
-/* -------------- */
- pseudo_bit_t page_size[0x00005]; /* Page size used for the region. Actual size is [4K]*2^Page_size bytes.
- page_size should be less than 20. */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t zb[0x00001]; /* Zero Based Region */
- pseudo_bit_t pbl_ptr_31_8[0x00018]; /* Physical address pointer [31:8] to the physical block list */
-/* -------------- */
- pseudo_bit_t start_address_h[0x00020];/* Start Address[63:32] - Virtual Address where this region starts */
-/* -------------- */
- pseudo_bit_t start_address_l[0x00020];/* Start Address[31:0] - Virtual Address where this region starts */
-/* -------------- */
- pseudo_bit_t reg_len_h[0x00020]; /* Region Length[63:32] */
-/* -------------- */
- pseudo_bit_t reg_len_l[0x00020]; /* Region Length[31:0] */
-/* -------------- */
-};
-
-/* 0 */
-
-struct tavorprm_tavor_prm_st { /* Little Endian */
- struct tavorprm_completion_queue_entry_st completion_queue_entry;/* Completion Queue Entry Format */
-/* -------------- */
- pseudo_bit_t reserved0[0x7ff00];
-/* -------------- */
- struct tavorprm_qp_ee_state_transitions_st qp_ee_state_transitions;/* QP/EE State Transitions Command Parameters */
-/* -------------- */
- pseudo_bit_t reserved1[0x7f000];
-/* -------------- */
- struct tavorprm_event_queue_entry_st event_queue_entry;/* Event Queue Entry */
-/* -------------- */
- pseudo_bit_t reserved2[0x7ff00];
-/* -------------- */
- struct tavorprm_completion_event_st completion_event;/* Event_data Field - Completion Event */
-/* -------------- */
- pseudo_bit_t reserved3[0x7ff40];
-/* -------------- */
- struct tavorprm_completion_queue_error_st completion_queue_error;/* Event_data Field - Completion Queue Error */
-/* -------------- */
- pseudo_bit_t reserved4[0x7ff40];
-/* -------------- */
- struct tavorprm_port_state_change_st port_state_change;/* Event_data Field - Port State Change */
-/* -------------- */
- pseudo_bit_t reserved5[0xfff40];
-/* -------------- */
- struct tavorprm_page_fault_event_data_st page_fault_event_data;/* Event_data Field - Page Faults */
-/* -------------- */
- pseudo_bit_t reserved6[0x7ff40];
-/* -------------- */
- struct tavorprm_performance_monitor_event_st performance_monitor_event;/* Event Data Field - Performance Monitor */
-/* -------------- */
- pseudo_bit_t reserved7[0x7ff20];
-/* -------------- */
- struct tavorprm_ntu_qpm_st ntu_qpm; /* NTU QP Map Table Entry */
-/* -------------- */
- pseudo_bit_t reserved8[0x7ff80];
-/* -------------- */
- struct tavorprm_mt23108_type0_st mt23108_type0;/* InfiniHost Type0 Configuration Header */
-/* -------------- */
- pseudo_bit_t reserved9[0x7f800];
-/* -------------- */
- struct tavorprm_qp_ee_event_st qp_ee_event;/* Event_data Field - QP/EE Events */
-/* -------------- */
- pseudo_bit_t reserved10[0x00040];
-/* -------------- */
- struct tavorprm_gpio_event_data_st gpio_event_data;
-/* -------------- */
- pseudo_bit_t reserved11[0x7fe40];
-/* -------------- */
- struct tavorprm_ud_address_vector_st ud_address_vector;/* UD Address Vector */
-/* -------------- */
- pseudo_bit_t reserved12[0x7ff00];
-/* -------------- */
- struct tavorprm_queue_pair_ee_context_entry_st queue_pair_ee_context_entry;/* QP and EE Context Entry */
-/* -------------- */
- pseudo_bit_t reserved13[0x7f800];
-/* -------------- */
- struct tavorprm_address_path_st address_path;/* Address Path */
-/* -------------- */
- pseudo_bit_t reserved14[0x7ff00];
-/* -------------- */
- struct tavorprm_completion_queue_context_st completion_queue_context;/* Completion Queue Context Table Entry */
-/* -------------- */
- pseudo_bit_t reserved15[0x7fe00];
-/* -------------- */
- struct tavorprm_mpt_st mpt; /* Memory Protection Table (MPT) Entry */
-/* -------------- */
- pseudo_bit_t reserved16[0x7fe00];
-/* -------------- */
- struct tavorprm_mtt_st mtt; /* Memory Translation Table (MTT) Entry */
-/* -------------- */
- pseudo_bit_t reserved17[0x7ffc0];
-/* -------------- */
- struct tavorprm_eqc_st eqc; /* Event Queue Context Table Entry */
-/* -------------- */
- pseudo_bit_t reserved18[0x7fe00];
-/* -------------- */
- struct tavorprm_performance_monitors_st performance_monitors;/* Performance Monitors */
-/* -------------- */
- pseudo_bit_t reserved19[0x7ff80];
-/* -------------- */
- struct tavorprm_hca_command_register_st hca_command_register;/* HCA Command Register (HCR) */
-/* -------------- */
- pseudo_bit_t reserved20[0xfff20];
-/* -------------- */
- struct tavorprm_init_hca_st init_hca;/* INIT_HCA & QUERY_HCA Parameters Block */
-/* -------------- */
- pseudo_bit_t reserved21[0x7f000];
-/* -------------- */
- struct tavorprm_qpcbaseaddr_st qpcbaseaddr;/* QPC/EEC/CQC/EQC/RDB Parameters */
-/* -------------- */
- pseudo_bit_t reserved22[0x7fc00];
-/* -------------- */
- struct tavorprm_udavtable_memory_parameters_st udavtable_memory_parameters;/* Memory Access Parameters for UD Address Vector Table */
-/* -------------- */
- pseudo_bit_t reserved23[0x7ffc0];
-/* -------------- */
- struct tavorprm_multicastparam_st multicastparam;/* Multicast Support Parameters */
-/* -------------- */
- pseudo_bit_t reserved24[0x7ff00];
-/* -------------- */
- struct tavorprm_tptparams_st tptparams;/* Translation and Protection Tables Parameters */
-/* -------------- */
- pseudo_bit_t reserved25[0x7ff00];
-/* -------------- */
- struct tavorprm_query_ddr_st query_ddr;/* QUERY_DDR Parameters Block */
-/* -------------- */
- struct tavorprm_access_ddr_st access_ddr;
-/* -------------- */
- pseudo_bit_t reserved26[0x7f700];
-/* -------------- */
- struct tavorprm_dimminfo_st dimminfo;/* Logical DIMM Information */
-/* -------------- */
- pseudo_bit_t reserved27[0x7ff00];
-/* -------------- */
- struct tavorprm_query_fw_st query_fw;/* QUERY_FW Parameters Block */
-/* -------------- */
- pseudo_bit_t reserved28[0x7f800];
-/* -------------- */
- struct tavorprm_query_adapter_st query_adapter;/* QUERY_ADAPTER Parameters Block */
-/* -------------- */
- pseudo_bit_t reserved29[0x7f800];
-/* -------------- */
- struct tavorprm_query_dev_lim_st query_dev_lim;/* Query Device Limitations */
-/* -------------- */
- pseudo_bit_t reserved30[0x7f800];
-/* -------------- */
- struct tavorprm_uar_params_st uar_params;/* UAR Parameters */
-/* -------------- */
- pseudo_bit_t reserved31[0x7ff00];
-/* -------------- */
- struct tavorprm_init_ib_st init_ib; /* INIT_IB Parameters */
-/* -------------- */
- pseudo_bit_t reserved32[0x7f800];
-/* -------------- */
- struct tavorprm_mgm_entry_st mgm_entry;/* Multicast Group Member */
-/* -------------- */
- pseudo_bit_t reserved33[0x7fe00];
-/* -------------- */
- struct tavorprm_set_ib_st set_ib; /* SET_IB Parameters */
-/* -------------- */
- pseudo_bit_t reserved34[0x7fe00];
-/* -------------- */
- struct tavorprm_rd_send_doorbell_st rd_send_doorbell;/* RD-send doorbell */
-/* -------------- */
- pseudo_bit_t reserved35[0x7ff80];
-/* -------------- */
- struct tavorprm_send_doorbell_st send_doorbell;/* Send doorbell */
-/* -------------- */
- pseudo_bit_t reserved36[0x7ffc0];
-/* -------------- */
- struct tavorprm_receive_doorbell_st receive_doorbell;/* Receive doorbell */
-/* -------------- */
- pseudo_bit_t reserved37[0x7ffc0];
-/* -------------- */
- struct tavorprm_cq_cmd_doorbell_st cq_cmd_doorbell;/* CQ Doorbell */
-/* -------------- */
- pseudo_bit_t reserved38[0x7ffc0];
-/* -------------- */
- struct tavorprm_eq_cmd_doorbell_st eq_cmd_doorbell;/* EQ Doorbell */
-/* -------------- */
- pseudo_bit_t reserved39[0x7ffc0];
-/* -------------- */
- struct tavorprm_uar_st uar; /* User Access Region */
-/* -------------- */
- pseudo_bit_t reserved40[0x7c000];
-/* -------------- */
- struct tavorprm_mgmqp_st mgmqp; /* Multicast Group Member QP */
-/* -------------- */
- pseudo_bit_t reserved41[0x7ffe0];
-/* -------------- */
- struct tavorprm_query_debug_msg_st query_debug_msg;/* Query Debug Message */
-/* -------------- */
- pseudo_bit_t reserved42[0x7f800];
-/* -------------- */
- struct tavorprm_sys_en_out_param_st sys_en_out_param;/* SYS_EN Output Parameter */
-/* -------------- */
- pseudo_bit_t reserved43[0x7ffc0];
-/* -------------- */
- struct tavorprm_resize_cq_st resize_cq;/* Resize CQ Input Mailbox */
-/* -------------- */
- pseudo_bit_t reserved44[0x7fe00];
-/* -------------- */
- struct tavorprm_completion_with_error_st completion_with_error;/* Completion with Error CQE */
-/* -------------- */
- pseudo_bit_t reserved45[0x7ff00];
-/* -------------- */
- struct tavorprm_hcr_completion_event_st hcr_completion_event;/* Event_data Field - HCR Completion Event */
-/* -------------- */
- pseudo_bit_t reserved46[0x7ff40];
-/* -------------- */
- struct tavorprm_transport_and_ci_error_counters_st transport_and_ci_error_counters;/* Transport and CI Error Counters */
-/* -------------- */
- pseudo_bit_t reserved47[0x7f000];
-/* -------------- */
- struct tavorprm_performance_counters_st performance_counters;/* Performance Counters */
-/* -------------- */
- pseudo_bit_t reserved48[0x7f800];
-/* -------------- */
- struct tavorprm_query_bar_st query_bar;/* Query BAR */
-/* -------------- */
- pseudo_bit_t reserved49[0x7ffc0];
-/* -------------- */
- struct tavorprm_cfg_schq_st cfg_schq;/* Schedule queues configuration */
-/* -------------- */
- pseudo_bit_t reserved50[0x7f800];
-/* -------------- */
- struct tavorprm_mt23108_configuration_registers_st mt23108_configuration_registers;/* InfiniHost Configuration Registers - Used in Mem-Free mode only */
-/* -------------- */
- pseudo_bit_t reserved51[0x80000];
-/* -------------- */
- pseudo_bit_t reserved52[0x00100];
-/* -------------- */
- pseudo_bit_t reserved53[0x7ff00];
-/* -------------- */
- pseudo_bit_t reserved54[0x00100];
-/* -------------- */
- pseudo_bit_t reserved55[0x7ff00];
-/* -------------- */
- struct tavorprm_srq_context_st srq_context;/* SRQ Context */
-/* -------------- */
- pseudo_bit_t reserved56[0x7ff00];
-/* -------------- */
- struct tavorprm_mod_stat_cfg_st mod_stat_cfg;/* MOD_STAT_CFG */
-/* -------------- */
- pseudo_bit_t reserved57[0x00080];
-/* -------------- */
- pseudo_bit_t reserved58[0x00040];
-/* -------------- */
- pseudo_bit_t reserved59[0x1bff740];
-/* -------------- */
-};
-
-#include "MT23108_PRM_append.h"
-
-#endif /* H_prefix_tavorprm_bits_fixnames_MT23108_PRM_csp_H */
diff --git a/gpxe/src/drivers/net/mlx_ipoib/MT23108_PRM_append.h b/gpxe/src/drivers/net/mlx_ipoib/MT23108_PRM_append.h
deleted file mode 100644
index e8b6bc5d..00000000
--- a/gpxe/src/drivers/net/mlx_ipoib/MT23108_PRM_append.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- This software is available to you under a choice of one of two
- licenses. You may choose to be licensed under the terms of the GNU
- General Public License (GPL) Version 2, available at
- <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
- license, available in the LICENSE.TXT file accompanying this
- software. These details are also available at
- <http://openib.org/license.html>.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- SOFTWARE.
-
- Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
-*/
-
-/***
- *** This file was generated at "Tue Nov 16 17:03:53 2004"
- *** by:
- *** % csp_bf -copyright=/mswg/misc/license-header.txt -bits MT23108_PRM_append.csp
- ***/
-
-#ifndef H_bits_MT23108_PRM_append_csp_H
-#define H_bits_MT23108_PRM_append_csp_H
-
-
-/* Gather entry with inline data */
-
-struct wqe_segment_data_inline_st { /* Little Endian */
- pseudo_bit_t byte_count[0x0000a]; /* Not including padding for 16Byte chunks */
- pseudo_bit_t reserved0[0x00015];
- pseudo_bit_t always1[0x00001];
-/* -------------- */
- pseudo_bit_t data[0x00020]; /* Data may be more this segment size - in 16Byte chunks */
-/* -------------- */
-};
-
-/* Scatter/Gather entry with a pointer */
-
-struct wqe_segment_data_ptr_st { /* Little Endian */
- pseudo_bit_t byte_count[0x0001f];
- pseudo_bit_t always0[0x00001];
-/* -------------- */
- pseudo_bit_t l_key[0x00020];
-/* -------------- */
- pseudo_bit_t local_address_h[0x00020];
-/* -------------- */
- pseudo_bit_t local_address_l[0x00020];
-/* -------------- */
-};
-
-/* */
-
-struct wqe_segment_atomic_st { /* Little Endian */
- pseudo_bit_t swap_add_h[0x00020];
-/* -------------- */
- pseudo_bit_t swap_add_l[0x00020];
-/* -------------- */
- pseudo_bit_t compare_h[0x00020];
-/* -------------- */
- pseudo_bit_t compare_l[0x00020];
-/* -------------- */
-};
-
-/* */
-
-struct wqe_segment_remote_address_st { /* Little Endian */
- pseudo_bit_t remote_virt_addr_h[0x00020];
-/* -------------- */
- pseudo_bit_t remote_virt_addr_l[0x00020];
-/* -------------- */
- pseudo_bit_t rkey[0x00020];
-/* -------------- */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
-};
-
-/* Bind memory window segment */
-
-struct wqe_segment_bind_st { /* Little Endian */
- pseudo_bit_t reserved0[0x0001d];
- pseudo_bit_t rr[0x00001]; /* Remote read */
- pseudo_bit_t rw[0x00001]; /* Remote write */
- pseudo_bit_t a[0x00001]; /* atomic */
-/* -------------- */
- pseudo_bit_t reserved1[0x00020];
-/* -------------- */
- pseudo_bit_t new_rkey[0x00020];
-/* -------------- */
- pseudo_bit_t region_lkey[0x00020];
-/* -------------- */
- pseudo_bit_t start_address_h[0x00020];
-/* -------------- */
- pseudo_bit_t start_address_l[0x00020];
-/* -------------- */
- pseudo_bit_t length_h[0x00020];
-/* -------------- */
- pseudo_bit_t length_l[0x00020];
-/* -------------- */
-};
-
-/* */
-
-struct wqe_segment_ud_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
- pseudo_bit_t l_key[0x00020]; /* memory key for UD AV */
-/* -------------- */
- pseudo_bit_t av_address_63_32[0x00020];
-/* -------------- */
- pseudo_bit_t reserved1[0x00005];
- pseudo_bit_t av_address_31_5[0x0001b];
-/* -------------- */
- pseudo_bit_t reserved2[0x00080];
-/* -------------- */
- pseudo_bit_t destination_qp[0x00018];
- pseudo_bit_t reserved3[0x00008];
-/* -------------- */
- pseudo_bit_t q_key[0x00020];
-/* -------------- */
- pseudo_bit_t reserved4[0x00040];
-/* -------------- */
-};
-
-/* */
-
-struct wqe_segment_rd_st { /* Little Endian */
- pseudo_bit_t destination_qp[0x00018];
- pseudo_bit_t reserved0[0x00008];
-/* -------------- */
- pseudo_bit_t q_key[0x00020];
-/* -------------- */
- pseudo_bit_t reserved1[0x00040];
-/* -------------- */
-};
-
-/* */
-
-struct wqe_segment_ctrl_recv_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00002];
- pseudo_bit_t e[0x00001]; /* WQE event */
- pseudo_bit_t c[0x00001]; /* Create CQE (for "requested signalling" QP) */
- pseudo_bit_t reserved1[0x0001c];
-/* -------------- */
- pseudo_bit_t reserved2[0x00020];
-/* -------------- */
-};
-
-/* */
-
-struct wqe_segment_ctrl_mlx_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00002];
- pseudo_bit_t e[0x00001]; /* WQE event */
- pseudo_bit_t c[0x00001]; /* Create CQE (for "requested signalling" QP) */
- pseudo_bit_t reserved1[0x00004];
- pseudo_bit_t sl[0x00004];
- pseudo_bit_t max_statrate[0x00003];
- pseudo_bit_t reserved2[0x00001];
- pseudo_bit_t slr[0x00001]; /* 0= take slid from port. 1= take slid from given headers */
- pseudo_bit_t v15[0x00001]; /* Send packet over VL15 */
- pseudo_bit_t reserved3[0x0000e];
-/* -------------- */
- pseudo_bit_t vcrc[0x00010]; /* Packet's VCRC (if not 0 - otherwise computed by HW) */
- pseudo_bit_t rlid[0x00010]; /* Destination LID (must match given headers) */
-/* -------------- */
-};
-
-/* */
-
-struct wqe_segment_ctrl_send_st { /* Little Endian */
- pseudo_bit_t always1[0x00001];
- pseudo_bit_t s[0x00001]; /* Solicited event */
- pseudo_bit_t e[0x00001]; /* WQE event */
- pseudo_bit_t c[0x00001]; /* Create CQE (for "requested signalling" QP) */
- pseudo_bit_t reserved0[0x0001c];
-/* -------------- */
- pseudo_bit_t immediate[0x00020];
-/* -------------- */
-};
-
-/* */
-
-struct wqe_segment_next_st { /* Little Endian */
- pseudo_bit_t nopcode[0x00005]; /* next opcode */
- pseudo_bit_t reserved0[0x00001];
- pseudo_bit_t nda_31_6[0x0001a]; /* NDA[31:6] */
-/* -------------- */
- pseudo_bit_t nds[0x00006];
- pseudo_bit_t f[0x00001]; /* fence bit */
- pseudo_bit_t dbd[0x00001]; /* doorbell rung */
- pseudo_bit_t nee[0x00018]; /* next EE */
-/* -------------- */
-};
-#endif /* H_bits_MT23108_PRM_append_csp_H */
diff --git a/gpxe/src/drivers/net/mlx_ipoib/MT25218_PRM.h b/gpxe/src/drivers/net/mlx_ipoib/MT25218_PRM.h
deleted file mode 100644
index e0eae385..00000000
--- a/gpxe/src/drivers/net/mlx_ipoib/MT25218_PRM.h
+++ /dev/null
@@ -1,3463 +0,0 @@
-/*
- This software is available to you under a choice of one of two
- licenses. You may choose to be licensed under the terms of the GNU
- General Public License (GPL) Version 2, available at
- <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
- license, available in the LICENSE.TXT file accompanying this
- software. These details are also available at
- <http://openib.org/license.html>.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- SOFTWARE.
-
- Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
-*/
-
-/***
- *** This file was generated at "Tue Nov 22 15:21:23 2005"
- *** by:
- *** % csp_bf -copyright=/mswg/misc/license-header.txt -prefix arbelprm_ -bits -fixnames MT25218_PRM.csp
- ***/
-
-#ifndef H_prefix_arbelprm_bits_fixnames_MT25218_PRM_csp_H
-#define H_prefix_arbelprm_bits_fixnames_MT25218_PRM_csp_H
-
-#include "bit_ops.h"
-
-
-/* UD Address Vector */
-
-struct arbelprm_ud_address_vector_st { /* Little Endian */
- pseudo_bit_t pd[0x00018]; /* Protection Domain */
- pseudo_bit_t port_number[0x00002]; /* Port number
- 1 - Port 1
- 2 - Port 2
- other - reserved */
- pseudo_bit_t reserved0[0x00006];
-/* -------------- */
- pseudo_bit_t rlid[0x00010]; /* Remote (Destination) LID */
- pseudo_bit_t my_lid_path_bits[0x00007];/* Source LID - the lower 7 bits (upper bits are taken from PortInfo) */
- pseudo_bit_t g[0x00001]; /* Global address enable - if set, GRH will be formed for packet header */
- pseudo_bit_t reserved1[0x00008];
-/* -------------- */
- pseudo_bit_t hop_limit[0x00008]; /* IPv6 hop limit */
- pseudo_bit_t max_stat_rate[0x00003];/* Maximum static rate control.
- 0 - 4X injection rate
- 1 - 1X injection rate
- other - reserved
- */
- pseudo_bit_t reserved2[0x00001];
- pseudo_bit_t msg[0x00002]; /* Max Message size, size is 256*2^MSG bytes */
- pseudo_bit_t reserved3[0x00002];
- pseudo_bit_t mgid_index[0x00006]; /* Index to port GID table
- mgid_index = (port_number-1) * 2^log_max_gid + gid_index
- Where:
- 1. log_max_gid is taken from QUERY_DEV_LIM command
- 2. gid_index is the index to the GID table */
- pseudo_bit_t reserved4[0x0000a];
-/* -------------- */
- pseudo_bit_t flow_label[0x00014]; /* IPv6 flow label */
- pseudo_bit_t tclass[0x00008]; /* IPv6 TClass */
- pseudo_bit_t sl[0x00004]; /* InfiniBand Service Level (SL) */
-/* -------------- */
- pseudo_bit_t rgid_127_96[0x00020]; /* Remote GID[127:96] */
-/* -------------- */
- pseudo_bit_t rgid_95_64[0x00020]; /* Remote GID[95:64] */
-/* -------------- */
- pseudo_bit_t rgid_63_32[0x00020]; /* Remote GID[63:32] */
-/* -------------- */
- pseudo_bit_t rgid_31_0[0x00020]; /* Remote GID[31:0] if G bit is set. Must be set to 0x2 if G bit is cleared. */
-/* -------------- */
-};
-
-/* Send doorbell */
-
-struct arbelprm_send_doorbell_st { /* Little Endian */
- pseudo_bit_t nopcode[0x00005]; /* Opcode of descriptor to be executed */
- pseudo_bit_t f[0x00001]; /* Fence bit. If set, descriptor is fenced */
- pseudo_bit_t reserved0[0x00002];
- pseudo_bit_t wqe_counter[0x00010]; /* Modulo-64K counter of WQEs posted to the QP since its creation excluding the newly posted WQEs in this doorbell. Should be zero for the first doorbell on the QP */
- pseudo_bit_t wqe_cnt[0x00008]; /* Number of WQEs posted with this doorbell. Must be grater then zero. */
-/* -------------- */
- pseudo_bit_t nds[0x00006]; /* Next descriptor size (in 16-byte chunks) */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t qpn[0x00018]; /* QP number this doorbell is rung on */
-/* -------------- */
-};
-
-/* ACCESS_LAM_inject_errors_input_modifier */
-
-struct arbelprm_access_lam_inject_errors_input_modifier_st { /* Little Endian */
- pseudo_bit_t index3[0x00007];
- pseudo_bit_t q3[0x00001];
- pseudo_bit_t index2[0x00007];
- pseudo_bit_t q2[0x00001];
- pseudo_bit_t index1[0x00007];
- pseudo_bit_t q1[0x00001];
- pseudo_bit_t index0[0x00007];
- pseudo_bit_t q0[0x00001];
-/* -------------- */
-};
-
-/* ACCESS_LAM_inject_errors_input_parameter */
-
-struct arbelprm_access_lam_inject_errors_input_parameter_st { /* Little Endian */
- pseudo_bit_t ba[0x00002]; /* Bank Address */
- pseudo_bit_t da[0x00002]; /* Dimm Address */
- pseudo_bit_t reserved0[0x0001c];
-/* -------------- */
- pseudo_bit_t ra[0x00010]; /* Row Address */
- pseudo_bit_t ca[0x00010]; /* Column Address */
-/* -------------- */
-};
-
-/* */
-
-struct arbelprm_recv_wqe_segment_next_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00006];
- pseudo_bit_t nda_31_6[0x0001a]; /* Next WQE address, low 32 bit. WQE address must be aligned to 64-byte boundary (6 LSB are forced ZERO). */
-/* -------------- */
- pseudo_bit_t nds[0x00006]; /* Next WQE size in OctoWords (16 bytes).
- Zero value in NDS field signals end of WQEs? chain.
- */
- pseudo_bit_t reserved1[0x0001a];
-/* -------------- */
-};
-
-/* Send wqe segment data inline */
-
-struct arbelprm_wqe_segment_data_inline_st { /* Little Endian */
- pseudo_bit_t byte_count[0x0000a]; /* Not including padding for 16Byte chunks */
- pseudo_bit_t reserved0[0x00015];
- pseudo_bit_t always1[0x00001];
-/* -------------- */
- pseudo_bit_t data[0x00018]; /* Data may be more this segment size - in 16Byte chunks */
- pseudo_bit_t reserved1[0x00008];
-/* -------------- */
- pseudo_bit_t reserved2[0x00040];
-/* -------------- */
-};
-
-/* Send wqe segment data ptr */
-
-struct arbelprm_wqe_segment_data_ptr_st { /* Little Endian */
- pseudo_bit_t byte_count[0x0001f];
- pseudo_bit_t always0[0x00001];
-/* -------------- */
- pseudo_bit_t l_key[0x00020];
-/* -------------- */
- pseudo_bit_t local_address_h[0x00020];
-/* -------------- */
- pseudo_bit_t local_address_l[0x00020];
-/* -------------- */
-};
-
-/* Send wqe segment rd */
-
-struct arbelprm_local_invalidate_segment_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00040];
-/* -------------- */
- pseudo_bit_t mem_key[0x00018];
- pseudo_bit_t reserved1[0x00008];
-/* -------------- */
- pseudo_bit_t reserved2[0x000a0];
-/* -------------- */
-};
-
-/* Fast_Registration_Segment */
-
-struct arbelprm_fast_registration_segment_st { /* Little Endian */
- pseudo_bit_t reserved0[0x0001b];
- pseudo_bit_t lr[0x00001]; /* If set - Local Read access will be enabled */
- pseudo_bit_t lw[0x00001]; /* If set - Local Write access will be enabled */
- pseudo_bit_t rr[0x00001]; /* If set - Remote Read access will be enabled */
- pseudo_bit_t rw[0x00001]; /* If set - Remote Write access will be enabled */
- pseudo_bit_t a[0x00001]; /* If set - Remote Atomic access will be enabled */
-/* -------------- */
- pseudo_bit_t pbl_ptr_63_32[0x00020];/* Physical address pointer [63:32] to the physical buffer list */
-/* -------------- */
- pseudo_bit_t mem_key[0x00020]; /* Memory Key on which the fast registration is executed on. */
-/* -------------- */
- pseudo_bit_t page_size[0x00005]; /* Page size used for the region. Actual size is [4K]*2^Page_size bytes.
- page_size should be less than 20. */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t zb[0x00001]; /* Zero Based Region */
- pseudo_bit_t pbl_ptr_31_8[0x00018]; /* Physical address pointer [31:8] to the physical buffer list */
-/* -------------- */
- pseudo_bit_t start_address_h[0x00020];/* Start Address[63:32] - Virtual Address where this region starts */
-/* -------------- */
- pseudo_bit_t start_address_l[0x00020];/* Start Address[31:0] - Virtual Address where this region starts */
-/* -------------- */
- pseudo_bit_t reg_len_h[0x00020]; /* Region Length[63:32] */
-/* -------------- */
- pseudo_bit_t reg_len_l[0x00020]; /* Region Length[31:0] */
-/* -------------- */
-};
-
-/* Send wqe segment atomic */
-
-struct arbelprm_wqe_segment_atomic_st { /* Little Endian */
- pseudo_bit_t swap_add_h[0x00020];
-/* -------------- */
- pseudo_bit_t swap_add_l[0x00020];
-/* -------------- */
- pseudo_bit_t compare_h[0x00020];
-/* -------------- */
- pseudo_bit_t compare_l[0x00020];
-/* -------------- */
-};
-
-/* Send wqe segment remote address */
-
-struct arbelprm_wqe_segment_remote_address_st { /* Little Endian */
- pseudo_bit_t remote_virt_addr_h[0x00020];
-/* -------------- */
- pseudo_bit_t remote_virt_addr_l[0x00020];
-/* -------------- */
- pseudo_bit_t rkey[0x00020];
-/* -------------- */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
-};
-
-/* end wqe segment bind */
-
-struct arbelprm_wqe_segment_bind_st { /* Little Endian */
- pseudo_bit_t reserved0[0x0001d];
- pseudo_bit_t rr[0x00001]; /* If set, Remote Read Enable for bound window. */
- pseudo_bit_t rw[0x00001]; /* If set, Remote Write Enable for bound window.
- */
- pseudo_bit_t a[0x00001]; /* If set, Atomic Enable for bound window. */
-/* -------------- */
- pseudo_bit_t reserved1[0x0001e];
- pseudo_bit_t zb[0x00001]; /* If set, Window is Zero Based. */
- pseudo_bit_t type[0x00001]; /* Window type.
- 0 - Type one window
- 1 - Type two window
- */
-/* -------------- */
- pseudo_bit_t new_rkey[0x00020]; /* The new RKey of window to bind */
-/* -------------- */
- pseudo_bit_t region_lkey[0x00020]; /* Local key of region, which window will be bound to */
-/* -------------- */
- pseudo_bit_t start_address_h[0x00020];
-/* -------------- */
- pseudo_bit_t start_address_l[0x00020];
-/* -------------- */
- pseudo_bit_t length_h[0x00020];
-/* -------------- */
- pseudo_bit_t length_l[0x00020];
-/* -------------- */
-};
-
-/* Send wqe segment ud */
-
-struct arbelprm_wqe_segment_ud_st { /* Little Endian */
- struct arbelprm_ud_address_vector_st ud_address_vector;/* UD Address Vector */
-/* -------------- */
- pseudo_bit_t destination_qp[0x00018];
- pseudo_bit_t reserved0[0x00008];
-/* -------------- */
- pseudo_bit_t q_key[0x00020];
-/* -------------- */
- pseudo_bit_t reserved1[0x00040];
-/* -------------- */
-};
-
-/* Send wqe segment rd */
-
-struct arbelprm_wqe_segment_rd_st { /* Little Endian */
- pseudo_bit_t destination_qp[0x00018];
- pseudo_bit_t reserved0[0x00008];
-/* -------------- */
- pseudo_bit_t q_key[0x00020];
-/* -------------- */
- pseudo_bit_t reserved1[0x00040];
-/* -------------- */
-};
-
-/* Send wqe segment ctrl */
-
-struct arbelprm_wqe_segment_ctrl_send_st { /* Little Endian */
- pseudo_bit_t always1[0x00001];
- pseudo_bit_t s[0x00001]; /* Solicited Event bit. If set, SE (Solicited Event) bit is set in the (last packet of) message. */
- pseudo_bit_t e[0x00001]; /* Event bit. If set, event is generated upon WQE?s completion, if QP is allowed to generate an event. Every WQE with E-bit set generates an event. The C bit must be set on unsignalled QPs if the E bit is set. */
- pseudo_bit_t c[0x00001]; /* Completion Queue bit. Valid for unsignalled QPs only. If set, the CQ is updated upon WQE?s completion */
- pseudo_bit_t ip[0x00001]; /* When set, InfiniHost III Ex will calculate the IP checksum of the IP header that is present immediately after the IPoverIB encapsulation header. In the case of multiple headers (encapsulation), InfiniHost III Ex will calculate the checksum only for the first IP header following the IPoverIB encapsulation header. Not Valid for IPv6 packets */
- pseudo_bit_t tcp_udp[0x00001]; /* When set, InfiniHost III Ex will calculate the TCP/UDP checksum of the packet that is present immediately after the IP header. In the case of multiple headers (encapsulation), InfiniHost III Ex will calculate the checksum only for the first TCP header following the IP header. This bit may be set only if the entire TCP/UDP segment is present in one IB packet */
- pseudo_bit_t reserved0[0x00001];
- pseudo_bit_t so[0x00001]; /* Strong Ordering - when set, the WQE will be executed only after all previous WQEs have been executed. Can be set for RC WQEs only. This bit must be set in type two BIND, Fast Registration and Local invalidate operations. */
- pseudo_bit_t reserved1[0x00018];
-/* -------------- */
- pseudo_bit_t immediate[0x00020]; /* If the OpCode encodes an operation with Immediate (RDMA-write/SEND), This field will hold the Immediate data to be sent. If the OpCode encodes send and invalidate operations, this field holds the Invalidation key to be inserted into the packet; otherwise, this field is reserved. */
-/* -------------- */
-};
-
-/* Send wqe segment next */
-
-struct arbelprm_wqe_segment_next_st { /* Little Endian */
- pseudo_bit_t nopcode[0x00005]; /* Next Opcode: OpCode to be used in the next WQE. Encodes the type of operation to be executed on the QP:
- ?00000? - NOP. WQE with this opcode creates a completion, but does nothing else
- ?01000? - RDMA-write
- ?01001? - RDMA-Write with Immediate
- ?10000? - RDMA-read
- ?10001? - Atomic Compare & swap
- ?10010? - Atomic Fetch & Add
- ?11000? - Bind memory window
-
- The encoding for the following operations depends on the QP type:
- For RC, UC and RD QP:
- ?01010? - SEND
- ?01011? - SEND with Immediate
-
- For UD QP:
- the encoding depends on the values of bit[31] of the Q_key field in the Datagram Segment (see Table 39, ?Unreliable Datagram Segment Format - Pointers,? on page 101) of
- both the current WQE and the next WQE, as follows:
-
- If the last WQE Q_Key bit[31] is clear and the next WQE Q_key bit[31] is set :
- ?01000? - SEND
- ?01001? - SEND with Immediate
-
- otherwise (if the next WQE Q_key bit[31] is cleared, or the last WQE Q_Key bit[31] is set):
- ?01010? - SEND
- ?01011? - SEND with Immediate
-
- All other opcode values are RESERVED, and will result in invalid operation execution. */
- pseudo_bit_t reserved0[0x00001];
- pseudo_bit_t nda_31_6[0x0001a]; /* Next WQE address, low 32 bit. WQE address must be aligned to 64-byte boundary (6 LSB are forced ZERO). */
-/* -------------- */
- pseudo_bit_t nds[0x00006]; /* Next WQE size in OctoWords (16 bytes).
- Zero value in NDS field signals end of WQEs? chain.
- */
- pseudo_bit_t f[0x00001]; /* Fence bit. If set, next WQE will start execution only after all previous Read/Atomic WQEs complete. */
- pseudo_bit_t always1[0x00001];
- pseudo_bit_t reserved1[0x00018];
-/* -------------- */
-};
-
-/* Address Path */
-
-struct arbelprm_address_path_st { /* Little Endian */
- pseudo_bit_t pkey_index[0x00007]; /* PKey table index */
- pseudo_bit_t reserved0[0x00011];
- pseudo_bit_t port_number[0x00002]; /* Specific port associated with this QP/EE.
- 1 - Port 1
- 2 - Port 2
- other - reserved */
- pseudo_bit_t reserved1[0x00006];
-/* -------------- */
- pseudo_bit_t rlid[0x00010]; /* Remote (Destination) LID */
- pseudo_bit_t my_lid_path_bits[0x00007];/* Source LID - the lower 7 bits (upper bits are taken from PortInfo) */
- pseudo_bit_t g[0x00001]; /* Global address enable - if set, GRH will be formed for packet header */
- pseudo_bit_t reserved2[0x00005];
- pseudo_bit_t rnr_retry[0x00003]; /* RNR retry count (see C9-132 in IB spec Vol 1)
- 0-6 - number of retries
- 7 - infinite */
-/* -------------- */
- pseudo_bit_t hop_limit[0x00008]; /* IPv6 hop limit */
- pseudo_bit_t max_stat_rate[0x00003];/* Maximum static rate control.
- 0 - 100% injection rate
- 1 - 25% injection rate
- 2 - 12.5% injection rate
- 3 - 50% injection rate
- other - reserved */
- pseudo_bit_t reserved3[0x00005];
- pseudo_bit_t mgid_index[0x00006]; /* Index to port GID table */
- pseudo_bit_t reserved4[0x00005];
- pseudo_bit_t ack_timeout[0x00005]; /* Local ACK timeout - Transport timer for activation of retransmission mechanism. Refer to IB spec Vol1 9.7.6.1.3 for further details.
- The transport timer is set to 4.096us*2^ack_timeout, if ack_timeout is 0 then transport timer is disabled. */
-/* -------------- */
- pseudo_bit_t flow_label[0x00014]; /* IPv6 flow label */
- pseudo_bit_t tclass[0x00008]; /* IPv6 TClass */
- pseudo_bit_t sl[0x00004]; /* InfiniBand Service Level (SL) */
-/* -------------- */
- pseudo_bit_t rgid_127_96[0x00020]; /* Remote GID[127:96] */
-/* -------------- */
- pseudo_bit_t rgid_95_64[0x00020]; /* Remote GID[95:64] */
-/* -------------- */
- pseudo_bit_t rgid_63_32[0x00020]; /* Remote GID[63:32] */
-/* -------------- */
- pseudo_bit_t rgid_31_0[0x00020]; /* Remote GID[31:0] */
-/* -------------- */
-};
-
-/* HCA Command Register (HCR) */
-
-struct arbelprm_hca_command_register_st { /* Little Endian */
- pseudo_bit_t in_param_h[0x00020]; /* Input Parameter: parameter[63:32] or pointer[63:32] to input mailbox (see command description) */
-/* -------------- */
- pseudo_bit_t in_param_l[0x00020]; /* Input Parameter: parameter[31:0] or pointer[31:0] to input mailbox (see command description) */
-/* -------------- */
- pseudo_bit_t input_modifier[0x00020];/* Input Parameter Modifier */
-/* -------------- */
- pseudo_bit_t out_param_h[0x00020]; /* Output Parameter: parameter[63:32] or pointer[63:32] to output mailbox (see command description) */
-/* -------------- */
- pseudo_bit_t out_param_l[0x00020]; /* Output Parameter: parameter[31:0] or pointer[31:0] to output mailbox (see command description) */
-/* -------------- */
- pseudo_bit_t reserved0[0x00010];
- pseudo_bit_t token[0x00010]; /* Software assigned token to the command, to uniquely identify it. The token is returned to the software in the EQE reported. */
-/* -------------- */
- pseudo_bit_t opcode[0x0000c]; /* Command opcode */
- pseudo_bit_t opcode_modifier[0x00004];/* Opcode Modifier, see specific description for each command. */
- pseudo_bit_t reserved1[0x00006];
- pseudo_bit_t e[0x00001]; /* Event Request
- 0 - Don't report event (software will poll the GO bit)
- 1 - Report event to EQ when the command completes */
- pseudo_bit_t go[0x00001]; /* Go (0=Software ownership for the HCR, 1=Hardware ownership for the HCR)
- Software can write to the HCR only if Go bit is cleared.
- Software must set the Go bit to trigger the HW to execute the command. Software must not write to this register value other than 1 for the Go bit. */
- pseudo_bit_t status[0x00008]; /* Command execution status report. Valid only if command interface in under SW ownership (Go bit is cleared)
- 0 - command completed without error. If different than zero, command execution completed with error. Syndrom encoding is depended on command executed and is defined for each command */
-/* -------------- */
-};
-
-/* CQ Doorbell */
-
-struct arbelprm_cq_cmd_doorbell_st { /* Little Endian */
- pseudo_bit_t cqn[0x00018]; /* CQ number accessed */
- pseudo_bit_t cmd[0x00003]; /* Command to be executed on CQ
- 0x0 - Reserved
- 0x1 - Request notification for next Solicited completion event. CQ_param specifies the current CQ Consumer Counter.
- 0x2 - Request notification for next Solicited or Unsolicited completion event. CQ_param specifies the current CQ Consumer Counter.
- 0x3 - Request notification for multiple completions (Arm-N). CQ_param specifies the value of the CQ Counter that when reached by HW (i.e. HW generates a CQE into this Counter) Event will be generated
- Other - Reserved */
- pseudo_bit_t reserved0[0x00001];
- pseudo_bit_t cmd_sn[0x00002]; /* Command Sequence Number - This field should be incremented upon receiving completion notification of the respective CQ.
- This transition is done by ringing Request notification for next Solicited, Request notification for next Solicited or Unsolicited
- completion or Request notification for multiple completions doorbells after receiving completion notification.
- This field is initialized to Zero */
- pseudo_bit_t reserved1[0x00002];
-/* -------------- */
- pseudo_bit_t cq_param[0x00020]; /* parameter to be used by CQ command */
-/* -------------- */
-};
-
-/* RD-send doorbell */
-
-struct arbelprm_rd_send_doorbell_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t een[0x00018]; /* End-to-end context number (reliable datagram)
- Must be zero for Nop and Bind operations */
-/* -------------- */
- pseudo_bit_t reserved1[0x00008];
- pseudo_bit_t qpn[0x00018]; /* QP number this doorbell is rung on */
-/* -------------- */
- struct arbelprm_send_doorbell_st send_doorbell;/* Send Parameters */
-/* -------------- */
-};
-
-/* Multicast Group Member QP */
-
-struct arbelprm_mgmqp_st { /* Little Endian */
- pseudo_bit_t qpn_i[0x00018]; /* QPN_i: QP number which is a member in this multicast group. Valid only if Qi bit is set. Length of the QPN_i list is set in INIT_HCA */
- pseudo_bit_t reserved0[0x00007];
- pseudo_bit_t qi[0x00001]; /* Qi: QPN_i is valid */
-/* -------------- */
-};
-
-/* vsd */
-
-struct arbelprm_vsd_st { /* Little Endian */
- pseudo_bit_t vsd_dw0[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw1[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw2[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw3[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw4[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw5[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw6[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw7[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw8[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw9[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw10[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw11[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw12[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw13[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw14[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw15[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw16[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw17[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw18[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw19[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw20[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw21[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw22[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw23[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw24[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw25[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw26[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw27[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw28[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw29[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw30[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw31[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw32[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw33[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw34[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw35[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw36[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw37[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw38[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw39[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw40[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw41[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw42[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw43[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw44[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw45[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw46[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw47[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw48[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw49[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw50[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw51[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw52[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw53[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw54[0x00020];
-/* -------------- */
- pseudo_bit_t vsd_dw55[0x00020];
-/* -------------- */
-};
-
-/* ACCESS_LAM_inject_errors */
-
-struct arbelprm_access_lam_inject_errors_st { /* Little Endian */
- struct arbelprm_access_lam_inject_errors_input_parameter_st access_lam_inject_errors_input_parameter;
-/* -------------- */
- struct arbelprm_access_lam_inject_errors_input_modifier_st access_lam_inject_errors_input_modifier;
-/* -------------- */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
-};
-
-/* Logical DIMM Information */
-
-struct arbelprm_dimminfo_st { /* Little Endian */
- pseudo_bit_t dimmsize[0x00010]; /* Size of DIMM in units of 2^20 Bytes. This value is valid only when DIMMStatus is 0. */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t dimmstatus[0x00001]; /* DIMM Status
- 0 - Enabled
- 1 - Disabled
- */
- pseudo_bit_t dh[0x00001]; /* When set, the DIMM is Hidden and can not be accessed from the PCI bus. */
- pseudo_bit_t wo[0x00001]; /* When set, the DIMM is write only.
- If data integrity is configured (other than none), the DIMM must be
- only targeted by write transactions where the address and size are multiples of 16 bytes. */
- pseudo_bit_t reserved1[0x00005];
-/* -------------- */
- pseudo_bit_t spd[0x00001]; /* 0 - DIMM SPD was read from DIMM
- 1 - DIMM SPD was read from InfiniHost-III-EX NVMEM */
- pseudo_bit_t sladr[0x00003]; /* SPD Slave Address 3 LSBits.
- Valid only if spd bit is 0. */
- pseudo_bit_t sock_num[0x00002]; /* DIMM socket number (for double sided DIMM one of the two numbers will be reported) */
- pseudo_bit_t syn[0x00004]; /* Error syndrome (valid regardless of status value)
- 0 - DIMM has no error
- 1 - SPD error (e.g. checksum error, no response, error while reading)
- 2 - DIMM out of bounds (e.g. DIMM rows number is not between 7 and 14, DIMM type is not 2)
- 3 - DIMM conflict (e.g. mix of registered and unbuffered DIMMs, CAS latency conflict)
- 5 - DIMM size trimmed due to configuration (size exceeds)
- other - Error, reserved
- */
- pseudo_bit_t reserved2[0x00016];
-/* -------------- */
- pseudo_bit_t reserved3[0x00040];
-/* -------------- */
- pseudo_bit_t dimm_start_adr_h[0x00020];/* DIMM memory start address [63:32]. This value is valid only when DIMMStatus is 0. */
-/* -------------- */
- pseudo_bit_t dimm_start_adr_l[0x00020];/* DIMM memory start address [31:0]. This value is valid only when DIMMStatus is 0. */
-/* -------------- */
- pseudo_bit_t reserved4[0x00040];
-/* -------------- */
-};
-
-/* UAR Parameters */
-
-struct arbelprm_uar_params_st { /* Little Endian */
- pseudo_bit_t uar_base_addr_h[0x00020];/* UAR Base (pyhsical) Address [63:32] (QUERY_HCA only) */
-/* -------------- */
- pseudo_bit_t reserved0[0x00014];
- pseudo_bit_t uar_base_addr_l[0x0000c];/* UAR Base (pyhsical) Address [31:20] (QUERY_HCA only) */
-/* -------------- */
- pseudo_bit_t uar_page_sz[0x00008]; /* This field defines the size of each UAR page.
- Size of UAR Page is 4KB*2^UAR_Page_Size */
- pseudo_bit_t log_max_uars[0x00004]; /* Number of UARs supported is 2^log_max_UARs */
- pseudo_bit_t reserved1[0x00004];
- pseudo_bit_t log_uar_entry_sz[0x00006];/* Size of UAR Context entry is 2^log_uar_sz in 4KByte pages */
- pseudo_bit_t reserved2[0x0000a];
-/* -------------- */
- pseudo_bit_t reserved3[0x00020];
-/* -------------- */
- pseudo_bit_t uar_scratch_base_addr_h[0x00020];/* Base address of UAR scratchpad [63:32].
- Number of entries in table is 2^log_max_uars.
- Table must be aligned to its size */
-/* -------------- */
- pseudo_bit_t uar_scratch_base_addr_l[0x00020];/* Base address of UAR scratchpad [31:0].
- Number of entries in table is 2^log_max_uars.
- Table must be aligned to its size. */
-/* -------------- */
- pseudo_bit_t uar_context_base_addr_h[0x00020];/* Base address of UAR Context [63:32].
- Number of entries in table is 2^log_max_uars.
- Table must be aligned to its size. */
-/* -------------- */
- pseudo_bit_t uar_context_base_addr_l[0x00020];/* Base address of UAR Context [31:0].
- Number of entries in table is 2^log_max_uars.
- Table must be aligned to its size. */
-/* -------------- */
-};
-
-/* Translation and Protection Tables Parameters */
-
-struct arbelprm_tptparams_st { /* Little Endian */
- pseudo_bit_t mpt_base_adr_h[0x00020];/* MPT - Memory Protection Table base physical address [63:32].
- Entry size is 64 bytes.
- Table must be aligned to its size.
- Address may be set to 0xFFFFFFFF if address translation and protection is not supported. */
-/* -------------- */
- pseudo_bit_t mpt_base_adr_l[0x00020];/* MPT - Memory Protection Table base physical address [31:0].
- Entry size is 64 bytes.
- Table must be aligned to its size.
- Address may be set to 0xFFFFFFFF if address translation and protection is not supported. */
-/* -------------- */
- pseudo_bit_t log_mpt_sz[0x00006]; /* Log (base 2) of the number of region/windows entries in the MPT table. */
- pseudo_bit_t reserved0[0x00002];
- pseudo_bit_t pfto[0x00005]; /* Page Fault RNR Timeout -
- The field returned in RNR Naks generated when a page fault is detected.
- It has no effect when on-demand-paging is not used. */
- pseudo_bit_t reserved1[0x00013];
-/* -------------- */
- pseudo_bit_t reserved2[0x00020];
-/* -------------- */
- pseudo_bit_t mtt_base_addr_h[0x00020];/* MTT - Memory Translation table base physical address [63:32].
- Table must be aligned to its size.
- Address may be set to 0xFFFFFFFF if address translation and protection is not supported. */
-/* -------------- */
- pseudo_bit_t mtt_base_addr_l[0x00020];/* MTT - Memory Translation table base physical address [31:0].
- Table must be aligned to its size.
- Address may be set to 0xFFFFFFFF if address translation and protection is not supported. */
-/* -------------- */
- pseudo_bit_t reserved3[0x00040];
-/* -------------- */
-};
-
-/* Multicast Support Parameters */
-
-struct arbelprm_multicastparam_st { /* Little Endian */
- pseudo_bit_t mc_base_addr_h[0x00020];/* Base Address of the Multicast Table [63:32].
- The base address must be aligned to the entry size.
- Address may be set to 0xFFFFFFFF if multicast is not supported. */
-/* -------------- */
- pseudo_bit_t mc_base_addr_l[0x00020];/* Base Address of the Multicast Table [31:0].
- The base address must be aligned to the entry size.
- Address may be set to 0xFFFFFFFF if multicast is not supported. */
-/* -------------- */
- pseudo_bit_t reserved0[0x00040];
-/* -------------- */
- pseudo_bit_t log_mc_table_entry_sz[0x00010];/* Log2 of the Size of multicast group member (MGM) entry.
- Must be greater than 5 (to allow CTRL and GID sections).
- That implies the number of QPs per MC table entry. */
- pseudo_bit_t reserved1[0x00010];
-/* -------------- */
- pseudo_bit_t mc_table_hash_sz[0x00011];/* Number of entries in multicast DGID hash table (must be power of 2)
- INIT_HCA - the required number of entries
- QUERY_HCA - the actual number of entries assigned by firmware (will be less than or equal to the amount required in INIT_HCA) */
- pseudo_bit_t reserved2[0x0000f];
-/* -------------- */
- pseudo_bit_t log_mc_table_sz[0x00005];/* Log2 of the overall number of MC entries in the MCG table (includes both hash and auxiliary tables) */
- pseudo_bit_t reserved3[0x00013];
- pseudo_bit_t mc_hash_fn[0x00003]; /* Multicast hash function
- 0 - Default hash function
- other - reserved */
- pseudo_bit_t reserved4[0x00005];
-/* -------------- */
- pseudo_bit_t reserved5[0x00020];
-/* -------------- */
-};
-
-/* QPC/EEC/CQC/EQC/RDB Parameters */
-
-struct arbelprm_qpcbaseaddr_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00080];
-/* -------------- */
- pseudo_bit_t qpc_base_addr_h[0x00020];/* QPC Base Address [63:32]
- Table must be aligned on its size */
-/* -------------- */
- pseudo_bit_t log_num_of_qp[0x00005];/* Log base 2 of number of supported QPs */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t qpc_base_addr_l[0x00019];/* QPC Base Address [31:7]
- Table must be aligned on its size */
-/* -------------- */
- pseudo_bit_t reserved2[0x00040];
-/* -------------- */
- pseudo_bit_t eec_base_addr_h[0x00020];/* EEC Base Address [63:32]
- Table must be aligned on its size.
- Address may be set to 0xFFFFFFFF if RD is not supported. */
-/* -------------- */
- pseudo_bit_t log_num_of_ee[0x00005];/* Log base 2 of number of supported EEs. */
- pseudo_bit_t reserved3[0x00002];
- pseudo_bit_t eec_base_addr_l[0x00019];/* EEC Base Address [31:7]
- Table must be aligned on its size
- Address may be set to 0xFFFFFFFF if RD is not supported. */
-/* -------------- */
- pseudo_bit_t srqc_base_addr_h[0x00020];/* SRQ Context Base Address [63:32]
- Table must be aligned on its size
- Address may be set to 0xFFFFFFFF if SRQ is not supported. */
-/* -------------- */
- pseudo_bit_t log_num_of_srq[0x00005];/* Log base 2 of number of supported SRQs. */
- pseudo_bit_t srqc_base_addr_l[0x0001b];/* SRQ Context Base Address [31:5]
- Table must be aligned on its size
- Address may be set to 0xFFFFFFFF if SRQ is not supported. */
-/* -------------- */
- pseudo_bit_t cqc_base_addr_h[0x00020];/* CQC Base Address [63:32]
- Table must be aligned on its size */
-/* -------------- */
- pseudo_bit_t log_num_of_cq[0x00005];/* Log base 2 of number of supported CQs. */
- pseudo_bit_t reserved4[0x00001];
- pseudo_bit_t cqc_base_addr_l[0x0001a];/* CQC Base Address [31:6]
- Table must be aligned on its size */
-/* -------------- */
- pseudo_bit_t reserved5[0x00040];
-/* -------------- */
- pseudo_bit_t eqpc_base_addr_h[0x00020];/* Extended QPC Base Address [63:32]
- Table has same number of entries as QPC table.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t eqpc_base_addr_l[0x00020];/* Extended QPC Base Address [31:0]
- Table has same number of entries as QPC table.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t reserved6[0x00040];
-/* -------------- */
- pseudo_bit_t eeec_base_addr_h[0x00020];/* Extended EEC Base Address [63:32]
- Table has same number of entries as EEC table.
- Table must be aligned to entry size.
- Address may be set to 0xFFFFFFFF if RD is not supported. */
-/* -------------- */
- pseudo_bit_t eeec_base_addr_l[0x00020];/* Extended EEC Base Address [31:0]
- Table has same number of entries as EEC table.
- Table must be aligned to entry size.
- Address may be set to 0xFFFFFFFF if RD is not supported. */
-/* -------------- */
- pseudo_bit_t reserved7[0x00040];
-/* -------------- */
- pseudo_bit_t eqc_base_addr_h[0x00020];/* EQC Base Address [63:32]
- Address may be set to 0xFFFFFFFF if EQs are not supported.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t log_num_eq[0x00004]; /* Log base 2 of number of supported EQs.
- Must be 6 or less in InfiniHost-III-EX. */
- pseudo_bit_t reserved8[0x00002];
- pseudo_bit_t eqc_base_addr_l[0x0001a];/* EQC Base Address [31:6]
- Address may be set to 0xFFFFFFFF if EQs are not supported.
- Table must be aligned to entry size. */
-/* -------------- */
- pseudo_bit_t reserved9[0x00040];
-/* -------------- */
- pseudo_bit_t rdb_base_addr_h[0x00020];/* Base address of table that holds remote read and remote atomic requests [63:32].
- Address may be set to 0xFFFFFFFF if remote RDMA reads are not supported.
- Please refer to QP and EE chapter for further explanation on RDB allocation. */
-/* -------------- */
- pseudo_bit_t rdb_base_addr_l[0x00020];/* Base address of table that holds remote read and remote atomic requests [31:0].
- Table must be aligned to RDB entry size (32 bytes).
- Address may be set to zero if remote RDMA reads are not supported.
- Please refer to QP and EE chapter for further explanation on RDB allocation. */
-/* -------------- */
- pseudo_bit_t reserved10[0x00040];
-/* -------------- */
-};
-
-/* Header_Log_Register */
-
-struct arbelprm_header_log_register_st { /* Little Endian */
- pseudo_bit_t place_holder[0x00020];
-/* -------------- */
- pseudo_bit_t reserved0[0x00060];
-/* -------------- */
-};
-
-/* Performance Monitors */
-
-struct arbelprm_performance_monitors_st { /* Little Endian */
- pseudo_bit_t e0[0x00001]; /* Enables counting of respective performance counter */
- pseudo_bit_t e1[0x00001]; /* Enables counting of respective performance counter */
- pseudo_bit_t e2[0x00001]; /* Enables counting of respective performance counter */
- pseudo_bit_t reserved0[0x00001];
- pseudo_bit_t r0[0x00001]; /* If written to as '1 - resets respective performance counter, if written to az '0 - no change to matter */
- pseudo_bit_t r1[0x00001]; /* If written to as '1 - resets respective performance counter, if written to az '0 - no change to matter */
- pseudo_bit_t r2[0x00001]; /* If written to as '1 - resets respective performance counter, if written to az '0 - no change to matter */
- pseudo_bit_t reserved1[0x00001];
- pseudo_bit_t i0[0x00001]; /* Interrupt enable on respective counter overflow. '1 - interrupt enabled, '0 - interrupt disabled. */
- pseudo_bit_t i1[0x00001]; /* Interrupt enable on respective counter overflow. '1 - interrupt enabled, '0 - interrupt disabled. */
- pseudo_bit_t i2[0x00001]; /* Interrupt enable on respective counter overflow. '1 - interrupt enabled, '0 - interrupt disabled. */
- pseudo_bit_t reserved2[0x00001];
- pseudo_bit_t f0[0x00001]; /* Overflow flag. If set, overflow occurred on respective counter. Cleared if written to as '1 */
- pseudo_bit_t f1[0x00001]; /* Overflow flag. If set, overflow occurred on respective counter. Cleared if written to as '1 */
- pseudo_bit_t f2[0x00001]; /* Overflow flag. If set, overflow occurred on respective counter. Cleared if written to as '1 */
- pseudo_bit_t reserved3[0x00001];
- pseudo_bit_t ev_cnt1[0x00005]; /* Specifies event to be counted by Event_counter1 See XXX for events' definition. */
- pseudo_bit_t reserved4[0x00003];
- pseudo_bit_t ev_cnt2[0x00005]; /* Specifies event to be counted by Event_counter2 See XXX for events' definition. */
- pseudo_bit_t reserved5[0x00003];
-/* -------------- */
- pseudo_bit_t clock_counter[0x00020];
-/* -------------- */
- pseudo_bit_t event_counter1[0x00020];
-/* -------------- */
- pseudo_bit_t event_counter2[0x00020];/* Read/write event counter, counting events specified by EvCntl and EvCnt2 fields repsectively. When the event counter reaches is maximum value of 0xFFFFFF, the next event will cause it to roll over to zero, set F1 or F2 bit respectively and generate interrupt by I1 I2 bit respectively. */
-/* -------------- */
-};
-
-/* Receive segment format */
-
-struct arbelprm_wqe_segment_ctrl_recv_st { /* Little Endian */
- struct arbelprm_recv_wqe_segment_next_st wqe_segment_next;
-/* -------------- */
- pseudo_bit_t reserved0[0x00002];
- pseudo_bit_t reserved1[0x00001];
- pseudo_bit_t reserved2[0x00001];
- pseudo_bit_t reserved3[0x0001c];
-/* -------------- */
- pseudo_bit_t reserved4[0x00020];
-/* -------------- */
-};
-
-/* MLX WQE segment format */
-
-struct arbelprm_wqe_segment_ctrl_mlx_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00002];
- pseudo_bit_t e[0x00001]; /* WQE event */
- pseudo_bit_t c[0x00001]; /* Create CQE (for "requested signalling" QP) */
- pseudo_bit_t icrc[0x00002]; /* icrc field detemines what to do with the last dword of the packet: 0 - Calculate ICRC and put it instead of last dword. Last dword must be 0x0. 1,2 - reserved. 3 - Leave last dword as is. Last dword must not be 0x0. */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t sl[0x00004];
- pseudo_bit_t max_statrate[0x00004];
- pseudo_bit_t slr[0x00001]; /* 0= take slid from port. 1= take slid from given headers */
- pseudo_bit_t v15[0x00001]; /* Send packet over VL15 */
- pseudo_bit_t reserved2[0x0000e];
-/* -------------- */
- pseudo_bit_t vcrc[0x00010]; /* Packet's VCRC (if not 0 - otherwise computed by HW) */
- pseudo_bit_t rlid[0x00010]; /* Destination LID (must match given headers) */
-/* -------------- */
- pseudo_bit_t reserved3[0x00040];
-/* -------------- */
-};
-
-/* Send WQE segment format */
-
-struct arbelprm_send_wqe_segment_st { /* Little Endian */
- struct arbelprm_wqe_segment_next_st wqe_segment_next;/* Send wqe segment next */
-/* -------------- */
- struct arbelprm_wqe_segment_ctrl_send_st wqe_segment_ctrl_send;/* Send wqe segment ctrl */
-/* -------------- */
- struct arbelprm_wqe_segment_rd_st wqe_segment_rd;/* Send wqe segment rd */
-/* -------------- */
- struct arbelprm_wqe_segment_ud_st wqe_segment_ud;/* Send wqe segment ud */
-/* -------------- */
- struct arbelprm_wqe_segment_bind_st wqe_segment_bind;/* Send wqe segment bind */
-/* -------------- */
- pseudo_bit_t reserved0[0x00180];
-/* -------------- */
- struct arbelprm_wqe_segment_remote_address_st wqe_segment_remote_address;/* Send wqe segment remote address */
-/* -------------- */
- struct arbelprm_wqe_segment_atomic_st wqe_segment_atomic;/* Send wqe segment atomic */
-/* -------------- */
- struct arbelprm_fast_registration_segment_st fast_registration_segment;/* Fast Registration Segment */
-/* -------------- */
- struct arbelprm_local_invalidate_segment_st local_invalidate_segment;/* local invalidate segment */
-/* -------------- */
- struct arbelprm_wqe_segment_data_ptr_st wqe_segment_data_ptr;/* Send wqe segment data ptr */
-/* -------------- */
- struct arbelprm_wqe_segment_data_inline_st wqe_segment_data_inline;/* Send wqe segment data inline */
-/* -------------- */
- pseudo_bit_t reserved1[0x00200];
-/* -------------- */
-};
-
-/* QP and EE Context Entry */
-
-struct arbelprm_queue_pair_ee_context_entry_st { /* Little Endian */
- pseudo_bit_t reserved0[0x00008];
- pseudo_bit_t de[0x00001]; /* Send/Receive Descriptor Event enable - if set, events can be generated upon descriptors' completion on send/receive queue (controlled by E bit in WQE). Invalid in EE context */
- pseudo_bit_t reserved1[0x00002];
- pseudo_bit_t pm_state[0x00002]; /* Path migration state (Migrated, Armed or Rearm)
- 11-Migrated
- 00-Armed
- 01-Rearm
- 10-Reserved
- Should be set to 11 for UD QPs and for QPs which do not support APM */
- pseudo_bit_t reserved2[0x00003];
- pseudo_bit_t st[0x00003]; /* Service type (invalid in EE context):
- 000-Reliable Connection
- 001-Unreliable Connection
- 010-Reliable Datagram
- 011-Unreliable Datagram
- 111-MLX transport (raw bits injection). Used for management QPs and RAW */
- pseudo_bit_t reserved3[0x00009];
- pseudo_bit_t state[0x00004]; /* QP/EE state:
- 0 - RST
- 1 - INIT
- 2 - RTR
- 3 - RTS
- 4 - SQEr
- 5 - SQD (Send Queue Drained)
- 6 - ERR
- 7 - Send Queue Draining
- 8 - Reserved
- 9 - Suspended
- A- F - Reserved
- (Valid for QUERY_QPEE and ERR2RST_QPEE commands only) */
-/* -------------- */
- pseudo_bit_t reserved4[0x00020];
-/* -------------- */
- pseudo_bit_t sched_queue[0x00004]; /* Schedule queue to be used for WQE scheduling to execution. Determines QOS for this QP. */
- pseudo_bit_t rlky[0x00001]; /* When set this QP can use the Reserved L_Key */
- pseudo_bit_t reserved5[0x00003];
- pseudo_bit_t log_sq_stride[0x00003];/* Stride on the send queue. WQ entry is 16*(2^log_SQ_stride) bytes.
- Stride must be equal or bigger then 64 bytes (minimum log_RQ_stride value allowed is 2). */
- pseudo_bit_t log_sq_size[0x00004]; /* Log2 of the Number of WQEs in the Send Queue. */
- pseudo_bit_t reserved6[0x00001];
- pseudo_bit_t log_rq_stride[0x00003];/* Stride on the receive queue. WQ entry is 16*(2^log_RQ_stride) bytes.
- Stride must be equal or bigger then 64 bytes (minimum log_RQ_stride value allowed is 2). */
- pseudo_bit_t log_rq_size[0x00004]; /* Log2 of the Number of WQEs in the Receive Queue. */
- pseudo_bit_t reserved7[0x00001];
- pseudo_bit_t msg_max[0x00005]; /* Max message size allowed on the QP. Maximum message size is 2^msg_Max.
- Must be equal to MTU for UD and MLX QPs. */
- pseudo_bit_t mtu[0x00003]; /* MTU of the QP (Must be the same for both paths: primary and alternative):
- 0x1 - 256 bytes
- 0x2 - 512
- 0x3 - 1024
- 0x4 - 2048
- other - reserved
-
- Should be configured to 0x4 for UD and MLX QPs. */
-/* -------------- */
- pseudo_bit_t usr_page[0x00018]; /* QP (see "non_privileged Access to the HCA Hardware"). Not valid (reserved) in EE context. */
- pseudo_bit_t reserved8[0x00008];
-/* -------------- */
- pseudo_bit_t local_qpn_een[0x00018];/* Local QP/EE number Lower bits determine position of this record in QPC table, and - thus - constrained
- This field is valid for QUERY and ERR2RST commands only. */
- pseudo_bit_t reserved9[0x00008];
-/* -------------- */
- pseudo_bit_t remote_qpn_een[0x00018];/* Remote QP/EE number */
- pseudo_bit_t reserved10[0x00008];
-/* -------------- */
- pseudo_bit_t reserved11[0x00040];
-/* -------------- */
- struct arbelprm_address_path_st primary_address_path;/* Primary address path for the QP/EE */
-/* -------------- */
- struct arbelprm_address_path_st alternative_address_path;/* Alternate address path for the QP/EE */
-/* -------------- */
- pseudo_bit_t rdd[0x00018]; /* Reliable Datagram Domain */
- pseudo_bit_t reserved12[0x00008];
-/* -------------- */
- pseudo_bit_t pd[0x00018]; /* QP protection domain. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved13[0x00008];
-/* -------------- */
- pseudo_bit_t wqe_base_adr_h[0x00020];/* Bits 63:32 of WQE address for both SQ and RQ.
- Reserved for EE context. */
-/* -------------- */
- pseudo_bit_t wqe_lkey[0x00020]; /* memory key (L-Key) to be used to access WQEs. Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t reserved14[0x00003];
- pseudo_bit_t ssc[0x00001]; /* Send Signaled Completion
- 1 - all send WQEs generate CQEs.
- 0 - only send WQEs with C bit set generate completion.
- Not valid (reserved) in EE context. */
- pseudo_bit_t sic[0x00001]; /* If set - Ignore end to end credits on send queue. Not valid (reserved) in EE context. */
- pseudo_bit_t cur_retry_cnt[0x00003];/* Current transport retry counter (QUERY_QPEE only).
- The current transport retry counter can vary from retry_count down to 1, where 1 means that the last retry attempt is currently executing. */
- pseudo_bit_t cur_rnr_retry[0x00003];/* Current RNR retry counter (QUERY_QPEE only).
- The current RNR retry counter can vary from rnr_retry to 1, where 1 means that the last retry attempt is currently executing. */
- pseudo_bit_t fre[0x00001]; /* Fast Registration Work Request Enabled. (Reserved for EE) */
- pseudo_bit_t reserved15[0x00001];
- pseudo_bit_t sae[0x00001]; /* If set - Atomic operations enabled on send queue. Not valid (reserved) in EE context. */
- pseudo_bit_t swe[0x00001]; /* If set - RDMA - write enabled on send queue. Not valid (reserved) in EE context. */
- pseudo_bit_t sre[0x00001]; /* If set - RDMA - read enabled on send queue. Not valid (reserved) in EE context. */
- pseudo_bit_t retry_count[0x00003]; /* Transport timeout Retry count */
- pseudo_bit_t reserved16[0x00002];
- pseudo_bit_t sra_max[0x00003]; /* Maximum number of outstanding RDMA-read/Atomic operations allowed in the send queue. Maximum number is 2^SRA_Max. Must be zero in EE context. */
- pseudo_bit_t flight_lim[0x00004]; /* Number of outstanding (in-flight) messages on the wire allowed for this send queue.
- Number of outstanding messages is 2^Flight_Lim.
- Use 0xF for unlimited number of outstanding messages. */
- pseudo_bit_t ack_req_freq[0x00004]; /* ACK required frequency. ACK required bit will be set in every 2^AckReqFreq packets at least. Not valid for RD QP. */
-/* -------------- */
- pseudo_bit_t reserved17[0x00020];
-/* -------------- */
- pseudo_bit_t next_send_psn[0x00018];/* Next PSN to be sent */
- pseudo_bit_t reserved18[0x00008];
-/* -------------- */
- pseudo_bit_t cqn_snd[0x00018]; /* CQ number completions from the send queue to be reported to. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved19[0x00008];
-/* -------------- */
- pseudo_bit_t reserved20[0x00006];
- pseudo_bit_t snd_wqe_base_adr_l[0x0001a];/* While opening (creating) the WQ, this field should contain the address of first descriptor to be posted. Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t snd_db_record_index[0x00020];/* Index in the UAR Context Table Entry.
- HW uses this index as an offset from the UAR Context Table Entry in order to read this SQ doorbell record.
- The entry is obtained via the usr_page field.
- Not valid for EE. */
-/* -------------- */
- pseudo_bit_t last_acked_psn[0x00018];/* The last acknowledged PSN for the requester (QUERY_QPEE only) */
- pseudo_bit_t reserved21[0x00008];
-/* -------------- */
- pseudo_bit_t ssn[0x00018]; /* Requester Send Sequence Number (QUERY_QPEE only) */
- pseudo_bit_t reserved22[0x00008];
-/* -------------- */
- pseudo_bit_t reserved23[0x00003];
- pseudo_bit_t rsc[0x00001]; /* 1 - all receive WQEs generate CQEs.
- 0 - only receive WQEs with C bit set generate completion.
- Not valid (reserved) in EE context.
- */
- pseudo_bit_t ric[0x00001]; /* Invalid Credits.
- 1 - place "Invalid Credits" to ACKs sent from this queue.
- 0 - ACKs report the actual number of end to end credits on the connection.
- Not valid (reserved) in EE context.
- Must be set to 1 on QPs which are attached to SRQ. */
- pseudo_bit_t reserved24[0x00008];
- pseudo_bit_t rae[0x00001]; /* If set - Atomic operations enabled. on receive queue. Not valid (reserved) in EE context. */
- pseudo_bit_t rwe[0x00001]; /* If set - RDMA - write enabled on receive queue. Not valid (reserved) in EE context. */
- pseudo_bit_t rre[0x00001]; /* If set - RDMA - read enabled on receive queue. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved25[0x00005];
- pseudo_bit_t rra_max[0x00003]; /* Maximum number of outstanding RDMA-read/Atomic operations allowed on receive queue is 2^RRA_Max.
- Must be 0 for EE context. */
- pseudo_bit_t reserved26[0x00008];
-/* -------------- */
- pseudo_bit_t next_rcv_psn[0x00018]; /* Next (expected) PSN on receive */
- pseudo_bit_t min_rnr_nak[0x00005]; /* Minimum RNR NAK timer value (TTTTT field encoding according to the IB spec Vol1 9.7.5.2.8).
- Not valid (reserved) in EE context. */
- pseudo_bit_t reserved27[0x00003];
-/* -------------- */
- pseudo_bit_t reserved28[0x00005];
- pseudo_bit_t ra_buff_indx[0x0001b]; /* Index to outstanding read/atomic buffer.
- This field constructs the address to the RDB for maintaining the incoming RDMA read and atomic requests. */
-/* -------------- */
- pseudo_bit_t cqn_rcv[0x00018]; /* CQ number completions from receive queue to be reported to. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved29[0x00008];
-/* -------------- */
- pseudo_bit_t reserved30[0x00006];
- pseudo_bit_t rcv_wqe_base_adr_l[0x0001a];/* While opening (creating) the WQ, this field should contain the address of first descriptor to be posted. Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t rcv_db_record_index[0x00020];/* Index in the UAR Context Table Entry containing the doorbell record for the receive queue.
- HW uses this index as an offset from the UAR Context Table Entry in order to read this RQ doorbell record.
- The entry is obtained via the usr_page field.
- Not valid for EE. */
-/* -------------- */
- pseudo_bit_t q_key[0x00020]; /* Q_Key to be validated against received datagrams.
- On send datagrams, if Q_Key[31] specified in the WQE is set, then this Q_Key will be transmitted in the outgoing message.
- Not valid (reserved) in EE context. */
-/* -------------- */
- pseudo_bit_t srqn[0x00018]; /* SRQN - Shared Receive Queue Number - specifies the SRQ number from which the QP dequeues receive descriptors.
- SRQN is valid only if SRQ bit is set. Not valid (reserved) in EE context. */
- pseudo_bit_t srq[0x00001]; /* SRQ - Shared Receive Queue. If this bit is set, then the QP is associated with a SRQ. Not valid (reserved) in EE context. */
- pseudo_bit_t reserved31[0x00007];
-/* -------------- */
- pseudo_bit_t rmsn[0x00018]; /* Responder current message sequence number (QUERY_QPEE only) */
- pseudo_bit_t reserved32[0x00008];
-/* -------------- */
- pseudo_bit_t sq_wqe_counter[0x00010];/* A 16bits counter that is incremented for each WQE posted to the SQ.
- Must be 0x0 in SQ initialization.
- (QUERY_QPEE only). */
- pseudo_bit_t rq_wqe_counter[0x00010];/* A 16bits counter that is incremented for each WQE posted to the RQ.
- Must be 0x0 in RQ initialization.
- (QUERY_QPEE only). */
-/* -------------- */
- pseudo_bit_t reserved33[0x00040];
-/* -------------- */
-};
-
-/* Clear Interrupt [63:0] */
-
-struct arbelprm_clr_int_st { /* Little Endian */
- pseudo_bit_t clr_int_h[0x00020]; /* Clear Interrupt [63:32]
- Write transactions to this register will clear (de-assert) the virtual interrupt output pins of InfiniHost-III-EX. The value to be written in this register is obtained by executing QUERY_ADAPTER command on command interface after system boot.
- This register is write-only. Reading from this register will cause undefined result
- */
-/* -------------- */
- pseudo_bit_t clr_int_l[0x00020]; /* Clear Interrupt [31:0]
- Write transactions to this register will clear (de-assert) the virtual interrupt output pins of InfiniHost-III-EX. The value to be written in this register is obtained by executing QUERY_ADAPTER command on command interface after system boot.
- This register is write-only. Reading from this register will cause undefined result */
-/* -------------- */
-};
-
-/* EQ_Arm_DB_Region */
-
-struct arbelprm_eq_arm_db_region_st { /* Little Endian */
- pseudo_bit_t eq_x_arm_h[0x00020]; /* EQ[63:32] X state.
- This register is used to Arm EQs when setting the appropriate bits. */
-/* -------------- */
- pseudo_bit_t eq_x_arm_l[0x00020]; /* EQ[31:0] X state.
- This register is used to Arm EQs when setting the appropriate bits. */
-/* -------------- */
-};
-
-/* EQ Set CI DBs Table */
-
-struct arbelprm_eq_set_ci_table_st { /* Little Endian */
- pseudo_bit_t eq0_set_ci[0x00020]; /* EQ0_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved0[0x00020];
-/* -------------- */
- pseudo_bit_t eq1_set_ci[0x00020]; /* EQ1_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved1[0x00020];
-/* -------------- */
- pseudo_bit_t eq2_set_ci[0x00020]; /* EQ2_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved2[0x00020];
-/* -------------- */
- pseudo_bit_t eq3_set_ci[0x00020]; /* EQ3_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved3[0x00020];
-/* -------------- */
- pseudo_bit_t eq4_set_ci[0x00020]; /* EQ4_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved4[0x00020];
-/* -------------- */
- pseudo_bit_t eq5_set_ci[0x00020]; /* EQ5_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved5[0x00020];
-/* -------------- */
- pseudo_bit_t eq6_set_ci[0x00020]; /* EQ6_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved6[0x00020];
-/* -------------- */
- pseudo_bit_t eq7_set_ci[0x00020]; /* EQ7_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved7[0x00020];
-/* -------------- */
- pseudo_bit_t eq8_set_ci[0x00020]; /* EQ8_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved8[0x00020];
-/* -------------- */
- pseudo_bit_t eq9_set_ci[0x00020]; /* EQ9_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved9[0x00020];
-/* -------------- */
- pseudo_bit_t eq10_set_ci[0x00020]; /* EQ10_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved10[0x00020];
-/* -------------- */
- pseudo_bit_t eq11_set_ci[0x00020]; /* EQ11_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved11[0x00020];
-/* -------------- */
- pseudo_bit_t eq12_set_ci[0x00020]; /* EQ12_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved12[0x00020];
-/* -------------- */
- pseudo_bit_t eq13_set_ci[0x00020]; /* EQ13_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved13[0x00020];
-/* -------------- */
- pseudo_bit_t eq14_set_ci[0x00020]; /* EQ14_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved14[0x00020];
-/* -------------- */
- pseudo_bit_t eq15_set_ci[0x00020]; /* EQ15_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved15[0x00020];
-/* -------------- */
- pseudo_bit_t eq16_set_ci[0x00020]; /* EQ16_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved16[0x00020];
-/* -------------- */
- pseudo_bit_t eq17_set_ci[0x00020]; /* EQ17_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved17[0x00020];
-/* -------------- */
- pseudo_bit_t eq18_set_ci[0x00020]; /* EQ18_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved18[0x00020];
-/* -------------- */
- pseudo_bit_t eq19_set_ci[0x00020]; /* EQ19_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved19[0x00020];
-/* -------------- */
- pseudo_bit_t eq20_set_ci[0x00020]; /* EQ20_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved20[0x00020];
-/* -------------- */
- pseudo_bit_t eq21_set_ci[0x00020]; /* EQ21_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved21[0x00020];
-/* -------------- */
- pseudo_bit_t eq22_set_ci[0x00020]; /* EQ22_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved22[0x00020];
-/* -------------- */
- pseudo_bit_t eq23_set_ci[0x00020]; /* EQ23_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved23[0x00020];
-/* -------------- */
- pseudo_bit_t eq24_set_ci[0x00020]; /* EQ24_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved24[0x00020];
-/* -------------- */
- pseudo_bit_t eq25_set_ci[0x00020]; /* EQ25_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved25[0x00020];
-/* -------------- */
- pseudo_bit_t eq26_set_ci[0x00020]; /* EQ26_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved26[0x00020];
-/* -------------- */
- pseudo_bit_t eq27_set_ci[0x00020]; /* EQ27_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved27[0x00020];
-/* -------------- */
- pseudo_bit_t eq28_set_ci[0x00020]; /* EQ28_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved28[0x00020];
-/* -------------- */
- pseudo_bit_t eq29_set_ci[0x00020]; /* EQ29_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved29[0x00020];
-/* -------------- */
- pseudo_bit_t eq30_set_ci[0x00020]; /* EQ30_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved30[0x00020];
-/* -------------- */
- pseudo_bit_t eq31_set_ci[0x00020]; /* EQ31_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved31[0x00020];
-/* -------------- */
- pseudo_bit_t eq32_set_ci[0x00020]; /* EQ32_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved32[0x00020];
-/* -------------- */
- pseudo_bit_t eq33_set_ci[0x00020]; /* EQ33_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved33[0x00020];
-/* -------------- */
- pseudo_bit_t eq34_set_ci[0x00020]; /* EQ34_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved34[0x00020];
-/* -------------- */
- pseudo_bit_t eq35_set_ci[0x00020]; /* EQ35_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved35[0x00020];
-/* -------------- */
- pseudo_bit_t eq36_set_ci[0x00020]; /* EQ36_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved36[0x00020];
-/* -------------- */
- pseudo_bit_t eq37_set_ci[0x00020]; /* EQ37_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved37[0x00020];
-/* -------------- */
- pseudo_bit_t eq38_set_ci[0x00020]; /* EQ38_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved38[0x00020];
-/* -------------- */
- pseudo_bit_t eq39_set_ci[0x00020]; /* EQ39_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved39[0x00020];
-/* -------------- */
- pseudo_bit_t eq40_set_ci[0x00020]; /* EQ40_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved40[0x00020];
-/* -------------- */
- pseudo_bit_t eq41_set_ci[0x00020]; /* EQ41_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved41[0x00020];
-/* -------------- */
- pseudo_bit_t eq42_set_ci[0x00020]; /* EQ42_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved42[0x00020];
-/* -------------- */
- pseudo_bit_t eq43_set_ci[0x00020]; /* EQ43_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved43[0x00020];
-/* -------------- */
- pseudo_bit_t eq44_set_ci[0x00020]; /* EQ44_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved44[0x00020];
-/* -------------- */
- pseudo_bit_t eq45_set_ci[0x00020]; /* EQ45_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved45[0x00020];
-/* -------------- */
- pseudo_bit_t eq46_set_ci[0x00020]; /* EQ46_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved46[0x00020];
-/* -------------- */
- pseudo_bit_t eq47_set_ci[0x00020]; /* EQ47_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved47[0x00020];
-/* -------------- */
- pseudo_bit_t eq48_set_ci[0x00020]; /* EQ48_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved48[0x00020];
-/* -------------- */
- pseudo_bit_t eq49_set_ci[0x00020]; /* EQ49_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved49[0x00020];
-/* -------------- */
- pseudo_bit_t eq50_set_ci[0x00020]; /* EQ50_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved50[0x00020];
-/* -------------- */
- pseudo_bit_t eq51_set_ci[0x00020]; /* EQ51_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved51[0x00020];
-/* -------------- */
- pseudo_bit_t eq52_set_ci[0x00020]; /* EQ52_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved52[0x00020];
-/* -------------- */
- pseudo_bit_t eq53_set_ci[0x00020]; /* EQ53_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved53[0x00020];
-/* -------------- */
- pseudo_bit_t eq54_set_ci[0x00020]; /* EQ54_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved54[0x00020];
-/* -------------- */
- pseudo_bit_t eq55_set_ci[0x00020]; /* EQ55_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved55[0x00020];
-/* -------------- */
- pseudo_bit_t eq56_set_ci[0x00020]; /* EQ56_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved56[0x00020];
-/* -------------- */
- pseudo_bit_t eq57_set_ci[0x00020]; /* EQ57_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved57[0x00020];
-/* -------------- */
- pseudo_bit_t eq58_set_ci[0x00020]; /* EQ58_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved58[0x00020];
-/* -------------- */
- pseudo_bit_t eq59_set_ci[0x00020]; /* EQ59_Set_CI */
-/* -------------- */
- pseudo_bit_t reserved59[0x00020];