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authorH. Peter Anvin <hpa@zytor.com>2007-11-06 17:15:13 -0800
committerH. Peter Anvin <hpa@zytor.com>2007-11-06 17:15:13 -0800
commitfe66201fedd68a163946635e5db2ad937178f136 (patch)
treeb1a652cd0b5f324ca7603a42735eed4c6da06589 /bcopy32.inc
parent822a734c104b5d8e02c5804c11000440de357b49 (diff)
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Clean up the transition to PM for shuffle-and-boot-to-PM
Clean up the transition to PM for shuffle-and-boot-to-PM, and set LDTR and TR to keep Intel VT happy.
Diffstat (limited to 'bcopy32.inc')
-rw-r--r--bcopy32.inc16
1 files changed, 12 insertions, 4 deletions
diff --git a/bcopy32.inc b/bcopy32.inc
index 4df5e435..ad25ae71 100644
--- a/bcopy32.inc
+++ b/bcopy32.inc
@@ -528,18 +528,26 @@ shuffle_and_boot:
trampoline_to_pm:
cli
call enable_a20
+ mov byte [cs:bcopy_gdt.TSS+5],89h ; Mark TSS unbusy
o32 lgdt [cs:bcopy_gdt]
mov eax,cr0
or al,1
mov cr0,eax ; Enter protected mode
- jmp .next ; Near jump to synchronize on 386/486
-.next: mov ax,PM_DS32 ; 32-bit data segment selector
- mov es,ax
+ jmp PM_CS32:.next ; Synchronize and go to 32-bit mode
+
+ bits 32
+.next: xor ax,ax
+ lldt ax ; TR <- 0 to be nice to Intel VT
+ mov al,PM_TSS
+ ltr ax ; Bogus TSS to be nice to Intel VTeg
+ mov al,PM_DS32
+ mov es,ax ; 32-bit data segment selector
mov ds,ax
mov ss,ax
mov fs,ax
mov gs,ax
- jmp PM_CS32:TrampolineBuf
+ jmp word TrampolineBuf
+ bits 16
align 2
A20List dw a20_dunno, a20_none, a20_bios, a20_kbc, a20_fast