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-rw-r--r--com32/mboot/apm.c2
-rw-r--r--com32/mboot/initvesa.c2
-rw-r--r--com32/mboot/mem.c2
3 files changed, 6 insertions, 0 deletions
diff --git a/com32/mboot/apm.c b/com32/mboot/apm.c
index 3f48af7c..82b6b608 100644
--- a/com32/mboot/apm.c
+++ b/com32/mboot/apm.c
@@ -50,6 +50,7 @@ void mboot_apm(void)
return; /* 32 bits not supported */
/* Disconnect first, just in case */
+ memset(&ireg, 0, sizeof ireg);
ireg.eax.b[0] = 0x04;
__intcall(0x15, &ireg, &oreg);
@@ -68,6 +69,7 @@ void mboot_apm(void)
/* Redo the installation check as the 32-bit connect;
some BIOSes return different flags this way... */
+ memset(&ireg, 0, sizeof ireg);
ireg.eax.b[0] = 0x00;
__intcall(0x15, &ireg, &oreg);
diff --git a/com32/mboot/initvesa.c b/com32/mboot/initvesa.c
index bd869e3d..9111ec27 100644
--- a/com32/mboot/initvesa.c
+++ b/com32/mboot/initvesa.c
@@ -100,6 +100,7 @@ void set_graphics_mode(const struct multiboot_header *mbh,
while ((mode = *mode_ptr++) != 0xFFFF) {
mode &= 0x1FF; /* The rest are attributes of sorts */
+ memset(&rm, 0, sizeof rm);
memset(mi, 0, sizeof *mi);
rm.eax.w[0] = 0x4F01; /* Get SVGA mode information */
rm.ecx.w[0] = mode;
@@ -193,6 +194,7 @@ void set_graphics_mode(const struct multiboot_header *mbh,
mode = bestmode;
/* Now set video mode */
+ memset(&rm, 0, sizeof rm);
rm.eax.w[0] = 0x4F02; /* Set SVGA video mode */
mode |= 0x4000; /* Request linear framebuffer */
rm.ebx.w[0] = mode;
diff --git a/com32/mboot/mem.c b/com32/mboot/mem.c
index 6e3995bf..e42b70ba 100644
--- a/com32/mboot/mem.c
+++ b/com32/mboot/mem.c
@@ -124,6 +124,7 @@ static int mboot_scan_memory(struct AddrRangeDesc **ardp, uint32_t * dosmem)
ard[0].Type = 1;
/* Next try INT 15h AX=E801h */
+ memset(&ireg, 0, sizeof ireg);
ireg.eax.w[0] = 0xe801;
__intcall(0x15, &ireg, &oreg);
@@ -147,6 +148,7 @@ static int mboot_scan_memory(struct AddrRangeDesc **ardp, uint32_t * dosmem)
}
/* Finally try INT 15h AH=88h */
+ memset(&ireg, 0, sizeof ireg);
ireg.eax.w[0] = 0x8800;
if (!(oreg.eflags.l & EFLAGS_CF) && oreg.eax.w[0]) {
ard[1].size = 20;