aboutsummaryrefslogtreecommitdiffstats
path: root/com32/sysdump
diff options
context:
space:
mode:
authorErwan Velu <erwan@enovance.com>2014-01-22 23:57:12 +0100
committerErwan Velu <erwan@enovance.com>2014-01-22 23:57:12 +0100
commit3150c7839640859e8ec6ea0243002309e5f9c068 (patch)
tree275ff162a0252960548013afbe8ff7da7e9cffc0 /com32/sysdump
parent7a9978f280e1d291f6fac419e7c2a0178e9e5d6b (diff)
downloadsyslinux-3150c7839640859e8ec6ea0243002309e5f9c068.tar.gz
syslinux-3150c7839640859e8ec6ea0243002309e5f9c068.tar.xz
syslinux-3150c7839640859e8ec6ea0243002309e5f9c068.zip
com32sys_t inreg shall be zeroified prior intcall
As per commit f775e740a3a817a4ff5ba26bea99dbfd735456b3, inreg parameters of intcall() shall be zeroified. Having unclean inreg could trigger bad behaviors on some hosts. This patch is about adding memset() calls prior any intcall() : - some intcall didn't had any memset at all - some successive intcall() calls didn't memset inreg in between calls
Diffstat (limited to 'com32/sysdump')
-rw-r--r--com32/sysdump/memmap.c2
-rw-r--r--com32/sysdump/vesa.c1
2 files changed, 3 insertions, 0 deletions
diff --git a/com32/sysdump/memmap.c b/com32/sysdump/memmap.c
index 929873fe..48241a7a 100644
--- a/com32/sysdump/memmap.c
+++ b/com32/sysdump/memmap.c
@@ -72,10 +72,12 @@ void dump_memory_map(struct upload_backend *be)
__intcall(0x12, &ireg, &oreg);
cpio_writefile(be, "memmap/12", &oreg, sizeof oreg);
+ memset(&ireg, 0, sizeof ireg);
ireg.eax.b[1] = 0x88;
__intcall(0x15, &ireg, &oreg);
cpio_writefile(be, "memmap/1588", &oreg, sizeof oreg);
+ memset(&ireg, 0, sizeof ireg);
ireg.eax.w[0] = 0xe801;
__intcall(0x15, &ireg, &oreg);
cpio_writefile(be, "memmap/15e801", &oreg, sizeof oreg);
diff --git a/com32/sysdump/vesa.c b/com32/sysdump/vesa.c
index 42adc3da..3540fc44 100644
--- a/com32/sysdump/vesa.c
+++ b/com32/sysdump/vesa.c
@@ -41,6 +41,7 @@ void dump_vesa_tables(struct upload_backend *be)
mode_ptr = GET_PTR(gi.video_mode_ptr);
while ((mode = *mode_ptr++) != 0xFFFF) {
memset(mip, 0, sizeof *mip);
+ memset(&rm, 0, sizeof rm);
rm.eax.w[0] = 0x4F01; /* Get SVGA mode information */
rm.ecx.w[0] = mode;
rm.edi.w[0] = OFFS(mip);