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authorLaurent Licour <laurent@licour.com>2011-01-30 20:50:59 +0100
committerErwan Velu <erwanaliasr1@gmail.com>2011-01-30 20:50:59 +0100
commit813daa0f83959de7c1ece9381966905a538919db (patch)
treefe6fa1ad931ebb41e4a9da37610574721b74209a /com32/hdt
parent98d58026c4bf38e42adcfbd5f92da29fb582d41a (diff)
downloadsyslinux-813daa0f83959de7c1ece9381966905a538919db.tar.gz
syslinux-813daa0f83959de7c1ece9381966905a538919db.tar.xz
syslinux-813daa0f83959de7c1ece9381966905a538919db.zip
DMI: Adjusting structures size / Adding cpu core
This patch adds some correction of the dmi structures but also add the support of the cpu cores/threads.
Diffstat (limited to 'com32/hdt')
-rw-r--r--com32/hdt/hdt-cli-cpu.c6
-rw-r--r--com32/hdt/hdt-cli-dmi.c7
-rw-r--r--com32/hdt/hdt-menu-processor.c16
-rw-r--r--com32/hdt/hdt-menu-summary.c8
4 files changed, 35 insertions, 2 deletions
diff --git a/com32/hdt/hdt-cli-cpu.c b/com32/hdt/hdt-cli-cpu.c
index ca095a6c..6d764ce2 100644
--- a/com32/hdt/hdt-cli-cpu.c
+++ b/com32/hdt/hdt-cli-cpu.c
@@ -51,6 +51,8 @@ void main_show_cpu(int argc __unused, char **argv __unused,
more_printf(" Manufacturer : %s \n", hardware->cpu.vendor);
more_printf(" Product : %s \n", hardware->cpu.model);
more_printf(" CPU Cores : %d \n", hardware->cpu.num_cores);
+ if (hardware->dmi.processor.thread_count != 0)
+ more_printf(" CPU Threads : %d \n", hardware->dmi.processor.thread_count);
more_printf(" L2 Cache : %dK\n", hardware->cpu.l2_cache_size);
memset(features, 0, sizeof(features));
@@ -112,6 +114,10 @@ static void show_cpu(int argc __unused, char **argv __unused,
more_printf("Vendor : %s\n", hardware->cpu.vendor);
more_printf("Model : %s\n", hardware->cpu.model);
more_printf("CPU Cores : %d\n", hardware->cpu.num_cores);
+ if (hardware->dmi.processor.core_enabled != 0)
+ more_printf("CPU Enable: %d\n", hardware->dmi.processor.core_enabled);
+ if (hardware->dmi.processor.thread_count != 0)
+ more_printf("CPU Thread: %d \n", hardware->dmi.processor.thread_count);
more_printf("L1 Cache : %dK + %dK (I + D) \n",
hardware->cpu.l1_instruction_cache_size,
hardware->cpu.l1_data_cache_size);
diff --git a/com32/hdt/hdt-cli-dmi.c b/com32/hdt/hdt-cli-dmi.c
index 313445cd..45cbb240 100644
--- a/com32/hdt/hdt-cli-dmi.c
+++ b/com32/hdt/hdt-cli-dmi.c
@@ -350,6 +350,13 @@ static void show_dmi_cpu(int argc __unused, char **argv __unused,
more_printf(" Serial : %s\n", hardware->dmi.processor.serial);
more_printf(" Part Number : %s\n",
hardware->dmi.processor.part_number);
+ if (hardware->dmi.processor.core_count != 0)
+ more_printf(" Cores Count : %d\n", hardware->dmi.processor.core_count);
+ if (hardware->dmi.processor.core_enabled != 0)
+ more_printf(" Cores Enabled : %d\n", hardware->dmi.processor.core_enabled);
+ if (hardware->dmi.processor.thread_count != 0)
+ more_printf(" Threads Count : %d\n", hardware->dmi.processor.thread_count);
+
more_printf(" ID : %s\n", hardware->dmi.processor.id);
for (int i = 0; i < PROCESSOR_FLAGS_ELEMENTS; i++) {
if (((bool *) (&hardware->dmi.processor.cpu_flags))[i] == true) {
diff --git a/com32/hdt/hdt-menu-processor.c b/com32/hdt/hdt-menu-processor.c
index ad4a8bae..f28833b5 100644
--- a/com32/hdt/hdt-menu-processor.c
+++ b/com32/hdt/hdt-menu-processor.c
@@ -84,6 +84,22 @@ void compute_processor(struct s_my_menu *menu, struct s_hardware *hardware)
add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
menu->items_count++;
+ if (hardware->dmi.processor.core_enabled != 0) {
+ snprintf(buffer, sizeof buffer, "CPU Enable: %d", hardware->dmi.processor.core_enabled);
+ snprintf(statbuffer, sizeof statbuffer, "Number of CPU Enabled : %d",
+ hardware->dmi.processor.core_enabled);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+ }
+
+ if (hardware->dmi.processor.thread_count != 0) {
+ snprintf(buffer, sizeof buffer, "CPU Thread: %d", hardware->dmi.processor.thread_count);
+ snprintf(statbuffer, sizeof statbuffer, "Number of CPU Threads : %d",
+ hardware->dmi.processor.thread_count);
+ add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0);
+ menu->items_count++;
+ }
+
snprintf(buffer, sizeof buffer, "L1 Cache : %dK + %dK (I+D)",
hardware->cpu.l1_instruction_cache_size,
hardware->cpu.l1_data_cache_size);
diff --git a/com32/hdt/hdt-menu-summary.c b/com32/hdt/hdt-menu-summary.c
index d02f3c30..b9395559 100644
--- a/com32/hdt/hdt-menu-summary.c
+++ b/com32/hdt/hdt-menu-summary.c
@@ -54,8 +54,12 @@ void compute_summarymenu(struct s_my_menu *menu, struct s_hardware *hardware)
char features[SUBMENULEN + 1];
memset(features, 0, sizeof(features));
- sprintf(features, "%d cores, %dK L2 Cache", hardware->cpu.num_cores,
- hardware->cpu.l2_cache_size);
+ if (hardware->dmi.processor.thread_count != 0)
+ sprintf(buffer, ", %d thread", hardware->dmi.processor.thread_count);
+ else
+ buffer[0] = 0x00;
+ sprintf(features, "%d core%s, %dK L2 Cache", hardware->cpu.num_cores,
+ buffer, hardware->cpu.l2_cache_size);
if (hardware->cpu.flags.lm)
strcat(features, ", 64bit");
else