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* Return-Path: <meego-kernel-bounces@lists.meego.com>Alan Cox2010-12-131-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | X-Original-To: alan@linux.intel.com Delivered-To: alan@linux.intel.com Received: from orsmga001.jf.intel.com (orsmga001.jf.intel.com [10.7.209.18]) by linux.intel.com (Postfix) with ESMTP id E8FCC6A447F; Mon, 6 Dec 2010 16:31:39 -0800 (PST) Received: from orsmga102-1.jf.intel.com (HELO mga09.intel.com) ([10.7.208.27]) by orsmga001-1.jf.intel.com with ESMTP; 06 Dec 2010 16:31:39 -0800 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AtMAAKQO/UzQKylBmWdsb2JhbACVJo4SFQEBAQEBCAsKBxEivyGFSQSEX4UehAoJBQ X-IronPort-AV: E=Sophos;i="4.59,308,1288594800"; d="scan'208";a="843959646" Received: from mail.meego.com ([208.43.41.65]) by mtab.intel.com with ESMTP; 06 Dec 2010 16:27:57 -0800 Received: from localhost (localhost [127.0.0.1]) by mail.meego.com (Postfix) with ESMTP id 39CB910AFA6; Mon, 6 Dec 2010 16:27:57 -0800 (PST) X-Virus-Scanned: Debian amavisd-new at mail.moblin.org Received: from mail.meego.com ([127.0.0.1]) by localhost (mail.moblin.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JsoPdIdPFqdY; Mon, 6 Dec 2010 16:27:56 -0800 (PST) Received: from otc01.sl.ssgisp.com (localhost [127.0.0.1]) by mail.meego.com (Postfix) with ESMTP; Mon, 6 Dec 2010 16:27:56 -0800 (PST) X-Original-To: meego-kernel@meego.com Delivered-To: meego-kernel@meego.com Received: from localhost (localhost [127.0.0.1]) by mail.meego.com (Postfix) with ESMTP id C9BAD10AF9C for <meego-kernel@meego.com>; Mon, 6 Dec 2010 16:27:49 -0800 (PST) X-Virus-Scanned: Debian amavisd-new at mail.moblin.org Received: from mail.meego.com ([127.0.0.1]) by localhost (mail.moblin.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id a1KIaCGW2w+Y for <meego-kernel@meego.com>; Mon, 6 Dec 2010 16:27:46 -0800 (PST) Received: from mail.windriver.com (mail.windriver.com [147.11.1.11]) by mail.meego.com (Postfix) with ESMTP for <meego-kernel@meego.com>; Mon, 6 Dec 2010 16:27:45 -0800 (PST) Received: from ALA-MAIL03.corp.ad.wrs.com (ala-mail03 [147.11.57.144]) by mail.windriver.com (8.14.3/8.14.3) with ESMTP id oB70RjQB008851 for <meego-kernel@meego.com>; Mon, 6 Dec 2010 16:27:45 -0800 (PST) Received: from ala-mail06.corp.ad.wrs.com ([147.11.57.147]) by ALA-MAIL03.corp.ad.wrs.com with Microsoft SMTPSVC(6.0.3790.1830); Mon, 6 Dec 2010 16:27:45 -0800 Received: from localhost6.localdomain6 ([10.3.1.103]) by ala-mail06.corp.ad.wrs.com with Microsoft SMTPSVC(6.0.3790.1830); Mon, 6 Dec 2010 16:27:45 -0800 To: meego-kernel@meego.com From: Ken Lierman <ken.lierman@windriver.com> Date: Mon, 06 Dec 2010 16:30:08 -0800 Message-ID: <20101207003008.12500.61165.stgit@localhost6.localdomain6> User-Agent: StGit/0.15 MIME-Version: 1.0 X-OriginalArrivalTime: 07 Dec 2010 00:27:45.0487 (UTC) FILETIME=[919625F0:01CB95A5] Subject: [Meego-kernel] [PATCH] Change the clock divider to slow the polling X-BeenThere: meego-kernel@lists.meego.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: "MeeGo kernel discussions and patches." <meego-kernel.lists.meego.com> List-Unsubscribe: <http://lists.meego.com/options/meego-kernel>, <mailto:meego-kernel-request@lists.meego.com?subject=unsubscribe> List-Archive: <http://lists.meego.com/pipermail/meego-kernel> List-Post: <mailto:meego-kernel@lists.meego.com> List-Help: <mailto:meego-kernel-request@lists.meego.com?subject=help> List-Subscribe: <http://lists.meego.com/listinfo/meego-kernel>, <mailto:meego-kernel-request@lists.meego.com?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: meego-kernel-bounces@lists.meego.com Errors-To: meego-kernel-bounces@lists.meego.com On some hardware, getting double keys for single keypresses. Slow the clock slightly (rate requested by the customer) to avoid double key detects on formfactor hardware that has higher capacitance across the lines. Signed-off-by: Ken Lierman <ken.lierman@windriver.com>
* Medfield platform integration for TC35894XBG keypad controller.Charlie Paul2010-12-131-0/+188
| | | | Signed-off-by: Andy Ross <andy.ross@windriver.com>
* Driver for TC35894XBG keypad controllerCharlie Paul2010-12-105-0/+2329
| | | | Signed-off-by: Andy Ross <andy.ross@windriver.com>
* emc1403: added emc1423 supportJekyll Lai2010-12-102-10/+16
| | | | | | | | | | | emc1423 uses the similar register and adds a hardware shutdown pin to protect exceed temperature. This function is set by resistor; it's not necessary to do anything in the driver except add the emc1423 pid of 0x23. Signed-off-by: Jekyll Lai <jekyll_lai@wistron.com> [Updated Kconfig/comments and minor further changes asked for by the hwmon maintainers] Signed-off-by: Alan Cox <alan@linux.intel.com>
* There is a possiblity that the last word of a transaction will be lost ifMajor Lee2010-12-101-0/+5
| | | | | | | | | | | data is not ready. Re-read in poll_transfer() to solve this issue when poll_mode is enabled. Patch is against mainline (2.6.37-rc5). Verified on SPI touch screen device. Signed-off-by: Major Lee <major_lee@wistron.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Cleaned Nested LockingRamakrishna Pallala2010-12-091-22/+29
| | | | | Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Added Charger Type SupportRamakrishna Pallala2010-12-091-0/+10
| | | | | Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Emergency Call Charging FixRamakrishna Pallala2010-12-091-11/+17
| | | | | Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* x86, mrst: Some drivers need to known when an SCU is availableAlan Cox2010-12-092-1/+29
| | | | | | | | | | Add a notifier so that drivers can hook into SCU availability in order to take actions post initialisation when/if the SCU becomes available. In the ideal world we wouldn't need this and we could avoid any init dependancies of this form, but in practice we can't do it for some cases. Signed-off-by: Alan Cox <alan@linux.intel.com>
* Added Support for SW Charge TerminationRamakrishna Pallala2010-12-091-36/+189
| | | | | | | | | | Check_charge_full function is added to determine the charge full condition. Added a function calculate the charge cycles. Temperature based charging worker is modified according to support SW charge termination and maintenance charging. Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Added Support for Fuel GaugingRamakrishna Pallala2010-12-091-6/+190
| | | | | | | | | | To support fuel gauging Energy now, Energy full, charge counter and capacity level Sysfs Interfaces are added to driver. A table is added to look up voltage against charge. Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Added Support for status monitoringRamakrishna Pallala2010-12-091-85/+163
| | | | | | | | | | | Added a worker function to monitor status if any fault conditions like Over Voltage, Over Temperature, etc.. happens. Removed most of the code from threaded IRQ function and improved exception handling code. Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Added support for Emergency call ChargingRamakrishna Pallala2010-12-091-0/+103
| | | | | | | | | | Added a sysfs interface for enabling/disabling Emergency call support. During the charge cycle depending on the temperature and emergency charge enablement parameters we set the current limit value accordingly. Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Register Initialization and conversion of coulombs to amphrsRamakrishna Pallala2010-12-091-20/+66
| | | | | | | | | | cc_to_coloumbs/ msic_get_charge_now functions are added to return charge in mAhrs. Init_msic_regs function modified to add two more registers initialization. Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Intel MID I2S fix i2s_int to avoid Fabric Error When runtime_pm is ON.Selma Bensaid2010-12-091-3/+3
| | | | | | | | In function i2s_int, the read of the SSR register has to be performed only if the SSP is not SUSPENDED. Signed-off-by: Selma Bensaid <selma.bensaid@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Intel MID I2S set the SSP0/SSP1 in supsended state after bootSelma Bensaid2010-12-091-2/+1
| | | | | | | | In the function intel_mid_i2s_probe the pm_runtime functions are not called in the right order so SSP0 and SSP1 are not suspended after probe. Signed-off-by: Selma Bensaid <selma.bensaid@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* Intel MID I2S: improve intel_mid_i2s_flush by removing unnecessary dev_warnSelma Bensaid2010-12-091-2/+1
| | | | | | | | When Intel MID I2S is flushing the SSP due to de-synchronization with the Modem we observed a lot of unnecessary logs Signed-off-by: Selma Bensaid <selma.bensaid@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* intel_mid: Medfield battery driver tidy upAlan Cox2010-12-093-258/+218
| | | | | | | | | - Fix kfifo build problem - Clean up printing to debug level for the most part - Remove an impossible NULL check - Clean up all the ipc writing loops using a single helper Signed-off-by: Alan Cox <alan@linux.intel.com>
* intel_mid: Intel MSIC battery driverRamakrishna Pallala2010-12-093-0/+2166
| | | | | | | Battery driver for the Intel MID platform devices based on the Medfield chipset. Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
* usb: penwell_otg: put back PHY to normal mode before charger detectionHao Wu2010-12-091-0/+2
| | | | | | | This patch puts PHY back to normal mode before access MSIC register for charger detection. This fixed issue, boot up with connected to PC case. Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: langwell_udc: add runtime pm support for otgJiebing Li2010-12-091-0/+77
| | | | | | | This patch enables runtime pm support for langwell_udc controller driver. Signed-off-by: Jiebing Li <jiebing.li@intel.com> Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: langwell_udc: add runtime pm support for otgHao Wu2010-12-091-18/+98
| | | | | | | This patch contains update on transceiver driver interfaces. Mainly to support runtime pm for OTG. Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: core: add runtime pm support for Intel Medfield platformAndy Luo2010-12-091-7/+22
| | | | | | | This patch enables runtime pm support for usb host driver Signed-off-by: Andy Luo <yifei.luo@intel.com> Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: ehci-langwell-pci: add transceiver driver interface for runtime pmHao Wu2010-12-091-1/+46
| | | | | | | This patch adds transceiver driver interface for runtime pm, in order to support OTG case. Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: penwell_otg: add runtime pm supportHao Wu2010-12-092-21/+162
| | | | | | Add runtime pm support in penwell_otg transceiver driver. Signed-off-by: Hao Wu <hao.wu@intel.com>
* Moorestown platform uses IPC commands to perform power off andJacob Pan2010-12-092-1/+23
| | | | | | | | | reboot action, based on the IPC command FW will take different boot path. Signed-off-by: Alek Du <alek.du@intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* sst: Fix for dmic capture on v2 pmicHarsha Priya2010-12-091-1/+4
| | | | | | | | | Currently capture through dmic captures only silence This patch configurs the dmic registers to capture properly Signed-off-by: Harsha Priya <priya.harsha@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* x86/mrst: set vRTC's IRQ to level trigger typeFeng Tang2010-12-091-1/+1
| | | | | | | | | | | | | | | When setting up the mpc_intsrc structure for vRTC's IRQ, we need to set its irqflag to level trigger, otherwise it will taken as edge triggered and cause the issue that vRTC can only fire IRQ once, as there is never a EOI issued from IA core for it. The original code worked in previous kernel is because it was configured to level trigger type by luck, as it falled into default PCI's trigger categary which is level trigger. Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* x86, apbt: setup affinity for apb timers acting as per-cpu timerFeng Tang2010-12-091-0/+1
| | | | | Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* x86, mrst: change the pmic_gpio device type to IPCFeng Tang2010-12-091-0/+1
| | | | | | | | In latest firmware's SFI tables, pmic_gpio has been set to IPC type of device, so we need handle it too. Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* langwell_gpio: modify EOI handling following change of kernel irq subsystemFeng Tang2010-12-091-1/+10
| | | | | | | | | Latest kernel has many changes in IRQ subsystem and its interfaces, like adding "irq_eoi" for struct irq_chip, this patch will make it support both the new and old interface. Cc: Alek Du <alek.du@intel.com> Signed-off-by: Feng Tang <feng.tang@intel.com>
* intel_pmic_gpio: modify EOI handling following change of kernel irq subsystemFeng Tang2010-12-091-1/+9
| | | | | | | | | Latest kernel has many changes in IRQ subsystem and its interfaces, like adding "irq_eoi" for struct irq_chip, this patch will make it support both the new and old interface. Cc: Alek Du <alek.du@intel.com> Signed-off-by: Feng Tang <feng.tang@intel.com>
* ALSA SSP Driver: ALSA sound card for TI WL1273 Chip (BT/FM/WLAN)Selma Bensaid2010-12-097-0/+1530
| | | | | | | | | | | | | | | | | | This sound card handles 2 PCM devices - BT PCM device which support 1 capture substream and 1 playback substream (8KHz, mono, 16 bits/sample) - FM device which support 1 capture substream only (the FM TX is not supported) (48KHz, stereo, 16bits/sample) These 2 PCM devices are exclusive (i.e FM and BT substreams cannot run in parallel) The ALSA SSP driver interfaces with Intel MID I2S driver to configure the SSP peripheral according to PCM device's settings and to send/receive PCM samples. Signed-off-by: Selma Bensaid <selma.bensaid@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* usb: fixup missing size field for non transceiver buildAlan Cox2010-12-091-0/+1
| | | | Signed-off-by: Alan Cox <alan@linux.intel.com>
* usb: langwell_udc: add HighSpeed/FullSpeed events notificationHao Wu2010-12-091-2/+14
| | | | | | | | | | It adds notification to Intel Penwell otg transceiver driver for HighSpeed/FullSpeed. This change mainly to support battery charging current negotiation for Charging Downstream Port(CDP) case. USB OTG Transceiver driver will notify battery driver about charging current limitation change according to different Speed Mode (HS/FS). Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: penwell_otg: add charging current negotiation and notification supportHao Wu2010-12-093-71/+417
| | | | | | | | | | | This patch adds charging current negotiation in Transceiver driver for SDP/CDP/DCP cases and it also provides notification/query interfaces to Battery driver for charging current information notification. *It requires device controller/gadget driver modification to fully support SDP/CDP cases. Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: penwell_otg: add USB charger detectionHao Wu2010-12-092-32/+291
| | | | | | | | | | This patch enables penwell USB OTG Transceiver driver USB Charger Detection support. It can detect different types of USB charger based on MSIC. SDP (Standard Downstream Port - USB Host port charger), DCP (Dedicated Charging Port - USB Wall charger), CDP (Charging Downstream Port - Special USB Host port charger). Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: penwell_otg: Add Intel Penwell USB OTG Transceiver driverHao Wu2010-12-094-0/+2620
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Description This driver tries to implement host/device role switch according to OTG 2.0 spec on MFLD. The actual host and device functions are accomplished in modified EHCI driver and Intel Penwell USB OTG device controller driver. This is the first version and it only support Host Peripheral role switch per different USB cable. Development work is still on going, more features will be submitted soon after verified. Dependency CONFIG_INTEL_SCU_IPC - IPC driver. Enable driver in Kernel "Device Drivers" ---> "USB support" ---> "Intel Penwell USB OTG dual-role support" Kernel configs CONFIG_INTEL_SCU_IPC=y CONFIG_USB=y CONFIG_USB_OTG=y CONFIG_USB_OTG_UTILS=y CONFIG_PENWELL_OTG=y Todo List USB Charging Support Power management (runtime) MHL-USB coexistence HNP/HNP Polling/SRP ADP(Attach Detection Protocol) Support Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: ehci-pci: add Intel Penwell USB Host Power budget limitationHao Wu2010-12-091-0/+5
| | | | | | | Intel Penwell USB Host only can provide 200mA via its OTG port. so add power budget limitaition for power supply safety on OTG port. Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: langwell_udc: set vbus_active flag according to stateHao Wu2010-12-091-4/+20
| | | | | | | | This patch adds active bit setting in order to avoid issues with composite gadget on pullup functions which query on this bit. Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: langwell_udc: enable PHY Low Power Mode for PenwellJiebing Li2010-12-091-12/+6
| | | | | | | This patch enables PHY Low Power mode to save power for Penwell case. Signed-off-by: Jiebing Li <jiebing.li@intel.com> Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: langwell_udc: add Intel Penwell USB Device Controller supportJiebing Li2010-12-094-40/+18
| | | | | | | | | Add Intel Penwell USB Device Controller Support in langwell_udc driver. This driver will support both langwell/penwell USB Device controller with this patch. Signed-off-by: JiebingLi <jiebing.li@intel.com> Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: ehci-pci: Support Intel Medfield Platform USB OTG HostHao Wu2010-12-092-3/+3
| | | | | | | This patch enables EHCI USB host function for Intel Medfield Platform USB OTG host function. Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: langwell_otg: use simple IPC command to control VBus powerHao Wu2010-12-091-37/+11
| | | | | | | | | | | | | Direct access to PMIC register is not safe and will impact battery charging. New IPC command supported in SCU FW for VBus power control. USB OTG driver will switch to such commands instead of direct access to PMIC register for safety and SCU FW will handle the actual work after got the request(IPC command). Due to this change, usb driver should wait more time for sync OTGSC with USBCFG by SCU. Update wait time from 2ms to 5ms. Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: ehci-langwell-pci: support common OTG data structure for Intel MID platformHao Wu2010-12-092-48/+119
| | | | | | | | | | | | | | | This patch modified ehci host pci controller driver for langwell, support common OTG data structure for Intel MID platform. Main changes: - Update OTG related data structure. - Provide start_host/stop_host function to transceiver. - Provide register/unregister function. modified: drivers/usb/host/ehci-hcd.c modified: drivers/usb/host/ehci-langwell-pci.c Signed-off-by: Hao Wu <hao.wu@intel.com>
* ehci: Support Intel Moorestown EHCI controller SRAM QH/QTD/ITD/SITD pool cachingJacob Pan2010-12-095-9/+64
| | | | | | | | | | | | The Intel Moorestown platform has MPH and OTG EHCI controllers that have internal SRAM that could be used as descriptors DMA pool caching. The SRAM is exposed via PCI BAR1. The limitation here is the SRAM access should be 32bit aligned. A separate patch "EHCI: Make ehci_qh structure items all 32bit aligned" has been submitted to linux-usb mailling list. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: Alek Du <alek.du@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* ehci: Support for Intel Moorestown MPH and OTG hostAlek Du2010-12-098-3/+262
| | | | | | | | | | | | The Intel Moorestown platform has EHCI MPH and EHCI OTG host. This patch adds PCI probe part for them. The HNP part and SRAM part will be added in another patch. This patch depends on the OTG transceive and OTG client patch from Hang Yuan that should be accepted already. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: Alek Du <alek.du@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Hao Wu <hao.wu@intel.com>
* usb: langwell_udc: use common OTG data structure for Intel MID platformHao Wu2010-12-092-54/+132
| | | | | | | | | | | | | | | This patch provided the support to common OTG data structure. Main changes: - Notify otg related events using notifier and remove direct access to otg data structure(state machine). - Provide start_peripheral/stop_peripheral function to transceiver. - Provide client register/unregister function. modified: drivers/usb/gadget/langwell_udc.c modified: drivers/usb/gadget/langwell_udc.h Signed-off-by: Hao Wu <hao.wu@intel.com>
* i2c-intel-mid: I2C FIFO buffer size setting and fragmentationMajor Lee2010-12-091-49/+46
| | | | | | | | | | | | | The FIFO buffer size is different with different CPU stepping. Define it as 32-byte; it is safe for all CPU stepping. There is a problem when xfer size is greater then FIFO buffer size. Implement software fragmentation in host bus driver so that the I²C slave device drivers need not to be modified or to know about the limits. Signed-off-by: Major Lee <major_lee@wistron.com> Signed-off-by: Alan Cox <alan@linux.intel.com>
* x86, early_printk: fix a typo for Intel MID early consolesAlan Cox2010-12-091-1/+1
| | | | | Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com>