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-rw-r--r--arch/arm/plat-s5p/irq.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
index eada40d0847..11535a5f534 100644
--- a/arch/arm/plat-s5p/irq.c
+++ b/arch/arm/plat-s5p/irq.c
@@ -25,9 +25,6 @@
#include <plat/irq-vic-timer.h>
#include <plat/irq-uart.h>
-#define VIC_VAADDR(no) (S5P_VA_VIC0 + ((no)*0x10000))
-#define VIC_BASE(no) (S5P_VIC0_BASE + ((no)*32))
-
/*
* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
* are consecutive when looking up the interrupt in the demux routines.
@@ -61,7 +58,7 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
/* initialize the VICs */
for (irq = 0; irq < num_vic; irq++)
- vic_init(VIC_VAADDR(irq), VIC_BASE(irq), vic[irq], 0);
+ vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);