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authorAxel Lin <axel.lin@gmail.com>2010-11-24 10:21:54 +0800
committerMark Brown <broonie@opensource.wolfsonmicro.com>2010-11-24 11:22:44 +0000
commit2f7dceeda4708f470fd927adb3861bd8ebbe2310 (patch)
tree5c11b5b659e52997a56d9acc2fe7fd1ec2bb3c83 /sound
parent08b1a38465cab8c2224a5202c7a3b5e5f5630894 (diff)
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ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <= 16500000
MCLKDIV bit of Register 04h Clocking1: 0 : Divide by 1 1 : Divide by 2 Thus in the case of freq <= 16500000, we should clear MCLKDIV bit. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@kernel.org
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/wm8961.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/codecs/wm8961.c b/sound/soc/codecs/wm8961.c
index 93fecf5f94c..8340485c985 100644
--- a/sound/soc/codecs/wm8961.c
+++ b/sound/soc/codecs/wm8961.c
@@ -736,7 +736,7 @@ static int wm8961_set_sysclk(struct snd_soc_dai *dai, int clk_id,
freq /= 2;
} else {
dev_dbg(codec->dev, "Using MCLK/1 for %dHz MCLK\n", freq);
- reg &= WM8961_MCLKDIV;
+ reg &= ~WM8961_MCLKDIV;
}
snd_soc_write(codec, WM8961_CLOCKING1, reg);