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authorJacob Pan <jacob.jun.pan@linux.intel.com>2010-11-09 13:57:29 +0000
committerChris Ball <cjb@laptop.org>2010-11-09 09:33:24 -0500
commit35ac6f081f26e1b6b3482b9c8dfccebe7817c691 (patch)
treefbfbac505f0464d4fb28e107dbb6a19adc9c8ec2 /include
parent16a790bcce87740d219b7227eaa4df72804097ea (diff)
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mmc: sdhci: Fix crash on boot with C0 stepping Moorestown platforms
SDHC2 is newly added in C0 stepping of Langwell. Without the Moorestown specific quirk, the default pci_probe will be called and crash the kernel. This patch unblocks the crash problem on C0 by using the same probing function as HC1, which limits the number of slots to one. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index c6bcfe93b9c..d369b533dc2 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2441,6 +2441,7 @@
#define PCI_DEVICE_ID_INTEL_MFD_SDIO2 0x0822
#define PCI_DEVICE_ID_INTEL_MFD_EMMC0 0x0823
#define PCI_DEVICE_ID_INTEL_MFD_EMMC1 0x0824
+#define PCI_DEVICE_ID_INTEL_MRST_SD2 0x084F
#define PCI_DEVICE_ID_INTEL_I960 0x0960
#define PCI_DEVICE_ID_INTEL_I960RM 0x0962
#define PCI_DEVICE_ID_INTEL_8257X_SOL 0x1062