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authorDivy Le Ray <divy@chelsio.com>2009-05-29 12:52:44 +0000
committerDavid S. Miller <davem@davemloft.net>2009-05-29 15:55:04 -0700
commit744514249f0656e2d50bb57585241670c2d4f32b (patch)
treef95275ec6dca4be204bdf43df8fce94aba1dc920 /drivers/net/cxgb3/t3_hw.c
parentc3a8c5b644118b5e2cfd0690b1dcea904a792c52 (diff)
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cxgb3: Add Aeluros 2020 phy support
Add support for the AEL2020 phy. Add PCI IDs of the boards using this phy. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/cxgb3/t3_hw.c')
-rw-r--r--drivers/net/cxgb3/t3_hw.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
index fc7db8a9ba8..766314c91d8 100644
--- a/drivers/net/cxgb3/t3_hw.c
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -526,6 +526,11 @@ static const struct adapter_info t3_adap_info[] = {
F_GPIO10_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
{ S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
&mi1_mdio_ext_ops, "Chelsio T310" },
+ {1, 0, 0,
+ F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN |
+ F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL,
+ { S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
+ &mi1_mdio_ext_ops, "Chelsio N320E-G2" },
};
/*
@@ -552,6 +557,8 @@ static const struct port_type_info port_types[] = {
{ t3_qt2045_phy_prep },
{ t3_ael1006_phy_prep },
{ NULL },
+ { NULL },
+ { t3_ael2020_phy_prep },
};
#define VPD_ENTRY(name, len) \