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authorSathya Perla <sathyap@serverengines.com>2009-07-01 01:06:07 +0000
committerDavid S. Miller <davem@davemloft.net>2009-07-03 20:09:45 -0700
commitc001c213b109c8baeeb6d012b422bf059b18368f (patch)
treeeb9c551c9f84fe1a7fbaa8d15866200aa76e98f1 /drivers/net/benet/be_hw.h
parent7d3cabbcc86f7f69c47cb20c23ee84350ae6cfbb (diff)
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be2net: fix spurious interrupt handling in intx mode
Occasionally we may see an interrupt without an event in the eq. In intx, we currently see the event queue and return IRQ_NONE causing a the irq to be disabled ("no one cared".) Instead, read the CEV_ISR reg to check the existence of the interrupt. Signed-off-by: Sathya Perla <sathyap@serverengines.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/benet/be_hw.h')
-rw-r--r--drivers/net/benet/be_hw.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/benet/be_hw.h b/drivers/net/benet/be_hw.h
index b02e805c1db..29c33c709c6 100644
--- a/drivers/net/benet/be_hw.h
+++ b/drivers/net/benet/be_hw.h
@@ -55,6 +55,10 @@
#define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK 0x7 /* bits 26 - 28 */
#define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT 26
+/********* ISR0 Register offset **********/
+#define CEV_ISR0_OFFSET 0xC18
+#define CEV_ISR_SIZE 4
+
/********* Event Q door bell *************/
#define DB_EQ_OFFSET DB_CQ_OFFSET
#define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */