aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mtd/chips
diff options
context:
space:
mode:
authorGuillaume LECERF <glecerf@gmail.com>2010-04-24 17:58:27 +0200
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-05-14 01:39:43 +0100
commit5a0563f0ad0c9864b735e9ae23e55f7fa9c73bf5 (patch)
treeae4bf49ea99726a95134a411982391b604a7b97a /drivers/mtd/chips
parent83dcd3bb1139060fedb15235f8614d2bac82e18d (diff)
downloadmrst-s0i3-test-5a0563f0ad0c9864b735e9ae23e55f7fa9c73bf5.tar.gz
mrst-s0i3-test-5a0563f0ad0c9864b735e9ae23e55f7fa9c73bf5.tar.xz
mrst-s0i3-test-5a0563f0ad0c9864b735e9ae23e55f7fa9c73bf5.zip
mtd: cfi_cmdset_0002: add CFI detection for SST 39VF{32, 64}xxB chips
This patch adds support for detecting SST 39VF32xxB and 39VF64xxB chips in CFI mode. Signed-off-by: Guillaume LECERF <glecerf@gmail.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/chips')
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0002.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index b7d821d6183..0e21b098248 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -283,6 +283,17 @@ static void fixup_sst39vf(struct mtd_info *mtd, void *param)
cfi->addr_unlock2 = 0x2AAA;
}
+static void fixup_sst39vf_rev_b(struct mtd_info *mtd, void *param)
+{
+ struct map_info *map = mtd->priv;
+ struct cfi_private *cfi = map->fldrv_priv;
+
+ fixup_old_sst_eraseregion(mtd);
+
+ cfi->addr_unlock1 = 0x555;
+ cfi->addr_unlock2 = 0x2AA;
+}
+
static void fixup_s29gl064n_sectors(struct mtd_info *mtd, void *param)
{
struct map_info *map = mtd->priv;
@@ -311,6 +322,10 @@ static struct cfi_fixup cfi_nopri_fixup_table[] = {
{ CFI_MFR_SST, 0x234B, fixup_sst39vf, NULL, }, // SST39VF1601
{ CFI_MFR_SST, 0x235A, fixup_sst39vf, NULL, }, // SST39VF3202
{ CFI_MFR_SST, 0x235B, fixup_sst39vf, NULL, }, // SST39VF3201
+ { CFI_MFR_SST, 0x235C, fixup_sst39vf_rev_b, NULL, }, // SST39VF3202B
+ { CFI_MFR_SST, 0x235D, fixup_sst39vf_rev_b, NULL, }, // SST39VF3201B
+ { CFI_MFR_SST, 0x236C, fixup_sst39vf_rev_b, NULL, }, // SST39VF6402B
+ { CFI_MFR_SST, 0x236D, fixup_sst39vf_rev_b, NULL, }, // SST39VF6401B
{ 0, 0, NULL, NULL }
};