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authorH. Peter Anvin <hpa@linux.intel.com>2010-12-07 14:06:24 -0800
committerH. Peter Anvin <hpa@linux.intel.com>2010-12-14 10:48:41 -0800
commit3e38142b237ab1c79e2ef3dafbd1eaf52219ba41 (patch)
treeab737d56238bab7b2d836962877ae3d2dd7faece /drivers/idle/mrst_s0i3_asm.S
parent039babf20aa5c4a9976e63d0f57e06aacfcd7b36 (diff)
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s0i3: add support for putting the secondary thread back into C6
We need to SIPI the secondary thread just in order to put it back into C6, in order for S0i3 to be possible again. Sigh. Note: this really should be done on top of the unified trampoline patchset; that will cut the number of lines roughly in half. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'drivers/idle/mrst_s0i3_asm.S')
-rw-r--r--drivers/idle/mrst_s0i3_asm.S29
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/idle/mrst_s0i3_asm.S b/drivers/idle/mrst_s0i3_asm.S
index 4561a53c347..1482bf78416 100644
--- a/drivers/idle/mrst_s0i3_asm.S
+++ b/drivers/idle/mrst_s0i3_asm.S
@@ -18,6 +18,7 @@
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*/
+#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/asm.h>
#include <asm/msr-index.h>
@@ -203,6 +204,34 @@ ENTRY(mrst_s0i3_resume)
ret
ENDPROC(mrst_s0i3_resume)
+/*
+ * Simple loop in C6 MWAIT
+ */
+ __INITRODATA
+ .code16
+ .balign 64
+ENTRY(s0i3_trampoline_data)
+r_base = .
+1:
+ movl $(dummy_mem - r_base), %eax
+ clflush (%eax)
+
+ xorl %edx, %edx
+ xorl %ecx, %ecx
+ monitor
+
+ movl $MRST_C6_HINTS_EAX, %eax
+ xorl %ecx, %ecx /* No wakeups necessary or wanted */
+ mwait
+ jmp 1b
+
+ .balign 64
+ /* One cache line of otherwise unused memory */
+dummy_mem:
+ .space 64
+END(s0i3_trampoline_data)
+ENTRY(s0i3_trampoline_data_end)
+
.bss
.balign 4
mrst_s0i3_resume_stack: