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authorAlex Deucher <alexdeucher@gmail.com>2010-04-09 15:31:56 -0400
committerDave Airlie <airlied@redhat.com>2010-04-19 13:52:43 +1000
commita1a4b23b66039c814c3d3a9a28d76d34800eadc5 (patch)
tree1afffa74a688a00c078bcb31dce64941c8bc9ea0 /drivers/gpu/drm
parent08d075116db3592db218bfe0f554cd93c9e12505 (diff)
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drm/radeon/kms: adjust pll settings for tv
May fix fdo bug 26582. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index fd4ef6d1884..a87990b3ae8 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -521,6 +521,10 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
/* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)
adjusted_clock = mode->clock * 2;
+ if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
+ pll->algo = PLL_ALGO_LEGACY;
+ pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER;
+ }
} else {
if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;