aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/dma/ioat/dma_v3.c
diff options
context:
space:
mode:
authorDan Williams <dan.j.williams@intel.com>2009-09-08 17:43:02 -0700
committerDan Williams <dan.j.williams@intel.com>2009-09-08 17:43:02 -0700
commite3232714d465c42ac631929b990f5e35e2d8a955 (patch)
treef6b9fe66bd11cdae420f558bebf7e8d4b89b52b4 /drivers/dma/ioat/dma_v3.c
parentb265b11fc1a0bd6ae5a7fde12e374583a52ab326 (diff)
downloadmrst-s0i3-test-e3232714d465c42ac631929b990f5e35e2d8a955.tar.gz
mrst-s0i3-test-e3232714d465c42ac631929b990f5e35e2d8a955.tar.xz
mrst-s0i3-test-e3232714d465c42ac631929b990f5e35e2d8a955.zip
ioat3: segregate raid engines
The cleanup routine for the raid cases imposes extra checks for handling raid descriptors and extended descriptors. If the channel does not support raid it can avoid this extra overhead by using the ioat2 cleanup path. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioat/dma_v3.c')
-rw-r--r--drivers/dma/ioat/dma_v3.c25
1 files changed, 18 insertions, 7 deletions
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index ff4afdc8e59..3686dddf6bf 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -1117,30 +1117,25 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
struct dma_device *dma;
struct dma_chan *c;
struct ioat_chan_common *chan;
+ bool is_raid_device = false;
int err;
u16 dev_id;
u32 cap;
device->enumerate_channels = ioat2_enumerate_channels;
- device->cleanup_tasklet = ioat3_cleanup_tasklet;
- device->timer_fn = ioat3_timer_event;
device->self_test = ioat3_dma_self_test;
dma = &device->common;
dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy_lock;
dma->device_issue_pending = ioat2_issue_pending;
dma->device_alloc_chan_resources = ioat2_alloc_chan_resources;
dma->device_free_chan_resources = ioat2_free_chan_resources;
- dma->device_is_tx_complete = ioat3_is_complete;
dma_cap_set(DMA_INTERRUPT, dma->cap_mask);
dma->device_prep_dma_interrupt = ioat3_prep_interrupt_lock;
cap = readl(device->reg_base + IOAT_DMA_CAP_OFFSET);
- if (cap & IOAT_CAP_FILL_BLOCK) {
- dma_cap_set(DMA_MEMSET, dma->cap_mask);
- dma->device_prep_dma_memset = ioat3_prep_memset_lock;
- }
if (cap & IOAT_CAP_XOR) {
+ is_raid_device = true;
dma->max_xor = 8;
dma->xor_align = 2;
@@ -1151,6 +1146,7 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
dma->device_prep_dma_xor_val = ioat3_prep_xor_val;
}
if (cap & IOAT_CAP_PQ) {
+ is_raid_device = true;
dma_set_maxpq(dma, 8, 0);
dma->pq_align = 2;
@@ -1171,6 +1167,21 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
dma->device_prep_dma_xor_val = ioat3_prep_pqxor_val;
}
}
+ if (is_raid_device && (cap & IOAT_CAP_FILL_BLOCK)) {
+ dma_cap_set(DMA_MEMSET, dma->cap_mask);
+ dma->device_prep_dma_memset = ioat3_prep_memset_lock;
+ }
+
+
+ if (is_raid_device) {
+ dma->device_is_tx_complete = ioat3_is_complete;
+ device->cleanup_tasklet = ioat3_cleanup_tasklet;
+ device->timer_fn = ioat3_timer_event;
+ } else {
+ dma->device_is_tx_complete = ioat2_is_complete;
+ device->cleanup_tasklet = ioat2_cleanup_tasklet;
+ device->timer_fn = ioat2_timer_event;
+ }
/* -= IOAT ver.3 workarounds =- */
/* Write CHANERRMSK_INT with 3E07h to mask out the errors