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authorColin Cross <ccross@android.com>2010-06-24 18:57:00 -0700
committerColin Cross <ccross@android.com>2010-10-21 18:12:22 -0700
commit8486bddc09c84606fb22cf30c6282335275d4dfa (patch)
tree0b0514b1ad8ce36b13f3871a9d15935ef419adb1 /arch/arm/mach-tegra/common.c
parent71fc84cc35ee05913306bfe6e2454cdfc5bf7081 (diff)
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[ARM] tegra: common: Update common clock init table
Renames clocks in the clock init table to match the datasheet names Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/mach-tegra/common.c')
-rw-r--r--arch/arm/mach-tegra/common.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 9aedaf77013..445104a993b 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -36,8 +36,8 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
{ "pll_p_out2", "pll_p", 48000000, true },
{ "pll_p_out3", "pll_p", 72000000, true },
{ "pll_p_out4", "pll_p", 108000000, true },
- { "sys", "pll_p_out4", 108000000, true },
- { "hclk", "sys", 108000000, true },
+ { "sclk", "pll_p_out4", 108000000, true },
+ { "hclk", "sclk", 108000000, true },
{ "pclk", "hclk", 54000000, true },
{ NULL, NULL, 0, 0},
};