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authorGreg Kroah-Hartman <gregkh@suse.de>2010-10-28 09:44:56 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2010-10-28 09:44:56 -0700
commite4c5bf8e3dca827a1b3a6fac494eae8c74b7e1e7 (patch)
treeea51b391f7d74ca695dcb9f5e46eb02688a92ed9
parent81280572ca6f54009edfa4deee563e8678784218 (diff)
parenta4ac0d847af9dd34d5953a5e264400326144b6b2 (diff)
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Merge 'staging-next' to Linus's tree
This merges the staging-next tree to Linus's tree and resolves some conflicts that were present due to changes in other trees that were affected by files here. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--Documentation/ABI/testing/sysfs-block-zram99
-rw-r--r--Documentation/filesystems/00-INDEX2
-rw-r--r--Documentation/ioctl/ioctl-number.txt2
-rw-r--r--MAINTAINERS14
-rw-r--r--arch/arm/mach-omap2/Makefile4
-rw-r--r--arch/arm/mach-omap2/dsp.c85
-rw-r--r--arch/arm/plat-omap/common.c2
-rw-r--r--arch/arm/plat-omap/devices.c70
-rw-r--r--arch/arm/plat-omap/include/plat/dsp.h31
-rw-r--r--drivers/misc/Kconfig1
-rw-r--r--drivers/misc/Makefile1
-rw-r--r--drivers/misc/ti-st/Kconfig17
-rw-r--r--drivers/misc/ti-st/Makefile6
-rw-r--r--drivers/misc/ti-st/st_core.c (renamed from drivers/staging/ti-st/st_core.c)91
-rw-r--r--drivers/misc/ti-st/st_kim.c (renamed from drivers/staging/ti-st/st_kim.c)32
-rw-r--r--drivers/misc/ti-st/st_ll.c (renamed from drivers/staging/ti-st/st_ll.c)7
-rw-r--r--drivers/staging/Kconfig28
-rw-r--r--drivers/staging/Makefile15
-rw-r--r--drivers/staging/adis16255/adis16255.c4
-rw-r--r--drivers/staging/ath6kl/Kconfig163
-rw-r--r--drivers/staging/ath6kl/Makefile159
-rw-r--r--drivers/staging/ath6kl/TODO8
-rw-r--r--drivers/staging/ath6kl/bmi/include/bmi_internal.h55
-rw-r--r--drivers/staging/ath6kl/bmi/src/bmi.c1010
-rw-r--r--drivers/staging/ath6kl/hif/common/hif_sdio_common.h87
-rw-r--r--drivers/staging/ath6kl/hif/sdio/linux_sdio/include/hif_internal.h134
-rw-r--r--drivers/staging/ath6kl/hif/sdio/linux_sdio/src/hif.c1298
-rw-r--r--drivers/staging/ath6kl/hif/sdio/linux_sdio/src/hif_scatter.c393
-rw-r--r--drivers/staging/ath6kl/htc2/AR6000/ar6k.c1471
-rw-r--r--drivers/staging/ath6kl/htc2/AR6000/ar6k.h398
-rw-r--r--drivers/staging/ath6kl/htc2/AR6000/ar6k_events.c784
-rw-r--r--drivers/staging/ath6kl/htc2/AR6000/ar6k_gmbox.c756
-rw-r--r--drivers/staging/ath6kl/htc2/AR6000/ar6k_gmbox_hciuart.c1280
-rw-r--r--drivers/staging/ath6kl/htc2/htc.c579
-rw-r--r--drivers/staging/ath6kl/htc2/htc_debug.h38
-rw-r--r--drivers/staging/ath6kl/htc2/htc_internal.h220
-rw-r--r--drivers/staging/ath6kl/htc2/htc_recv.c1578
-rw-r--r--drivers/staging/ath6kl/htc2/htc_send.c1023
-rw-r--r--drivers/staging/ath6kl/htc2/htc_services.c450
-rw-r--r--drivers/staging/ath6kl/include/a_config.h53
-rw-r--r--drivers/staging/ath6kl/include/a_debug.h224
-rw-r--r--drivers/staging/ath6kl/include/a_drv.h54
-rw-r--r--drivers/staging/ath6kl/include/a_drv_api.h232
-rw-r--r--drivers/staging/ath6kl/include/a_osapi.h61
-rw-r--r--drivers/staging/ath6kl/include/a_types.h58
-rw-r--r--drivers/staging/ath6kl/include/aggr_recv_api.h140
-rw-r--r--drivers/staging/ath6kl/include/ar3kconfig.h65
-rw-r--r--drivers/staging/ath6kl/include/ar6000_api.h54
-rw-r--r--drivers/staging/ath6kl/include/ar6000_diag.h48
-rw-r--r--drivers/staging/ath6kl/include/ar6kap_common.h44
-rw-r--r--drivers/staging/ath6kl/include/athbtfilter.h135
-rw-r--r--drivers/staging/ath6kl/include/athendpack.h52
-rw-r--r--drivers/staging/ath6kl/include/athstartpack.h55
-rw-r--r--drivers/staging/ath6kl/include/bmi.h135
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/AR6002_regdump.h60
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/AR6K_version.h52
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/addrs.h90
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/analog_intf_reg.h64
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/analog_reg.h1932
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/apb_map.h13
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/gpio_reg.h977
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/mbox_host_reg.h386
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/mbox_reg.h481
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/rtc_reg.h1163
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/si_reg.h186
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/uart_reg.h327
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw2.0/hw/vmc_reg.h76
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/analog_intf_ares_reg.h3291
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/analog_intf_athr_wlan_reg.h3674
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/analog_intf_reg.h37
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/apb_athr_wlan_map.h40
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/apb_map.h48
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/bb_lc_reg.h7076
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/efuse_reg.h108
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/gpio_athr_wlan_reg.h1253
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/gpio_reg.h1094
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mac_dma_reg.h605
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mac_pcu_reg.h3065
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_host_reg.h37
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_reg.h560
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_wlan_host_reg.h522
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/mbox_wlan_reg.h638
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/rdma_reg.h564
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/rtc_reg.h975
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/rtc_wlan_reg.h2065
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/si_reg.h209
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/uart_reg.h260
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/umbox_reg.h37
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/umbox_wlan_reg.h322
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/vmc_reg.h167
-rw-r--r--drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/vmc_wlan_reg.h195
-rw-r--r--drivers/staging/ath6kl/include/common/a_hci.h682
-rw-r--r--drivers/staging/ath6kl/include/common/athdefs.h84
-rw-r--r--drivers/staging/ath6kl/include/common/bmi_msg.h241
-rw-r--r--drivers/staging/ath6kl/include/common/btcoexGpio.h86
-rw-r--r--drivers/staging/ath6kl/include/common/cnxmgmt.h36
-rw-r--r--drivers/staging/ath6kl/include/common/dbglog.h134
-rw-r--r--drivers/staging/ath6kl/include/common/dbglog_id.h558
-rw-r--r--drivers/staging/ath6kl/include/common/discovery.h75
-rw-r--r--drivers/staging/ath6kl/include/common/dset_internal.h63
-rw-r--r--drivers/staging/ath6kl/include/common/dsetid.h134
-rw-r--r--drivers/staging/ath6kl/include/common/epping_test.h120
-rw-r--r--drivers/staging/ath6kl/include/common/gmboxif.h78
-rw-r--r--drivers/staging/ath6kl/include/common/gpio.h45
-rw-r--r--drivers/staging/ath6kl/include/common/htc.h236
-rw-r--r--drivers/staging/ath6kl/include/common/htc_services.h52
-rw-r--r--drivers/staging/ath6kl/include/common/ini_dset.h82
-rw-r--r--drivers/staging/ath6kl/include/common/pkt_log.h45
-rw-r--r--drivers/staging/ath6kl/include/common/regDb.h29
-rw-r--r--drivers/staging/ath6kl/include/common/regdump.h59
-rw-r--r--drivers/staging/ath6kl/include/common/regulatory/reg_dbschema.h237
-rw-r--r--drivers/staging/ath6kl/include/common/regulatory/reg_dbvalues.h504
-rw-r--r--drivers/staging/ath6kl/include/common/roaming.h41
-rw-r--r--drivers/staging/ath6kl/include/common/targaddrs.h245
-rw-r--r--drivers/staging/ath6kl/include/common/testcmd.h185
-rw-r--r--drivers/staging/ath6kl/include/common/tlpm.h38
-rw-r--r--drivers/staging/ath6kl/include/common/wlan_defs.h79
-rw-r--r--drivers/staging/ath6kl/include/common/wlan_dset.h33
-rw-r--r--drivers/staging/ath6kl/include/common/wmi.h3119
-rw-r--r--drivers/staging/ath6kl/include/common/wmi_thin.h347
-rw-r--r--drivers/staging/ath6kl/include/common/wmix.h279
-rw-r--r--drivers/staging/ath6kl/include/common_drv.h108
-rw-r--r--drivers/staging/ath6kl/include/dbglog_api.h52
-rw-r--r--drivers/staging/ath6kl/include/dl_list.h153
-rw-r--r--drivers/staging/ath6kl/include/dset_api.h65
-rw-r--r--drivers/staging/ath6kl/include/gpio_api.h59
-rw-r--r--drivers/staging/ath6kl/include/hci_transport_api.h259
-rw-r--r--drivers/staging/ath6kl/include/hif.h458
-rw-r--r--drivers/staging/ath6kl/include/host_version.h52
-rw-r--r--drivers/staging/ath6kl/include/htc_api.h575
-rw-r--r--drivers/staging/ath6kl/include/htc_packet.h227
-rw-r--r--drivers/staging/ath6kl/include/target_reg_table.h244
-rw-r--r--drivers/staging/ath6kl/include/wlan_api.h128
-rw-r--r--drivers/staging/ath6kl/include/wmi_api.h441
-rw-r--r--drivers/staging/ath6kl/miscdrv/ar3kconfig.c566
-rw-r--r--drivers/staging/ath6kl/miscdrv/ar3kps/ar3kpsconfig.c572
-rw-r--r--drivers/staging/ath6kl/miscdrv/ar3kps/ar3kpsconfig.h75
-rw-r--r--drivers/staging/ath6kl/miscdrv/ar3kps/ar3kpsparser.c969
-rw-r--r--drivers/staging/ath6kl/miscdrv/ar3kps/ar3kpsparser.h127
-rw-r--r--drivers/staging/ath6kl/miscdrv/common_drv.c1027
-rw-r--r--drivers/staging/ath6kl/miscdrv/credit_dist.c418
-rw-r--r--drivers/staging/ath6kl/miscdrv/miscdrv.h42
-rw-r--r--drivers/staging/ath6kl/os/linux/ar6000_android.c413
-rw-r--r--drivers/staging/ath6kl/os/linux/ar6000_drv.c6443
-rw-r--r--drivers/staging/ath6kl/os/linux/ar6000_pm.c731
-rw-r--r--drivers/staging/ath6kl/os/linux/ar6000_raw_if.c455
-rw-r--r--drivers/staging/ath6kl/os/linux/ar6k_pal.c481
-rw-r--r--drivers/staging/ath6kl/os/linux/cfg80211.c1470
-rw-r--r--drivers/staging/ath6kl/os/linux/eeprom.c574
-rw-r--r--drivers/staging/ath6kl/os/linux/export_hci_transport.c125
-rw-r--r--drivers/staging/ath6kl/os/linux/hci_bridge.c1144
-rw-r--r--drivers/staging/ath6kl/os/linux/include/ar6000_drv.h762
-rw-r--r--drivers/staging/ath6kl/os/linux/include/ar6k_pal.h36
-rw-r--r--drivers/staging/ath6kl/os/linux/include/ar6xapi_linux.h197
-rw-r--r--drivers/staging/ath6kl/os/linux/include/athdrv_linux.h1219
-rw-r--r--drivers/staging/ath6kl/os/linux/include/athendpack_linux.h0
-rw-r--r--drivers/staging/ath6kl/os/linux/include/athstartpack_linux.h0
-rw-r--r--drivers/staging/ath6kl/os/linux/include/athtypes_linux.h53
-rw-r--r--drivers/staging/ath6kl/os/linux/include/cfg80211.h50
-rw-r--r--drivers/staging/ath6kl/os/linux/include/config_linux.h60
-rw-r--r--drivers/staging/ath6kl/os/linux/include/debug_linux.h50
-rw-r--r--drivers/staging/ath6kl/os/linux/include/export_hci_transport.h76
-rw-r--r--drivers/staging/ath6kl/os/linux/include/ieee80211_ioctl.h179
-rw-r--r--drivers/staging/ath6kl/os/linux/include/osapi_linux.h387
-rw-r--r--drivers/staging/ath6kl/os/linux/include/wlan_config.h111
-rw-r--r--drivers/staging/ath6kl/os/linux/include/wmi_filter_linux.h293
-rw-r--r--drivers/staging/ath6kl/os/linux/ioctl.c4733
-rw-r--r--drivers/staging/ath6kl/os/linux/netbuf.c234
-rw-r--r--drivers/staging/ath6kl/os/linux/wireless_ext.c2725
-rw-r--r--drivers/staging/ath6kl/reorder/aggr_rx_internal.h116
-rw-r--r--drivers/staging/ath6kl/reorder/rcv_aggr.c666
-rw-r--r--drivers/staging/ath6kl/wlan/include/ieee80211.h401
-rw-r--r--drivers/staging/ath6kl/wlan/include/ieee80211_node.h93
-rw-r--r--drivers/staging/ath6kl/wlan/src/wlan_node.c636
-rw-r--r--drivers/staging/ath6kl/wlan/src/wlan_recv_beacon.c200
-rw-r--r--drivers/staging/ath6kl/wlan/src/wlan_utils.c61
-rw-r--r--drivers/staging/ath6kl/wmi/wmi.c6670
-rw-r--r--drivers/staging/ath6kl/wmi/wmi_host.h102
-rw-r--r--drivers/staging/autofs/Kconfig (renamed from fs/autofs/Kconfig)0
-rw-r--r--drivers/staging/autofs/Makefile (renamed from fs/autofs/Makefile)2
-rw-r--r--drivers/staging/autofs/TODO8
-rw-r--r--drivers/staging/autofs/autofs_i.h (renamed from fs/autofs/autofs_i.h)2
-rw-r--r--drivers/staging/autofs/dirhash.c (renamed from fs/autofs/dirhash.c)2
-rw-r--r--drivers/staging/autofs/init.c (renamed from fs/autofs/init.c)2
-rw-r--r--drivers/staging/autofs/inode.c (renamed from fs/autofs/inode.c)2
-rw-r--r--drivers/staging/autofs/root.c (renamed from fs/autofs/root.c)2
-rw-r--r--drivers/staging/autofs/symlink.c (renamed from fs/autofs/symlink.c)2
-rw-r--r--drivers/staging/autofs/waitq.c (renamed from fs/autofs/waitq.c)2
-rw-r--r--drivers/staging/batman-adv/CHANGELOG63
-rw-r--r--drivers/staging/batman-adv/Makefile2
-rw-r--r--drivers/staging/batman-adv/README50
-rw-r--r--drivers/staging/batman-adv/TODO9
-rw-r--r--drivers/staging/batman-adv/aggregation.c70
-rw-r--r--drivers/staging/batman-adv/bat_debugfs.c2
-rw-r--r--drivers/staging/batman-adv/bat_sysfs.c140
-rw-r--r--drivers/staging/batman-adv/bitarray.c22
-rw-r--r--drivers/staging/batman-adv/bitarray.h7
-rw-r--r--drivers/staging/batman-adv/hard-interface.c291
-rw-r--r--drivers/staging/batman-adv/hard-interface.h19
-rw-r--r--drivers/staging/batman-adv/hash.c6
-rw-r--r--drivers/staging/batman-adv/hash.h4
-rw-r--r--drivers/staging/batman-adv/icmp_socket.c73
-rw-r--r--drivers/staging/batman-adv/main.c146
-rw-r--r--drivers/staging/batman-adv/main.h30
-rw-r--r--drivers/staging/batman-adv/originator.c186
-rw-r--r--drivers/staging/batman-adv/originator.h8
-rw-r--r--drivers/staging/batman-adv/packet.h28
-rw-r--r--drivers/staging/batman-adv/routing.c448
-rw-r--r--drivers/staging/batman-adv/routing.h16
-rw-r--r--drivers/staging/batman-adv/send.c175
-rw-r--r--drivers/staging/batman-adv/send.h7
-rw-r--r--drivers/staging/batman-adv/soft-interface.c241
-rw-r--r--drivers/staging/batman-adv/soft-interface.h13
-rw-r--r--drivers/staging/batman-adv/sysfs-class-net-mesh8
-rw-r--r--drivers/staging/batman-adv/translation-table.c271
-rw-r--r--drivers/staging/batman-adv/translation-table.h30
-rw-r--r--drivers/staging/batman-adv/types.h103
-rw-r--r--drivers/staging/batman-adv/unicast.c269
-rw-r--r--drivers/staging/batman-adv/unicast.h39
-rw-r--r--drivers/staging/batman-adv/vis.c534
-rw-r--r--drivers/staging/batman-adv/vis.h27
-rw-r--r--drivers/staging/bcm/Adapter.h714
-rw-r--r--drivers/staging/bcm/Arp.c94
-rw-r--r--drivers/staging/bcm/Bcmchar.c2438
-rw-r--r--drivers/staging/bcm/Bcmnet.c266
-rw-r--r--drivers/staging/bcm/CmHost.c2441
-rw-r--r--drivers/staging/bcm/CmHost.h166
-rw-r--r--drivers/staging/bcm/DDRInit.c1302
-rw-r--r--drivers/staging/bcm/DDRInit.h9
-rw-r--r--drivers/staging/bcm/Debug.c41
-rw-r--r--drivers/staging/bcm/Debug.h297
-rw-r--r--drivers/staging/bcm/HandleControlPacket.c247
-rw-r--r--drivers/staging/bcm/HostMIBSInterface.h230
-rw-r--r--drivers/staging/bcm/HostMibs.h7
-rw-r--r--drivers/staging/bcm/IPv6Protocol.c400
-rw-r--r--drivers/staging/bcm/IPv6ProtocolHdr.h119
-rw-r--r--drivers/staging/bcm/InterfaceAdapter.h97
-rw-r--r--drivers/staging/bcm/InterfaceDld.c510
-rw-r--r--drivers/staging/bcm/InterfaceIdleMode.c318
-rw-r--r--drivers/staging/bcm/InterfaceIdleMode.h16
-rw-r--r--drivers/staging/bcm/InterfaceInit.c868
-rw-r--r--drivers/staging/bcm/InterfaceInit.h51
-rw-r--r--drivers/staging/bcm/InterfaceIsr.c203
-rw-r--r--drivers/staging/bcm/InterfaceIsr.h15
-rw-r--r--drivers/staging/bcm/InterfaceMacros.h18
-rw-r--r--drivers/staging/bcm/InterfaceMisc.c290
-rw-r--r--drivers/staging/bcm/InterfaceMisc.h45
-rw-r--r--drivers/staging/bcm/InterfaceRx.c256
-rw-r--r--drivers/staging/bcm/InterfaceRx.h7
-rw-r--r--drivers/staging/bcm/InterfaceTx.c259
-rw-r--r--drivers/staging/bcm/InterfaceTx.h13
-rw-r--r--drivers/staging/bcm/Interfacemain.h10
-rw-r--r--drivers/staging/bcm/Ioctl.h360
-rw-r--r--drivers/staging/bcm/Kconfig7
-rw-r--r--drivers/staging/bcm/LeakyBucket.c399
-rw-r--r--drivers/staging/bcm/Macros.h399
-rw-r--r--drivers/staging/bcm/Makefile12
-rw-r--r--drivers/staging/bcm/Misc.c2243
-rw-r--r--drivers/staging/bcm/Osal_Misc.c27
-rw-r--r--drivers/staging/bcm/PHSDefines.h125
-rw-r--r--drivers/staging/bcm/PHSModule.c1641
-rw-r--r--drivers/staging/bcm/PHSModule.h95
-rw-r--r--drivers/staging/bcm/Protocol.h151
-rw-r--r--drivers/staging/bcm/Prototypes.h322
-rw-r--r--drivers/staging/bcm/Qos.c892
-rw-r--r--drivers/staging/bcm/Queue.h31
-rw-r--r--drivers/staging/bcm/TODO15
-rw-r--r--drivers/staging/bcm/Transmit.c555
-rw-r--r--drivers/staging/bcm/Typedefs.h47
-rw-r--r--drivers/staging/bcm/Version.h35
-rw-r--r--drivers/staging/bcm/cntrl_SignalingInterface.h677
-rw-r--r--drivers/staging/bcm/headers.h109
-rw-r--r--drivers/staging/bcm/hostmibs.c164
-rw-r--r--drivers/staging/bcm/led_control.c1006
-rw-r--r--drivers/staging/bcm/led_control.h106
-rw-r--r--drivers/staging/bcm/nvm.c5614
-rw-r--r--drivers/staging/bcm/nvm.h489
-rw-r--r--drivers/staging/bcm/osal_misc.h49
-rw-r--r--drivers/staging/bcm/sort.c63
-rw-r--r--drivers/staging/bcm/target_params.h81
-rw-r--r--drivers/staging/bcm/vendorspecificextn.c146
-rw-r--r--drivers/staging/bcm/vendorspecificextn.h18
-rw-r--r--drivers/staging/brcm80211/Kconfig33
-rw-r--r--drivers/staging/brcm80211/Makefile76
-rw-r--r--drivers/staging/brcm80211/README94
-rw-r--r--drivers/staging/brcm80211/TODO49
-rw-r--r--drivers/staging/brcm80211/brcmfmac/Kconfig15
-rw-r--r--drivers/staging/brcm80211/brcmfmac/Makefile47
-rw-r--r--drivers/staging/brcm80211/brcmfmac/README36
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdh.c632
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c658
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c1238
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c231
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd.h468
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_bus.h82
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_cdc.c487
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_common.c1910
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c160
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_dbg.h103
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_linux.c2929
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_linux_sched.c26
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_proto.h92
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_sdio.c6103
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dngl_stats.h32
-rw-r--r--drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c4229
-rw-r--r--drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h394
-rw-r--r--drivers/staging/brcm80211/brcmfmac/wl_iw.c3767
-rw-r--r--drivers/staging/brcm80211/brcmfmac/wl_iw.h149
-rw-r--r--drivers/staging/brcm80211/include/aidmp.h374
-rw-r--r--drivers/staging/brcm80211/include/bcm_rpc.h79
-rw-r--r--drivers/staging/brcm80211/include/bcm_rpc_tp.h137
-rw-r--r--drivers/staging/brcm80211/include/bcm_xdr.h60
-rw-r--r--drivers/staging/brcm80211/include/bcmcdc.h98
-rw-r--r--drivers/staging/brcm80211/include/bcmdefs.h200
-rw-r--r--drivers/staging/brcm80211/include/bcmdevs.h192
-rw-r--r--drivers/staging/brcm80211/include/bcmendian.h303
-rw-r--r--drivers/staging/brcm80211/include/bcmnvram.h172
-rw-r--r--drivers/staging/brcm80211/include/bcmotp.h44
-rw-r--r--drivers/staging/brcm80211/include/bcmsdbus.h113
-rw-r--r--drivers/staging/brcm80211/include/bcmsdh.h198
-rw-r--r--drivers/staging/brcm80211/include/bcmsdh_sdmmc.h110
-rw-r--r--drivers/staging/brcm80211/include/bcmsdpcm.h207
-rw-r--r--drivers/staging/brcm80211/include/bcmsrom.h34
-rw-r--r--drivers/staging/brcm80211/include/bcmsrom_fmt.h367
-rw-r--r--drivers/staging/brcm80211/include/bcmsrom_tbl.h583
-rw-r--r--drivers/staging/brcm80211/include/bcmutils.h502
-rw-r--r--drivers/staging/brcm80211/include/bcmwifi.h192
-rw-r--r--drivers/staging/brcm80211/include/d11.h1778
-rw-r--r--drivers/staging/brcm80211/include/dbus.h353
-rw-r--r--drivers/staging/brcm80211/include/dhdioctl.h107
-rw-r--r--drivers/staging/brcm80211/include/epivers.h44
-rw-r--r--drivers/staging/brcm80211/include/hnddma.h243
-rw-r--r--drivers/staging/brcm80211/include/hndpmu.h71
-rw-r--r--drivers/staging/brcm80211/include/hndrte_armtrap.h75
-rw-r--r--drivers/staging/brcm80211/include/hndrte_cons.h57
-rw-r--r--drivers/staging/brcm80211/include/hndsoc.h199
-rw-r--r--drivers/staging/brcm80211/include/linux_osl.h407
-rw-r--r--drivers/staging/brcm80211/include/linuxver.h38
-rw-r--r--drivers/staging/brcm80211/include/msgtrace.h67
-rw-r--r--drivers/staging/brcm80211/include/nicpci.h79
-rw-r--r--drivers/staging/brcm80211/include/osl.h59
-rw-r--r--drivers/staging/brcm80211/include/packed_section_end.h32
-rw-r--r--drivers/staging/brcm80211/include/packed_section_start.h36
-rw-r--r--drivers/staging/brcm80211/include/pci_core.h122
-rw-r--r--drivers/staging/brcm80211/include/pcicfg.h524
-rw-r--r--drivers/staging/brcm80211/include/pcie_core.h299
-rw-r--r--drivers/staging/brcm80211/include/proto/802.11.h322
-rw-r--r--drivers/staging/brcm80211/include/proto/802.1d.h37
-rw-r--r--drivers/staging/brcm80211/include/proto/bcmeth.h48
-rw-r--r--drivers/staging/brcm80211/include/proto/bcmevent.h217
-rw-r--r--drivers/staging/brcm80211/include/proto/ethernet.h110
-rw-r--r--drivers/staging/brcm80211/include/proto/wpa.h127
-rw-r--r--drivers/staging/brcm80211/include/qmath.h78
-rw-r--r--drivers/staging/brcm80211/include/rpc_osl.h33
-rw-r--r--drivers/staging/brcm80211/include/sbchipc.h1588
-rw-r--r--drivers/staging/brcm80211/include/sbconfig.h272
-rw-r--r--drivers/staging/brcm80211/include/sbhnddma.h315
-rw-r--r--drivers/staging/brcm80211/include/sbhndpio.h52
-rw-r--r--drivers/staging/brcm80211/include/sbpcmcia.h217
-rw-r--r--drivers/staging/brcm80211/include/sbsdio.h152
-rw-r--r--drivers/staging/brcm80211/include/sbsdpcmdev.h281
-rw-r--r--drivers/staging/brcm80211/include/sbsocram.h175
-rw-r--r--drivers/staging/brcm80211/include/sdio.h552
-rw-r--r--drivers/staging/brcm80211/include/sdioh.h63
-rw-r--r--drivers/staging/brcm80211/include/sdiovar.h44
-rw-r--r--drivers/staging/brcm80211/include/siutils.h377
-rw-r--r--drivers/staging/brcm80211/include/spid.h155
-rw-r--r--drivers/staging/brcm80211/include/wlioctl.h2025
-rw-r--r--drivers/staging/brcm80211/phy/phy_version.h36
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phy_cmn.c3456
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phy_hal.h262
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phy_int.h1229
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phy_lcn.c5320
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phy_lcn.h119
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phy_n.c29234
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phy_radio.h1533
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phyreg_n.h167
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phytbl_lcn.c3638
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phytbl_lcn.h49
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phytbl_n.c10631
-rw-r--r--drivers/staging/brcm80211/phy/wlc_phytbl_n.h39
-rw-r--r--drivers/staging/brcm80211/sys/d11ucode_ext.h35
-rw-r--r--drivers/staging/brcm80211/sys/wl_dbg.h82
-rw-r--r--drivers/staging/brcm80211/sys/wl_export.h63
-rw-r--r--drivers/staging/brcm80211/sys/wl_mac80211.c2382
-rw-r--r--drivers/staging/brcm80211/sys/wl_mac80211.h161
-rw-r--r--drivers/staging/brcm80211/sys/wl_ucode.h37
-rw-r--r--drivers/staging/brcm80211/sys/wl_ucode_loader.c90
-rw-r--r--drivers/staging/brcm80211/sys/wlc_alloc.c373
-rw-r--r--drivers/staging/brcm80211/sys/wlc_alloc.h25
-rw-r--r--drivers/staging/brcm80211/sys/wlc_ampdu.c1411
-rw-r--r--drivers/staging/brcm80211/sys/wlc_ampdu.h40
-rw-r--r--drivers/staging/brcm80211/sys/wlc_antsel.c322
-rw-r--r--drivers/staging/brcm80211/sys/wlc_antsel.h28
-rw-r--r--drivers/staging/brcm80211/sys/wlc_bmac.c4206
-rw-r--r--drivers/staging/brcm80211/sys/wlc_bmac.h277
-rw-r--r--drivers/staging/brcm80211/sys/wlc_bsscfg.h152
-rw-r--r--drivers/staging/brcm80211/sys/wlc_cfg.h310
-rw-r--r--drivers/staging/brcm80211/sys/wlc_channel.c1599
-rw-r--r--drivers/staging/brcm80211/sys/wlc_channel.h159
-rw-r--r--drivers/staging/brcm80211/sys/wlc_event.c226
-rw-r--r--drivers/staging/brcm80211/sys/wlc_event.h51
-rw-r--r--drivers/staging/brcm80211/sys/wlc_key.h143
-rw-r--r--drivers/staging/brcm80211/sys/wlc_mac80211.c8675
-rw-r--r--drivers/staging/brcm80211/sys/wlc_mac80211.h1040
-rw-r--r--drivers/staging/brcm80211/sys/wlc_phy_shim.c243
-rw-r--r--drivers/staging/brcm80211/sys/wlc_phy_shim.h112
-rw-r--r--drivers/staging/brcm80211/sys/wlc_pub.h627
-rw-r--r--drivers/staging/brcm80211/sys/wlc_rate.c499
-rw-r--r--drivers/staging/brcm80211/sys/wlc_rate.h170
-rw-r--r--drivers/staging/brcm80211/sys/wlc_rpc.h527
-rw-r--r--drivers/staging/brcm80211/sys/wlc_rpctx.h71
-rw-r--r--drivers/staging/brcm80211/sys/wlc_scb.h84
-rw-r--r--drivers/staging/brcm80211/sys/wlc_stf.c593
-rw-r--r--drivers/staging/brcm80211/sys/wlc_stf.h42
-rw-r--r--drivers/staging/brcm80211/sys/wlc_types.h52
-rw-r--r--drivers/staging/brcm80211/util/aiutils.c708
-rw-r--r--drivers/staging/brcm80211/util/bcmotp.c965
-rw-r--r--drivers/staging/brcm80211/util/bcmsrom.c2076
-rw-r--r--drivers/staging/brcm80211/util/bcmutils.c1044
-rw-r--r--drivers/staging/brcm80211/util/bcmwifi.c189
-rw-r--r--drivers/staging/brcm80211/util/hnddma.c2690
-rw-r--r--drivers/staging/brcm80211/util/hndpmu.c2693
-rw-r--r--drivers/staging/brcm80211/util/linux_osl.c424
-rw-r--r--drivers/staging/brcm80211/util/nicpci.c881
-rw-r--r--drivers/staging/brcm80211/util/nvram/nvram_ro.c212
-rw-r--r--drivers/staging/brcm80211/util/qmath.c681
-rw-r--r--drivers/staging/brcm80211/util/sbutils.c585
-rw-r--r--drivers/staging/brcm80211/util/siutils.c2021
-rw-r--r--drivers/staging/brcm80211/util/siutils_priv.h32
-rw-r--r--drivers/staging/comedi/Makefile2
-rw-r--r--drivers/staging/comedi/comedi_fops.c3
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_82x54.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/addi_amcc_S5920.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/addi_amcc_S5920.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/addi_common.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/addi_common.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/addi_eeprom.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c6
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.h2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c2
-rw-r--r--drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.h2
-rw-r--r--drivers/staging/comedi/drivers/adl_pci6208.c5
-rw-r--r--drivers/staging/comedi/drivers/adl_pci9111.c219
-rw-r--r--drivers/staging/comedi/drivers/adl_pci9118.c42
-rw-r--r--drivers/staging/comedi/drivers/adv_pci1710.c13
-rw-r--r--drivers/staging/comedi/drivers/adv_pci1723.c5
-rw-r--r--drivers/staging/comedi/drivers/adv_pci_dio.c29
-rw-r--r--drivers/staging/comedi/drivers/aio_aio12_8.c6
-rw-r--r--drivers/staging/comedi/drivers/aio_iiro_16.c6
-rw-r--r--drivers/staging/comedi/drivers/cb_pcidas.c19
-rw-r--r--drivers/staging/comedi/drivers/cb_pcidas64.c62
-rw-r--r--drivers/staging/comedi/drivers/cb_pcidda.c15
-rw-r--r--drivers/staging/comedi/drivers/cb_pcidio.c9
-rw-r--r--drivers/staging/comedi/drivers/cb_pcimdas.c6
-rw-r--r--drivers/staging/comedi/drivers/dt2817.c14
-rw-r--r--drivers/staging/comedi/drivers/dt3000.c17
-rw-r--r--drivers/staging/comedi/drivers/dt9812.c2
-rw-r--r--drivers/staging/comedi/drivers/me4000.c29
-rw-r--r--drivers/staging/comedi/drivers/ni_labpc.c16
-rw-r--r--drivers/staging/comedi/drivers/rtd520.c7
-rw-r--r--drivers/staging/comedi/drivers/skel.c7
-rw-r--r--drivers/staging/comedi/drivers/usbdux.c2
-rw-r--r--drivers/staging/crystalhd/Makefile2
-rw-r--r--drivers/staging/crystalhd/crystalhd_lnx.c1
-rw-r--r--drivers/staging/crystalhd/crystalhd_lnx.h2
-rw-r--r--drivers/staging/cx25821/Makefile10
-rw-r--r--drivers/staging/cx25821/cx25821-audio-upstream.c15
-rw-r--r--drivers/staging/cx25821/cx25821-audio.h16
-rw-r--r--drivers/staging/cx25821/cx25821-core.c13
-rw-r--r--drivers/staging/cxt1e1/Kconfig2
-rw-r--r--drivers/staging/cxt1e1/Makefile8
-rw-r--r--drivers/staging/cxt1e1/functions.c4
-rw-r--r--drivers/staging/cxt1e1/linux.c20
-rw-r--r--drivers/staging/cxt1e1/musycc.c22
-rw-r--r--drivers/staging/cxt1e1/pmcc4_drv.c14
-rw-r--r--drivers/staging/cxt1e1/sbeproc.c13
-rw-r--r--drivers/staging/dream/Makefile2
-rw-r--r--drivers/staging/dream/camera/Makefile2
-rw-r--r--drivers/staging/dream/pmem.c2
-rw-r--r--drivers/staging/dream/qdsp5/Makefile2
-rw-r--r--drivers/staging/easycap/Makefile14
-rw-r--r--drivers/staging/et131x/Makefile2
-rw-r--r--drivers/staging/et131x/et131x_initpci.c2
-rw-r--r--drivers/staging/frontier/alphatrack.c2
-rw-r--r--drivers/staging/frontier/tranzport.c56
-rw-r--r--drivers/staging/ft1000/Kconfig22
-rw-r--r--drivers/staging/ft1000/Makefile3
-rw-r--r--drivers/staging/ft1000/TODO9
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/Makefile3
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/boot.h158
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/ft1000.conf14
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/ft1000.h409
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/ft1000.imgbin0 -> 305770 bytes
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/ft1000_cs.c513
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/ft1000_cs.h1
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/ft1000_dev.h66
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/ft1000_dnld.c940
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/ft1000_hw.c2294
-rw-r--r--drivers/staging/ft1000/ft1000-pcmcia/ft1000_proc.c219
-rw-r--r--drivers/staging/ft1000/ft1000-usb/Makefile3
-rw-r--r--drivers/staging/ft1000/ft1000-usb/ft1000_chdev.c936
-rw-r--r--drivers/staging/ft1000/ft1000-usb/ft1000_download.c1248
-rw-r--r--drivers/staging/ft1000/ft1000-usb/ft1000_hw.c2326
-rw-r--r--drivers/staging/ft1000/ft1000-usb/ft1000_hw.h10
-rw-r--r--drivers/staging/ft1000/ft1000-usb/ft1000_ioctl.h139
-rw-r--r--drivers/staging/ft1000/ft1000-usb/ft1000_proc.c232
-rw-r--r--drivers/staging/ft1000/ft1000-usb/ft1000_usb.c276
-rw-r--r--drivers/staging/ft1000/ft1000-usb/ft1000_usb.h608
-rw-r--r--drivers/staging/ft1000/ft1000-usb/ft3000.imgbin0 -> 280414 bytes
-rw-r--r--drivers/staging/go7007/Makefile10
-rw-r--r--drivers/staging/hv/Makefile10
-rw-r--r--drivers/staging/hv/TODO2
-rw-r--r--drivers/staging/hv/blkvsc.c2
-rw-r--r--drivers/staging/hv/blkvsc_drv.c2
-rw-r--r--drivers/staging/hv/channel.c841
-rw-r--r--drivers/staging/hv/channel.h122
-rw-r--r--drivers/staging/hv/channel_interface.c152
-rw-r--r--drivers/staging/hv/channel_interface.h35
-rw-r--r--drivers/staging/hv/channel_mgmt.c342
-rw-r--r--drivers/staging/hv/channel_mgmt.h10
-rw-r--r--drivers/staging/hv/connection.c4
-rw-r--r--drivers/staging/hv/hv_utils.c12
-rw-r--r--drivers/staging/hv/netvsc.c137
-rw-r--r--drivers/staging/hv/netvsc_drv.c4
-rw-r--r--drivers/staging/hv/storvsc.c93
-rw-r--r--drivers/staging/hv/storvsc_drv.c2
-rw-r--r--drivers/staging/hv/vmbus.c35
-rw-r--r--drivers/staging/hv/vmbus.h2
-rw-r--r--drivers/staging/hv/vmbus_api.h55
-rw-r--r--drivers/staging/hv/vmbus_drv.c84
-rw-r--r--drivers/staging/hv/vmbus_private.h3
-rw-r--r--drivers/staging/iio/Documentation/generic_buffer.c318
-rw-r--r--drivers/staging/iio/Documentation/iio_utils.h396
-rw-r--r--drivers/staging/iio/Documentation/lis3l02dqbuffersimple.c238
-rw-r--r--drivers/staging/iio/Documentation/overview.txt17
-rw-r--r--drivers/staging/iio/Documentation/ring.txt6
-rw-r--r--drivers/staging/iio/Documentation/sysfs-bus-iio390
-rw-r--r--drivers/staging/iio/Documentation/sysfs-bus-iio-light64
-rw-r--r--drivers/staging/iio/Documentation/sysfs-class-iio294
-rw-r--r--drivers/staging/iio/Documentation/userspace.txt56
-rw-r--r--drivers/staging/iio/accel/accel.h172
-rw-r--r--drivers/staging/iio/accel/adis16209_core.c48
-rw-r--r--drivers/staging/iio/accel/adis16209_ring.c90
-rw-r--r--drivers/staging/iio/accel/adis16209_trigger.c2
-rw-r--r--drivers/staging/iio/accel/adis16220_core.c26
-rw-r--r--drivers/staging/iio/accel/adis16240_core.c37
-rw-r--r--drivers/staging/iio/accel/adis16240_ring.c72
-rw-r--r--drivers/staging/iio/accel/adis16240_trigger.c2
-rw-r--r--drivers/staging/iio/accel/inclinometer.h2
-rw-r--r--drivers/staging/iio/accel/lis3l02dq_core.c66
-rw-r--r--drivers/staging/iio/accel/lis3l02dq_ring.c79
-rw-r--r--drivers/staging/iio/accel/sca3000.h2
-rw-r--r--drivers/staging/iio/accel/sca3000_core.c71
-rw-r--r--drivers/staging/iio/accel/sca3000_ring.c91
-rw-r--r--drivers/staging/iio/adc/Kconfig35
-rw-r--r--drivers/staging/iio/adc/Makefile8
-rw-r--r--drivers/staging/iio/adc/ad7476.h77
-rw-r--r--drivers/staging/iio/adc/ad7476_core.c293
-rw-r--r--drivers/staging/iio/adc/ad7476_ring.c207
-rw-r--r--drivers/staging/iio/adc/ad799x.h159
-rw-r--r--drivers/staging/iio/adc/ad799x_core.c923
-rw-r--r--drivers/staging/iio/adc/ad799x_ring.c240
-rw-r--r--drivers/staging/iio/adc/adc.h19
-rw-r--r--drivers/staging/iio/adc/max1363_core.c208
-rw-r--r--drivers/staging/iio/adc/max1363_ring.c22
-rw-r--r--drivers/staging/iio/chrdev.h2
-rw-r--r--drivers/staging/iio/gyro/adis16260_core.c36
-rw-r--r--drivers/staging/iio/gyro/adis16260_ring.c68
-rw-r--r--drivers/staging/iio/gyro/adis16260_trigger.c2
-rw-r--r--drivers/staging/iio/gyro/gyro.h46
-rw-r--r--drivers/staging/iio/iio.h106
-rw-r--r--drivers/staging/iio/imu/adis16300_core.c50
-rw-r--r--drivers/staging/iio/imu/adis16300_ring.c95
-rw-r--r--drivers/staging/iio/imu/adis16300_trigger.c2
-rw-r--r--drivers/staging/iio/imu/adis16350_core.c59
-rw-r--r--drivers/staging/iio/imu/adis16350_ring.c113
-rw-r--r--drivers/staging/iio/imu/adis16350_trigger.c2
-rw-r--r--drivers/staging/iio/imu/adis16400_core.c69
-rw-r--r--drivers/staging/iio/imu/adis16400_ring.c122
-rw-r--r--drivers/staging/iio/imu/adis16400_trigger.c2
-rw-r--r--drivers/staging/iio/industrialio-core.c90
-rw-r--r--drivers/staging/iio/industrialio-ring.c61
-rw-r--r--drivers/staging/iio/light/Kconfig12
-rw-r--r--drivers/staging/iio/light/Makefile1
-rw-r--r--drivers/staging/iio/light/isl29018.c563
-rw-r--r--drivers/staging/iio/light/light.h7
-rw-r--r--drivers/staging/iio/light/tsl2563.c35
-rw-r--r--drivers/staging/iio/magnetometer/Kconfig10
-rw-r--r--drivers/staging/iio/magnetometer/Makefile1
-rw-r--r--drivers/staging/iio/magnetometer/ak8975.c558
-rw-r--r--drivers/staging/iio/magnetometer/hmc5843.c61
-rw-r--r--drivers/staging/iio/magnetometer/magnet.h12
-rw-r--r--drivers/staging/iio/ring_generic.h241
-rw-r--r--drivers/staging/iio/ring_sw.c79
-rw-r--r--drivers/staging/iio/ring_sw.h12
-rw-r--r--drivers/staging/iio/sysfs.h162
-rw-r--r--drivers/staging/iio/trigger.h6
-rw-r--r--drivers/staging/iio/trigger/iio-trig-gpio.c2
-rw-r--r--drivers/staging/iio/trigger/iio-trig-periodic-rtc.c12
-rw-r--r--drivers/staging/intel_sst/Kconfig18
-rw-r--r--drivers/staging/intel_sst/Makefile7
-rw-r--r--drivers/staging/intel_sst/TODO13
-rw-r--r--drivers/staging/intel_sst/intel_sst.c512
-rw-r--r--drivers/staging/intel_sst/intel_sst.h131
-rw-r--r--drivers/staging/intel_sst/intel_sst_app_interface.c1216
-rw-r--r--drivers/staging/intel_sst/intel_sst_common.h618
-rw-r--r--drivers/staging/intel_sst/intel_sst_drv_interface.c493
-rw-r--r--drivers/staging/intel_sst/intel_sst_dsp.c486
-rw-r--r--drivers/staging/intel_sst/intel_sst_fw_ipc.h392
-rw-r--r--drivers/staging/intel_sst/intel_sst_ioctl.h435
-rw-r--r--drivers/staging/intel_sst/intel_sst_ipc.c656
-rw-r--r--drivers/staging/intel_sst/intel_sst_pvt.c311
-rw-r--r--drivers/staging/intel_sst/intel_sst_stream.c576
-rw-r--r--drivers/staging/intel_sst/intel_sst_stream_encoded.c1275
-rw-r--r--drivers/staging/intel_sst/intelmid.c1220
-rw-r--r--drivers/staging/intel_sst/intelmid.h186
-rw-r--r--drivers/staging/intel_sst/intelmid_ctrl.c629
-rw-r--r--drivers/staging/intel_sst/intelmid_msic_control.c410
-rw-r--r--drivers/staging/intel_sst/intelmid_pvt.c174
-rw-r--r--drivers/staging/intel_sst/intelmid_snd_control.h114
-rw-r--r--drivers/staging/intel_sst/intelmid_v0_control.c771
-rw-r--r--drivers/staging/intel_sst/intelmid_v1_control.c900
-rw-r--r--drivers/staging/intel_sst/intelmid_v2_control.c1001
-rw-r--r--drivers/staging/intel_sst/jack.h10
-rw-r--r--drivers/staging/keucr/Kconfig13
-rw-r--r--drivers/staging/keucr/Makefile16
-rw-r--r--drivers/staging/keucr/TODO14
-rw-r--r--drivers/staging/keucr/common.h26
-rw-r--r--drivers/staging/keucr/init.c543
-rw-r--r--drivers/staging/keucr/init.h2066
-rw-r--r--drivers/staging/keucr/ms.c956
-rw-r--r--drivers/staging/keucr/ms.h381
-rw-r--r--drivers/staging/keucr/msscsi.c324
-rw-r--r--drivers/staging/keucr/scsiglue.c448
-rw-r--r--drivers/staging/keucr/scsiglue.h10
-rw-r--r--drivers/staging/keucr/sdscsi.c210
-rw-r--r--drivers/staging/keucr/smcommon.h33
-rw-r--r--drivers/staging/keucr/smil.h290
-rw-r--r--drivers/staging/keucr/smilecc.c201
-rw-r--r--drivers/staging/keucr/smilmain.c1852
-rw-r--r--drivers/staging/keucr/smilsub.c1661
-rw-r--r--drivers/staging/keucr/smscsi.c193
-rw-r--r--drivers/staging/keucr/transport.c783
-rw-r--r--drivers/staging/keucr/transport.h144
-rw-r--r--drivers/staging/keucr/usb.c709
-rw-r--r--drivers/staging/keucr/usb.h238
-rw-r--r--drivers/staging/line6/Kconfig67
-rw-r--r--drivers/staging/line6/Makefile2
-rw-r--r--drivers/staging/line6/audio.c16
-rw-r--r--drivers/staging/line6/audio.h7
-rw-r--r--drivers/staging/line6/capture.c239
-rw-r--r--drivers/staging/line6/capture.h25
-rw-r--r--drivers/staging/line6/config.h6
-rw-r--r--drivers/staging/line6/control.c38
-rw-r--r--drivers/staging/line6/control.h190
-rw-r--r--drivers/staging/line6/driver.c566
-rw-r--r--drivers/staging/line6/driver.h59
-rw-r--r--drivers/staging/line6/dumprequest.c60
-rw-r--r--drivers/staging/line6/dumprequest.h28
-rw-r--r--drivers/staging/line6/midi.c100
-rw-r--r--drivers/staging/line6/midi.h9
-rw-r--r--drivers/staging/line6/midibuf.c90
-rw-r--r--drivers/staging/line6/midibuf.h31
-rw-r--r--drivers/staging/line6/pcm.c319
-rw-r--r--drivers/staging/line6/pcm.h145
-rw-r--r--drivers/staging/line6/playback.c313
-rw-r--r--drivers/staging/line6/playback.h29
-rw-r--r--drivers/staging/line6/pod.c774
-rw-r--r--drivers/staging/line6/pod.h127
-rw-r--r--drivers/staging/line6/revision.h2
-rw-r--r--drivers/staging/line6/toneport.c279
-rw-r--r--drivers/staging/line6/toneport.h33
-rw-r--r--drivers/staging/line6/usbdefs.h44
-rw-r--r--drivers/staging/line6/variax.c365
-rw-r--r--drivers/staging/line6/variax.h84
-rw-r--r--drivers/staging/lirc/lirc_imon.c16
-rw-r--r--drivers/staging/lirc/lirc_parallel.c1
-rw-r--r--drivers/staging/lirc/lirc_sasem.c15
-rw-r--r--drivers/staging/lirc/lirc_zilog.c10
-rw-r--r--drivers/staging/msm/mddihost.c2
-rw-r--r--drivers/staging/msm/mdp.c10
-rw-r--r--drivers/staging/msm/msm_fb.c2
-rw-r--r--drivers/staging/msm/staging-devices.c2
-rw-r--r--drivers/staging/octeon/Makefile20
-rw-r--r--drivers/staging/octeon/cvmx-fpa.c2
-rw-r--r--drivers/staging/octeon/cvmx-fpa.h2
-rw-r--r--drivers/staging/octeon/cvmx-helper-board.c19
-rw-r--r--drivers/staging/octeon/cvmx-helper-board.h29
-rw-r--r--drivers/staging/octeon/ethernet.c13
-rw-r--r--drivers/staging/olpc_dcon/Kconfig8
-rw-r--r--drivers/staging/olpc_dcon/Makefile1
-rw-r--r--drivers/staging/olpc_dcon/TODO17
-rw-r--r--drivers/staging/olpc_dcon/olpc_dcon.c870
-rw-r--r--drivers/staging/olpc_dcon/olpc_dcon.h75
-rw-r--r--drivers/staging/olpc_dcon/olpc_dcon_xo_1.c171
-rw-r--r--drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c219
-rw-r--r--drivers/staging/otus/80211core/amsdu.c129
-rw-r--r--drivers/staging/otus/80211core/cagg.c3621
-rw-r--r--drivers/staging/otus/80211core/cagg.h435
-rw-r--r--drivers/staging/otus/80211core/ccmd.c1766
-rw-r--r--drivers/staging/otus/80211core/cfunc.c1226
-rw-r--r--drivers/staging/otus/80211core/cfunc.h449
-rw-r--r--drivers/staging/otus/80211core/chb.c200
-rw-r--r--drivers/staging/otus/80211core/cic.c499
-rw-r--r--drivers/staging/otus/80211core/cinit.c1912
-rw-r--r--drivers/staging/otus/80211core/cmm.c2183
-rw-r--r--drivers/staging/otus/80211core/cmmap.c2435
-rw-r--r--drivers/staging/otus/80211core/cmmsta.c5817
-rw-r--r--drivers/staging/otus/80211core/coid.c2696
-rw-r--r--drivers/staging/otus/80211core/cprecomp.h32
-rw-r--r--drivers/staging/otus/80211core/cpsmgr.c730
-rw-r--r--drivers/staging/otus/80211core/cscanmgr.c533
-rw-r--r--drivers/staging/otus/80211core/ctkip.c599
-rw-r--r--drivers/staging/otus/80211core/ctxrx.c4115
-rw-r--r--drivers/staging/otus/80211core/cwep.c299
-rw-r--r--drivers/staging/otus/80211core/cwm.c131
-rw-r--r--drivers/staging/otus/80211core/cwm.h45
-rw-r--r--drivers/staging/otus/80211core/freqctrl.c259
-rw-r--r--drivers/staging/otus/80211core/ledmgr.c556
-rw-r--r--drivers/staging/otus/80211core/performance.c431
-rw-r--r--drivers/staging/otus/80211core/performance.h97
-rw-r--r--drivers/staging/otus/80211core/pub_usb.h102
-rw-r--r--drivers/staging/otus/80211core/pub_zfi.h820
-rw-r--r--drivers/staging/otus/80211core/pub_zfw.h93
-rw-r--r--drivers/staging/otus/80211core/queue.c304
-rw-r--r--drivers/staging/otus/80211core/queue.h37
-rw-r--r--drivers/staging/otus/80211core/ratectrl.c875
-rw-r--r--drivers/staging/otus/80211core/ratectrl.h37
-rw-r--r--drivers/staging/otus/80211core/struct.h1315
-rw-r--r--drivers/staging/otus/80211core/wlan.h595
-rw-r--r--drivers/staging/otus/Kconfig34
-rw-r--r--drivers/staging/otus/Makefile67
-rw-r--r--drivers/staging/otus/TODO8
-rw-r--r--drivers/staging/otus/apdbg.c379
-rw-r--r--drivers/staging/otus/athr_common.h141
-rw-r--r--drivers/staging/otus/hal/hpDKfwu.c832
-rw-r--r--drivers/staging/otus/hal/hpani.c721
-rw-r--r--drivers/staging/otus/hal/hpani.h419
-rw-r--r--drivers/staging/otus/hal/hpfw2.c1018
-rw-r--r--drivers/staging/otus/hal/hpfwbu.c5269
-rw-r--r--drivers/staging/otus/hal/hpfwspiu.c655
-rw-r--r--drivers/staging/otus/hal/hpfwu.c1017
-rw-r--r--drivers/staging/otus/hal/hpfwu.c.drv_ba_resend742
-rw-r--r--drivers/staging/otus/hal/hpfwu_2k.c1016
-rw-r--r--drivers/staging/otus/hal/hpfwu_BA.c874
-rw-r--r--drivers/staging/otus/hal/hpfwu_FB50_mdk.c721
-rw-r--r--drivers/staging/otus/hal/hpfwu_OTUS_RC.c715
-rw-r--r--drivers/staging/otus/hal/hpfwu_txstream.c1017
-rw-r--r--drivers/staging/otus/hal/hpfwuinit.c240
-rw-r--r--drivers/staging/otus/hal/hpmain.c4672
-rw-r--r--drivers/staging/otus/hal/hpreg.c2270
-rw-r--r--drivers/staging/otus/hal/hpreg.h524
-rw-r--r--drivers/staging/otus/hal/hprw.c1568
-rw-r--r--drivers/staging/otus/hal/hpusb.c1589
-rw-r--r--drivers/staging/otus/hal/hpusb.h437
-rw-r--r--drivers/staging/otus/hal/otus.ini414
-rw-r--r--drivers/staging/otus/ioctl.c2756
-rw-r--r--drivers/staging/otus/oal_dt.h60
-rw-r--r--drivers/staging/otus/oal_marc.h143
-rw-r--r--drivers/staging/otus/usbdrv.c1143
-rw-r--r--drivers/staging/otus/usbdrv.h245
-rw-r--r--drivers/staging/otus/wrap_buf.c111
-rw-r--r--drivers/staging/otus/wrap_dbg.c95
-rw-r--r--drivers/staging/otus/wrap_ev.c292
-rw-r--r--drivers/staging/otus/wrap_mem.c105
-rw-r--r--drivers/staging/otus/wrap_mis.c103
-rw-r--r--drivers/staging/otus/wrap_pkt.c147
-rw-r--r--drivers/staging/otus/wrap_sec.c125
-rw-r--r--drivers/staging/otus/wrap_usb.c187
-rw-r--r--drivers/staging/otus/wwrap.c1048
-rw-r--r--drivers/staging/otus/zdcompat.h45
-rw-r--r--drivers/staging/otus/zdusb.c226
-rw-r--r--drivers/staging/otus/zdusb.h47
-rw-r--r--drivers/staging/phison/phison.c2
-rw-r--r--drivers/staging/pohmelfs/config.c34
-rw-r--r--drivers/staging/quatech_usb2/quatech_usb2.c2
-rw-r--r--drivers/staging/quickstart/quickstart.c7
-rw-r--r--drivers/staging/rt2860/Makefile10
-rw-r--r--drivers/staging/rt2860/ap.h20
-rw-r--r--drivers/staging/rt2860/common/ba_action.c5
-rw-r--r--drivers/staging/rt2860/common/cmm_mac_usb.c5
-rw-r--r--drivers/staging/rt2860/common/cmm_wpa.c4
-rw-r--r--drivers/staging/rt2860/common/mlme.c7
-rw-r--r--drivers/staging/rt2860/common/rtmp_init.c20
-rw-r--r--drivers/staging/rt2860/eeprom.h4
-rw-r--r--drivers/staging/rt2860/iface/rtmp_pci.h42
-rw-r--r--drivers/staging/rt2860/iface/rtmp_usb.h110
-rw-r--r--drivers/staging/rt2860/oid.h2
-rw-r--r--drivers/staging/rt2860/rt_linux.c7
-rw-r--r--drivers/staging/rt2860/rt_linux.h3
-rw-r--r--drivers/staging/rt2860/rtmp.h26
-rw-r--r--drivers/staging/rt2860/sta/assoc.c7
-rw-r--r--drivers/staging/rt2860/sta/connect.c24
-rw-r--r--drivers/staging/rt2860/sta/rtmp_data.c5
-rw-r--r--drivers/staging/rt2860/sta/sync.c12
-rw-r--r--drivers/staging/rt2860/sta_ioctl.c11
-rw-r--r--drivers/staging/rt2870/Makefile10
-rw-r--r--drivers/staging/rt2870/common/rtusb_io.c11
-rw-r--r--drivers/staging/rtl8187se/Makefile16
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211.h1
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c4
-rw-r--r--drivers/staging/rtl8187se/r8180_core.c10
-rw-r--r--drivers/staging/rtl8187se/r8180_dm.h12
-rw-r--r--drivers/staging/rtl8187se/r8180_hw.h432
-rw-r--r--drivers/staging/rtl8187se/r8180_rtl8225.h20
-rw-r--r--drivers/staging/rtl8187se/r8180_wx.c722
-rw-r--r--drivers/staging/rtl8187se/r8185b_init.c1508
-rw-r--r--drivers/staging/rtl8192e/Makefile14
-rw-r--r--drivers/staging/rtl8192e/dot11d.h8
-rw-r--r--drivers/staging/rtl8192e/ieee80211.h213
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_module.c71
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c2
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c18
-rw-r--r--drivers/staging/rtl8192e/r8180_93cx6.c13
-rw-r--r--drivers/staging/rtl8192e/r8190_rtl8256.c2
-rw-r--r--drivers/staging/rtl8192e/r8190_rtl8256.h12
-rw-r--r--drivers/staging/rtl8192e/r8192E.h8
-rw-r--r--drivers/staging/rtl8192e/r8192E_core.c1423
-rw-r--r--drivers/staging/rtl8192e/r8192E_dm.c480
-rw-r--r--drivers/staging/rtl8192e/r8192E_dm.h2
-rw-r--r--drivers/staging/rtl8192e/r8192E_wx.c38
-rw-r--r--drivers/staging/rtl8192e/r8192E_wx.h2
-rw-r--r--drivers/staging/rtl8192e/r8192_pm.c6
-rw-r--r--drivers/staging/rtl8192e/r819xE_cmdpkt.c310
-rw-r--r--drivers/staging/rtl8192e/r819xE_cmdpkt.h2
-rw-r--r--drivers/staging/rtl8192e/r819xE_firmware.c40
-rw-r--r--drivers/staging/rtl8192e/r819xE_phy.c39
-rw-r--r--drivers/staging/rtl8192e/r819xE_phy.h50
-rw-r--r--drivers/staging/rtl8192su/Kconfig9
-rw-r--r--drivers/staging/rtl8192su/Makefile39
-rw-r--r--drivers/staging/rtl8192su/TODO21
-rw-r--r--drivers/staging/rtl8192su/authors1
-rw-r--r--drivers/staging/rtl8192su/ieee80211/Makefile30
-rw-r--r--drivers/staging/rtl8192su/ieee80211/dot11d.c224
-rw-r--r--drivers/staging/rtl8192su/ieee80211/dot11d.h111
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211.h1934
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c242
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.h86
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp.c471
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip.c776
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep.c294
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_module.c301
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h449
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c2580
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c3291
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_softmac_wx.c625
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c916
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c772
-rw-r--r--drivers/staging/rtl8192su/ieee80211/readme162
-rw-r--r--drivers/staging/rtl8192su/ieee80211/rtl819x_BA.h79
-rw-r--r--drivers/staging/rtl8192su/ieee80211/rtl819x_BAProc.c745
-rw-r--r--drivers/staging/rtl8192su/ieee80211/rtl819x_HT.h530
-rw-r--r--drivers/staging/rtl8192su/ieee80211/rtl819x_HTProc.c1725
-rw-r--r--drivers/staging/rtl8192su/ieee80211/rtl819x_Qos.h540
-rw-r--r--drivers/staging/rtl8192su/ieee80211/rtl819x_TS.h71
-rw-r--r--drivers/staging/rtl8192su/ieee80211/rtl819x_TSProc.c631
-rw-r--r--drivers/staging/rtl8192su/r8192SU_HWImg.c647
-rw-r--r--drivers/staging/rtl8192su/r8192SU_HWImg.h60
-rw-r--r--drivers/staging/rtl8192su/r8192SU_led.c2338
-rw-r--r--drivers/staging/rtl8192su/r8192SU_led.h93
-rw-r--r--drivers/staging/rtl8192su/r8192S_Efuse.c2199
-rw-r--r--drivers/staging/rtl8192su/r8192S_Efuse.h79
-rw-r--r--drivers/staging/rtl8192su/r8192S_firmware.c481
-rw-r--r--drivers/staging/rtl8192su/r8192S_firmware.h210
-rw-r--r--drivers/staging/rtl8192su/r8192S_hw.h1445
-rw-r--r--drivers/staging/rtl8192su/r8192S_phy.c3634
-rw-r--r--drivers/staging/rtl8192su/r8192S_phy.h135
-rw-r--r--drivers/staging/rtl8192su/r8192S_phyreg.h1033
-rw-r--r--drivers/staging/rtl8192su/r8192S_rtl6052.c842
-rw-r--r--drivers/staging/rtl8192su/r8192S_rtl6052.h87
-rw-r--r--drivers/staging/rtl8192su/r8192S_rtl8225.c292
-rw-r--r--drivers/staging/rtl8192su/r8192S_rtl8225.h30
-rw-r--r--drivers/staging/rtl8192su/r8192U.h1519
-rw-r--r--drivers/staging/rtl8192su/r8192U_core.c7712
-rw-r--r--drivers/staging/rtl8192su/r8192U_dm.c3982
-rw-r--r--drivers/staging/rtl8192su/r8192U_dm.h254
-rw-r--r--drivers/staging/rtl8192su/r8192U_pm.c72
-rw-r--r--drivers/staging/rtl8192su/r8192U_pm.h25
-rw-r--r--drivers/staging/rtl8192su/r8192U_wx.c1296
-rw-r--r--drivers/staging/rtl8192su/r8192U_wx.h22
-rw-r--r--drivers/staging/rtl8192su/r819xU_HTGen.h22
-rw-r--r--drivers/staging/rtl8192su/r819xU_HTType.h383
-rw-r--r--drivers/staging/rtl8192su/r819xU_cmdpkt.c512
-rw-r--r--drivers/staging/rtl8192su/r819xU_cmdpkt.h192
-rw-r--r--drivers/staging/rtl8192u/Makefile22
-rw-r--r--drivers/staging/rtl8192u/ieee80211/Makefile16
-rw-r--r--drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c2
-rw-r--r--drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c2
-rw-r--r--drivers/staging/rtl8192u/r8192U_core.c25
-rw-r--r--drivers/staging/rtl8192u/r819xU_firmware.c2
-rw-r--r--drivers/staging/rtl8712/Kconfig18
-rw-r--r--drivers/staging/rtl8712/Makefile34
-rw-r--r--drivers/staging/rtl8712/TODO16
-rw-r--r--drivers/staging/rtl8712/basic_types.h23
-rw-r--r--drivers/staging/rtl8712/big_endian.h69
-rw-r--r--drivers/staging/rtl8712/drv_types.h165
-rw-r--r--drivers/staging/rtl8712/ethernet.h23
-rw-r--r--drivers/staging/rtl8712/farray.h10197
-rw-r--r--drivers/staging/rtl8712/generic.h153
-rw-r--r--drivers/staging/rtl8712/hal_init.c358
-rw-r--r--drivers/staging/rtl8712/ieee80211.c454
-rw-r--r--drivers/staging/rtl8712/ieee80211.h770
-rw-r--r--drivers/staging/rtl8712/if_ether.h116
-rw-r--r--drivers/staging/rtl8712/ip.h137
-rw-r--r--drivers/staging/rtl8712/little_endian.h69
-rw-r--r--drivers/staging/rtl8712/mlme_linux.c170
-rw-r--r--drivers/staging/rtl8712/mlme_osdep.h18
-rw-r--r--drivers/staging/rtl8712/mp_custom_oid.h274
-rw-r--r--drivers/staging/rtl8712/os_intfs.c464
-rw-r--r--drivers/staging/rtl8712/osdep_intf.h19
-rw-r--r--drivers/staging/rtl8712/osdep_service.h257
-rw-r--r--drivers/staging/rtl8712/recv_linux.c169
-rw-r--r--drivers/staging/rtl8712/recv_osdep.h27
-rw-r--r--drivers/staging/rtl8712/rtl8712_bitdef.h19
-rw-r--r--drivers/staging/rtl8712/rtl8712_cmd.c465
-rw-r--r--drivers/staging/rtl8712/rtl8712_cmd.h157
-rw-r--r--drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h89
-rw-r--r--drivers/staging/rtl8712/rtl8712_cmdctrl_regdef.h15
-rw-r--r--drivers/staging/rtl8712/rtl8712_debugctrl_bitdef.h36
-rw-r--r--drivers/staging/rtl8712/rtl8712_debugctrl_regdef.h28
-rw-r--r--drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h52
-rw-r--r--drivers/staging/rtl8712/rtl8712_edcasetting_regdef.h18
-rw-r--r--drivers/staging/rtl8712/rtl8712_efuse.c568
-rw-r--r--drivers/staging/rtl8712/rtl8712_efuse.h43
-rw-r--r--drivers/staging/rtl8712/rtl8712_event.h73
-rw-r--r--drivers/staging/rtl8712/rtl8712_fifoctrl_bitdef.h126
-rw-r--r--drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h57
-rw-r--r--drivers/staging/rtl8712/rtl8712_gp_bitdef.h54
-rw-r--r--drivers/staging/rtl8712/rtl8712_gp_regdef.h17
-rw-r--r--drivers/staging/rtl8712/rtl8712_hal.h124
-rw-r--r--drivers/staging/rtl8712/rtl8712_interrupt_bitdef.h39
-rw-r--r--drivers/staging/rtl8712/rtl8712_io.c151
-rw-r--r--drivers/staging/rtl8712/rtl8712_led.c1815
-rw-r--r--drivers/staging/rtl8712/rtl8712_macsetting_bitdef.h28
-rw-r--r--drivers/staging/rtl8712/rtl8712_macsetting_regdef.h16
-rw-r--r--drivers/staging/rtl8712/rtl8712_powersave_bitdef.h33
-rw-r--r--drivers/staging/rtl8712/rtl8712_powersave_regdef.h20
-rw-r--r--drivers/staging/rtl8712/rtl8712_ratectrl_bitdef.h30
-rw-r--r--drivers/staging/rtl8712/rtl8712_ratectrl_regdef.h31
-rw-r--r--drivers/staging/rtl8712/rtl8712_recv.c1131
-rw-r--r--drivers/staging/rtl8712/rtl8712_recv.h128
-rw-r--r--drivers/staging/rtl8712/rtl8712_regdef.h19
-rw-r--r--drivers/staging/rtl8712/rtl8712_security_bitdef.h29
-rw-r--r--drivers/staging/rtl8712/rtl8712_spec.h110
-rw-r--r--drivers/staging/rtl8712/rtl8712_syscfg_bitdef.h145
-rw-r--r--drivers/staging/rtl8712/rtl8712_syscfg_regdef.h31
-rw-r--r--drivers/staging/rtl8712/rtl8712_timectrl_bitdef.h44
-rw-r--r--drivers/staging/rtl8712/rtl8712_timectrl_regdef.h20
-rw-r--r--drivers/staging/rtl8712/rtl8712_wmac_bitdef.h37
-rw-r--r--drivers/staging/rtl8712/rtl8712_wmac_regdef.h24
-rw-r--r--drivers/staging/rtl8712/rtl8712_xmit.c509
-rw-r--r--drivers/staging/rtl8712/rtl8712_xmit.h95
-rw-r--r--drivers/staging/rtl8712/rtl871x_byteorder.h13
-rw-r--r--drivers/staging/rtl8712/rtl871x_cmd.c926
-rw-r--r--drivers/staging/rtl8712/rtl871x_cmd.h719
-rw-r--r--drivers/staging/rtl8712/rtl871x_debug.h142
-rw-r--r--drivers/staging/rtl8712/rtl871x_eeprom.c233
-rw-r--r--drivers/staging/rtl8712/rtl871x_eeprom.h82
-rw-r--r--drivers/staging/rtl8712/rtl871x_event.h95
-rw-r--r--drivers/staging/rtl8712/rtl871x_ht.h19
-rw-r--r--drivers/staging/rtl8712/rtl871x_io.c163
-rw-r--r--drivers/staging/rtl8712/rtl871x_io.h233
-rw-r--r--drivers/staging/rtl8712/rtl871x_ioctl.h97
-rw-r--r--drivers/staging/rtl8712/rtl871x_ioctl_linux.c2246
-rw-r--r--drivers/staging/rtl8712/rtl871x_ioctl_rtl.c535
-rw-r--r--drivers/staging/rtl8712/rtl871x_ioctl_rtl.h96
-rw-r--r--drivers/staging/rtl8712/rtl871x_ioctl_set.c379
-rw-r--r--drivers/staging/rtl8712/rtl871x_ioctl_set.h24
-rw-r--r--drivers/staging/rtl8712/rtl871x_led.h99
-rw-r--r--drivers/staging/rtl8712/rtl871x_mlme.c1840
-rw-r--r--drivers/staging/rtl8712/rtl871x_mlme.h208
-rw-r--r--drivers/staging/rtl8712/rtl871x_mp.c736
-rw-r--r--drivers/staging/rtl8712/rtl871x_mp.h318
-rw-r--r--drivers/staging/rtl8712/rtl871x_mp_ioctl.c1475
-rw-r--r--drivers/staging/rtl8712/rtl871x_mp_ioctl.h457
-rw-r--r--drivers/staging/rtl8712/rtl871x_mp_phy_regdef.h1025
-rw-r--r--drivers/staging/rtl8712/rtl871x_pwrctrl.c250
-rw-r--r--drivers/staging/rtl8712/rtl871x_pwrctrl.h127
-rw-r--r--drivers/staging/rtl8712/rtl871x_recv.c693
-rw-r--r--drivers/staging/rtl8712/rtl871x_recv.h330
-rw-r--r--drivers/staging/rtl8712/rtl871x_rf.h43
-rw-r--r--drivers/staging/rtl8712/rtl871x_security.c1389
-rw-r--r--drivers/staging/rtl8712/rtl871x_security.h196
-rw-r--r--drivers/staging/rtl8712/rtl871x_sta_mgt.c299
-rw-r--r--drivers/staging/rtl8712/rtl871x_wlan_sme.h22
-rw-r--r--drivers/staging/rtl8712/rtl871x_xmit.c1052
-rw-r--r--drivers/staging/rtl8712/rtl871x_xmit.h260
-rw-r--r--drivers/staging/rtl8712/sta_info.h125
-rw-r--r--drivers/staging/rtl8712/swab.h106
-rw-r--r--drivers/staging/rtl8712/usb_halinit.c317
-rw-r--r--drivers/staging/rtl8712/usb_intf.c571
-rw-r--r--drivers/staging/rtl8712/usb_ops.c201
-rw-r--r--drivers/staging/rtl8712/usb_ops.h25
-rw-r--r--drivers/staging/rtl8712/usb_ops_linux.c529
-rw-r--r--drivers/staging/rtl8712/usb_osintf.h24
-rw-r--r--drivers/staging/rtl8712/usb_vendor_req.h33
-rw-r--r--drivers/staging/rtl8712/wifi.h622
-rw-r--r--drivers/staging/rtl8712/wlan_bssdef.h242
-rw-r--r--drivers/staging/rtl8712/xmit_linux.c182
-rw-r--r--drivers/staging/rtl8712/xmit_osdep.h38
-rw-r--r--drivers/staging/sbe-2t3e3/2t3e3.h894
-rw-r--r--drivers/staging/sbe-2t3e3/Kconfig13
-rw-r--r--drivers/staging/sbe-2t3e3/Makefile4
-rw-r--r--drivers/staging/sbe-2t3e3/TODO6
-rw-r--r--drivers/staging/sbe-2t3e3/cpld.c366
-rw-r--r--drivers/staging/sbe-2t3e3/ctrl.c362
-rw-r--r--drivers/staging/sbe-2t3e3/ctrl.h131
-rw-r--r--drivers/staging/sbe-2t3e3/dc.c502
-rw-r--r--drivers/staging/sbe-2t3e3/exar7250.c217
-rw-r--r--drivers/staging/sbe-2t3e3/exar7300.c182
-rw-r--r--drivers/staging/sbe-2t3e3/intr.c635
-rw-r--r--drivers/staging/sbe-2t3e3/io.c352
-rw-r--r--drivers/staging/sbe-2t3e3/main.c171
-rw-r--r--drivers/staging/sbe-2t3e3/maps.c104
-rw-r--r--drivers/staging/sbe-2t3e3/module.c210
-rw-r--r--drivers/staging/sbe-2t3e3/netdev.c142
-rw-r--r--drivers/staging/slicoss/slic.h8
-rw-r--r--drivers/staging/slicoss/slicoss.c44
-rw-r--r--drivers/staging/sm7xx/smtcfb.c13
-rw-r--r--drivers/staging/smbfs/Kconfig (renamed from fs/smbfs/Kconfig)0
-rw-r--r--drivers/staging/smbfs/Makefile (renamed from fs/smbfs/Makefile)12
-rw-r--r--drivers/staging/smbfs/TODO8
-rw-r--r--drivers/staging/smbfs/cache.c (renamed from fs/smbfs/cache.c)2
-rw-r--r--drivers/staging/smbfs/dir.c (renamed from fs/smbfs/dir.c)6
-rw-r--r--drivers/staging/smbfs/file.c (renamed from fs/smbfs/file.c)5
-rw-r--r--drivers/staging/smbfs/getopt.c (renamed from fs/smbfs/getopt.c)0
-rw-r--r--drivers/staging/smbfs/getopt.h (renamed from fs/smbfs/getopt.h)0
-rw-r--r--drivers/staging/smbfs/inode.c (renamed from fs/smbfs/inode.c)8
-rw-r--r--drivers/staging/smbfs/ioctl.c (renamed from fs/smbfs/ioctl.c)5
-rw-r--r--drivers/staging/smbfs/proc.c (renamed from fs/smbfs/proc.c)7
-rw-r--r--drivers/staging/smbfs/proto.h (renamed from fs/smbfs/proto.h)0
-rw-r--r--drivers/staging/smbfs/request.c (renamed from fs/smbfs/request.c)7
-rw-r--r--drivers/staging/smbfs/request.h (renamed from fs/smbfs/request.h)0
-rw-r--r--drivers/staging/smbfs/smb.h (renamed from include/linux/smb.h)0
-rw-r--r--drivers/staging/smbfs/smb_debug.h (renamed from fs/smbfs/smb_debug.h)0
-rw-r--r--drivers/staging/smbfs/smb_fs.h (renamed from include/linux/smb_fs.h)8
-rw-r--r--drivers/staging/smbfs/smb_fs_i.h (renamed from include/linux/smb_fs_i.h)0
-rw-r--r--drivers/staging/smbfs/smb_fs_sb.h (renamed from include/linux/smb_fs_sb.h)2
-rw-r--r--drivers/staging/smbfs/smb_mount.h (renamed from include/linux/smb_mount.h)0
-rw-r--r--drivers/staging/smbfs/smbfs.txt (renamed from Documentation/filesystems/smbfs.txt)0
-rw-r--r--drivers/staging/smbfs/smbiod.c (renamed from fs/smbfs/smbiod.c)7
-rw-r--r--drivers/staging/smbfs/smbno.h (renamed from include/linux/smbno.h)0
-rw-r--r--drivers/staging/smbfs/sock.c (renamed from fs/smbfs/sock.c)7
-rw-r--r--drivers/staging/smbfs/symlink.c (renamed from fs/smbfs/symlink.c)5
-rw-r--r--drivers/staging/solo6x10/Makefile2
-rw-r--r--drivers/staging/solo6x10/solo6010-core.c40
-rw-r--r--drivers/staging/solo6x10/solo6010-g723.c2
-rw-r--r--drivers/staging/solo6x10/solo6010-i2c.c2
-rw-r--r--drivers/staging/solo6x10/solo6010-p2m.c2
-rw-r--r--drivers/staging/solo6x10/solo6010-v4l2-enc.c2
-rw-r--r--drivers/staging/solo6x10/solo6010-v4l2.c2
-rw-r--r--drivers/staging/speakup/DefaultKeyAssignments46
-rw-r--r--drivers/staging/speakup/Kconfig195
-rw-r--r--drivers/staging/speakup/Makefile30
-rw-r--r--drivers/staging/speakup/TODO47
-rw-r--r--drivers/staging/speakup/buffers.c107
-rw-r--r--drivers/staging/speakup/devsynth.c94
-rw-r--r--drivers/staging/speakup/fakekey.c105
-rw-r--r--drivers/staging/speakup/i18n.c628
-rw-r--r--drivers/staging/speakup/i18n.h228
-rw-r--r--drivers/staging/speakup/keyhelp.c214
-rw-r--r--drivers/staging/speakup/kobjects.c1022
-rw-r--r--drivers/staging/speakup/main.c2310
-rw-r--r--drivers/staging/speakup/selection.c151
-rw-r--r--drivers/staging/speakup/serialio.c215
-rw-r--r--drivers/staging/speakup/serialio.h55
-rw-r--r--drivers/staging/speakup/speakup.h130
-rw-r--r--drivers/staging/speakup/speakup_acnt.h16
-rw-r--r--drivers/staging/speakup/speakup_acntpc.c335
-rw-r--r--drivers/staging/speakup/speakup_acntsa.c163
-rw-r--r--drivers/staging/speakup/speakup_apollo.c227
-rw-r--r--drivers/staging/speakup/speakup_audptr.c195
-rw-r--r--drivers/staging/speakup/speakup_bns.c147
-rw-r--r--drivers/staging/speakup/speakup_decext.c253
-rw-r--r--drivers/staging/speakup/speakup_decpc.c504
-rw-r--r--drivers/staging/speakup/speakup_dectlk.c322
-rw-r--r--drivers/staging/speakup/speakup_dtlk.c402
-rw-r--r--drivers/staging/speakup/speakup_dtlk.h54
-rw-r--r--drivers/staging/speakup/speakup_dummy.c148
-rw-r--r--drivers/staging/speakup/speakup_keypc.c335
-rw-r--r--drivers/staging/speakup/speakup_ltlk.c194
-rw-r--r--drivers/staging/speakup/speakup_soft.c379
-rw-r--r--drivers/staging/speakup/speakup_spkout.c165
-rw-r--r--drivers/staging/speakup/speakup_txprt.c147
-rw-r--r--drivers/staging/speakup/speakupmap.h65
-rw-r--r--drivers/staging/speakup/speakupmap.map93
-rw-r--r--drivers/staging/speakup/spk_priv.h93
-rw-r--r--drivers/staging/speakup/spk_priv_keyinfo.h110
-rw-r--r--drivers/staging/speakup/spk_types.h193
-rw-r--r--drivers/staging/speakup/spkguide.txt1575
-rw-r--r--drivers/staging/speakup/synth.c463
-rw-r--r--drivers/staging/speakup/thread.c58
-rw-r--r--drivers/staging/speakup/varhandlers.c404
-rw-r--r--drivers/staging/spectra/Kconfig2
-rw-r--r--drivers/staging/spectra/flash.c2
-rw-r--r--drivers/staging/spectra/flash.h2
-rw-r--r--drivers/staging/spectra/lld_emu.c10
-rw-r--r--drivers/staging/spectra/lld_mtd.c8
-rw-r--r--drivers/staging/spectra/lld_nand.c7
-rw-r--r--drivers/staging/ti-st/Kconfig13
-rw-r--r--drivers/staging/ti-st/Makefile2
-rw-r--r--drivers/staging/ti-st/bt_drv.c2
-rw-r--r--drivers/staging/ti-st/fm.h13
-rw-r--r--drivers/staging/ti-st/st.h83
-rw-r--r--drivers/staging/ti-st/st_core.h128
-rw-r--r--drivers/staging/ti-st/st_kim.h180
-rw-r--r--drivers/staging/ti-st/st_ll.h69
-rw-r--r--drivers/staging/tidspbridge/Kconfig1
-rw-r--r--drivers/staging/tidspbridge/Makefile13
-rw-r--r--drivers/staging/tidspbridge/TODO1
-rw-r--r--drivers/staging/tidspbridge/core/_deh.h5
-rw-r--r--drivers/staging/tidspbridge/core/_tiomap.h19
-rw-r--r--drivers/staging/tidspbridge/core/chnl_sm.c1
-rw-r--r--drivers/staging/tidspbridge/core/dsp-clock.c1
-rw-r--r--drivers/staging/tidspbridge/core/dsp-mmu.c317
-rw-r--r--drivers/staging/tidspbridge/core/io_sm.c181
-rw-r--r--drivers/staging/tidspbridge/core/sync.c (renamed from drivers/staging/tidspbridge/services/sync.c)17
-rw-r--r--drivers/staging/tidspbridge/core/tiomap3430.c1088
-rw-r--r--drivers/staging/tidspbridge/core/tiomap3430_pwr.c22
-rw-r--r--drivers/staging/tidspbridge/core/tiomap_io.c22
-rw-r--r--drivers/staging/tidspbridge/core/ue_deh.c115
-rw-r--r--drivers/staging/tidspbridge/gen/gb.c1
-rw-r--r--drivers/staging/tidspbridge/gen/gs.c1
-rw-r--r--drivers/staging/tidspbridge/hw/EasiGlobal.h41
-rw-r--r--drivers/staging/tidspbridge/hw/MMUAccInt.h76
-rw-r--r--drivers/staging/tidspbridge/hw/MMURegAcM.h225
-rw-r--r--drivers/staging/tidspbridge/hw/hw_defs.h58
-rw-r--r--drivers/staging/tidspbridge/hw/hw_mmu.c562
-rw-r--r--drivers/staging/tidspbridge/hw/hw_mmu.h163
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/cfg.h222
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/cfgdefs.h1
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/cmm.h19
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/dev.h24
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/dmm.h75
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/drv.h12
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/dsp-mmu.h67
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/dspdefs.h44
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/dspioctl.h7
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/host_os.h19
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/mgr.h2
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/proc.h46
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/services.h50
-rw-r--r--drivers/staging/tidspbridge/include/dspbridge/wdt.h2
-rw-r--r--drivers/staging/tidspbridge/pmgr/chnl.c1
-rw-r--r--drivers/staging/tidspbridge/pmgr/cmm.c18
-rw-r--r--drivers/staging/tidspbridge/pmgr/dbll.c2
-rw-r--r--drivers/staging/tidspbridge/pmgr/dev.c132
-rw-r--r--drivers/staging/tidspbridge/pmgr/dmm.c533
-rw-r--r--drivers/staging/tidspbridge/pmgr/dspapi.c62
-rw-r--r--drivers/staging/tidspbridge/pmgr/io.c3
-rw-r--r--drivers/staging/tidspbridge/rmgr/dbdcd.c8
-rw-r--r--drivers/staging/tidspbridge/rmgr/drv.c74
-rw-r--r--drivers/staging/tidspbridge/rmgr/drv_interface.c29
-rw-r--r--drivers/staging/tidspbridge/rmgr/dspdrv.c12
-rw-r--r--drivers/staging/tidspbridge/rmgr/mgr.c52
-rw-r--r--drivers/staging/tidspbridge/rmgr/nldr.c17
-rw-r--r--drivers/staging/tidspbridge/rmgr/node.c58
-rw-r--r--drivers/staging/tidspbridge/rmgr/proc.c245
-rw-r--r--drivers/staging/tidspbridge/rmgr/strm.c12
-rw-r--r--drivers/staging/tidspbridge/services/cfg.c253
-rw-r--r--drivers/staging/tidspbridge/services/ntfy.c31
-rw-r--r--drivers/staging/tidspbridge/services/services.c70
-rw-r--r--drivers/staging/tm6000/Makefile10
-rw-r--r--drivers/staging/tm6000/tm6000-alsa.c7
-rw-r--r--drivers/staging/tm6000/tm6000-core.c6
-rw-r--r--drivers/staging/udlfb/udlfb.c987
-rw-r--r--drivers/staging/udlfb/udlfb.h39
-rw-r--r--drivers/staging/udlfb/udlfb.txt144
-rw-r--r--drivers/staging/usbip/Makefile11
-rw-r--r--drivers/staging/usbip/stub_dev.c2
-rw-r--r--drivers/staging/usbip/usbip_common.c2
-rw-r--r--drivers/staging/usbip/usbip_event.c16
-rw-r--r--drivers/staging/usbip/vhci_hcd.c2
-rw-r--r--drivers/staging/vme/bridges/vme_ca91cx42.c94
-rw-r--r--drivers/staging/vme/devices/vme_user.c2
-rw-r--r--drivers/staging/vt6655/Makefile4
-rw-r--r--drivers/staging/vt6655/device_main.c3
-rw-r--r--drivers/staging/vt6655/iocmd.h4
-rw-r--r--drivers/staging/vt6655/iwctl.c6
-rw-r--r--drivers/staging/vt6655/ttype.h7
-rw-r--r--drivers/staging/vt6655/vntwifi.c6
-rw-r--r--drivers/staging/vt6656/80211mgr.h10
-rw-r--r--drivers/staging/vt6656/Makefile4
-rw-r--r--drivers/staging/vt6656/baseband.c2
-rw-r--r--drivers/staging/vt6656/bssdb.c14
-rw-r--r--drivers/staging/vt6656/card.c2
-rw-r--r--drivers/staging/vt6656/channel.c12
-rw-r--r--drivers/staging/vt6656/device.h19
-rw-r--r--drivers/staging/vt6656/dpc.c17
-rw-r--r--drivers/staging/vt6656/firmware.c6
-rw-r--r--drivers/staging/vt6656/iocmd.h4
-rw-r--r--drivers/staging/vt6656/ioctl.c2
-rw-r--r--drivers/staging/vt6656/iwctl.c20
-rw-r--r--drivers/staging/vt6656/iwctl.h3
-rw-r--r--drivers/staging/vt6656/key.c2
-rw-r--r--drivers/staging/vt6656/mac.c12
-rw-r--r--drivers/staging/vt6656/main_usb.c29
-rw-r--r--drivers/staging/vt6656/power.c6
-rw-r--r--drivers/staging/vt6656/rxtx.c26
-rw-r--r--drivers/staging/vt6656/tether.h34
-rw-r--r--drivers/staging/vt6656/usbpipe.c52
-rw-r--r--drivers/staging/vt6656/wcmd.c4
-rw-r--r--drivers/staging/vt6656/wmgr.c19
-rw-r--r--drivers/staging/vt6656/wmgr.h2
-rw-r--r--drivers/staging/vt6656/wpa.c8
-rw-r--r--drivers/staging/vt6656/wpactl.c6
-rw-r--r--drivers/staging/westbridge/Kconfig53
-rw-r--r--drivers/staging/westbridge/TODO7
-rw-r--r--drivers/staging/westbridge/astoria/Kconfig9
-rw-r--r--drivers/staging/westbridge/astoria/Makefile11
-rw-r--r--drivers/staging/westbridge/astoria/api/Makefile14
-rw-r--r--drivers/staging/westbridge/astoria/api/src/cyasdma.c1107
-rw-r--r--drivers/staging/westbridge/astoria/api/src/cyasintr.c143
-rw-r--r--drivers/staging/westbridge/astoria/api/src/cyaslep2pep.c358
-rw-r--r--drivers/staging/westbridge/astoria/api/src/cyaslowlevel.c1264
-rw-r--r--drivers/staging/westbridge/astoria/api/src/cyasmisc.c3474
-rw-r--r--drivers/staging/westbridge/astoria/api/src/cyasmtp.c1128
-rw-r--r--drivers/staging/westbridge/astoria/api/src/cyasstorage.c4104
-rw-r--r--drivers/staging/westbridge/astoria/api/src/cyasusb.c3718
-rw-r--r--drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c2450
-rw-r--r--drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/cyashaldef.h55
-rw-r--r--drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h319
-rw-r--r--drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasmemmap.h558
-rw-r--r--drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyasomapdev_kernel.h72
-rw-r--r--drivers/staging/westbridge/astoria/block/Kconfig9
-rw-r--r--drivers/staging/westbridge/astoria/block/Makefile11
-rw-r--r--drivers/staging/westbridge/astoria/block/cyasblkdev_block.c1628
-rw-r--r--drivers/staging/westbridge/astoria/block/cyasblkdev_queue.c417
-rw-r--r--drivers/staging/westbridge/astoria/block/cyasblkdev_queue.h64
-rw-r--r--drivers/staging/westbridge/astoria/device/Kconfig9
-rw-r--r--drivers/staging/westbridge/astoria/device/Makefile23
-rw-r--r--drivers/staging/westbridge/astoria/device/cyandevice_export.h132
-rw-r--r--drivers/staging/westbridge/astoria/device/cyasdevice.c412
-rw-r--r--drivers/staging/westbridge/astoria/gadget/Kconfig9
-rw-r--r--drivers/staging/westbridge/astoria/gadget/Makefile11
-rw-r--r--drivers/staging/westbridge/astoria/gadget/cyasgadget.c2176
-rw-r--r--drivers/staging/westbridge/astoria/gadget/cyasgadget.h193
-rw-r--r--drivers/staging/westbridge/astoria/gadget/cyasgadget_ioctl.h99
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyanerr.h418
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyanmedia.h59
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyanmisc.h614
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyanregs.h180
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyansdkversion.h30
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyanstorage.h419
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyantioch.h35
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyantypes.h31
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyanusb.h619
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyas_cplus_end.h11
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyas_cplus_start.h11
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyascast.h35
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasdevice.h1057
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasdma.h375
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyaserr.h1094
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyashal.h108
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyashalcb.h44
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyashaldoc.h800
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasintr.h104
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyaslep2pep.h36
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyaslowlevel.h366
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmedia.h54
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc.h1549
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmisc_dep.h53
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasmtp.h646
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasprotocol.h3838
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasregs.h201
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage.h2759
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasstorage_dep.h309
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyastoria.h36
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyastsdkversion.h30
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyastypes.h71
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasusb.h1862
-rw-r--r--drivers/staging/westbridge/astoria/include/linux/westbridge/cyasusb_dep.h224
-rw-r--r--drivers/staging/winbond/Makefile2
-rw-r--r--drivers/staging/winbond/TODO2
-rw-r--r--drivers/staging/winbond/core.h43
-rw-r--r--drivers/staging/winbond/mac_structures.h17
-rw-r--r--drivers/staging/winbond/mds.c207
-rw-r--r--drivers/staging/winbond/mds_f.h2
-rw-r--r--drivers/staging/winbond/mds_s.h1
-rw-r--r--drivers/staging/winbond/mlme_s.h188
-rw-r--r--drivers/staging/winbond/mlmetxrx.c31
-rw-r--r--drivers/staging/winbond/mlmetxrx_f.h2
-rw-r--r--drivers/staging/winbond/phy_calibration.c20
-rw-r--r--drivers/staging/winbond/scan_s.h110
-rw-r--r--drivers/staging/winbond/wb35rx.c2
-rw-r--r--drivers/staging/winbond/wb35tx.c2
-rw-r--r--drivers/staging/winbond/wbhal_f.h10
-rw-r--r--drivers/staging/winbond/wbhal_s.h37
-rw-r--r--drivers/staging/winbond/wbusb.c21
-rw-r--r--drivers/staging/wlags49_h2/Makefile10
-rw-r--r--drivers/staging/wlags49_h2/hcf.c1
-rw-r--r--drivers/staging/wlags49_h2/hcfdef.h8
-rw-r--r--drivers/staging/wlags49_h2/mdd.h2
-rw-r--r--drivers/staging/wlags49_h2/wl_main.c88
-rw-r--r--drivers/staging/wlags49_h2/wl_netdev.c5
-rw-r--r--drivers/staging/wlags49_h2/wl_util.c72
-rw-r--r--drivers/staging/wlags49_h2/wl_util.h5
-rw-r--r--drivers/staging/wlags49_h2/wl_wext.c9
-rw-r--r--drivers/staging/wlags49_h25/Makefile10
-rw-r--r--drivers/staging/wlan-ng/Makefile2
-rw-r--r--drivers/staging/wlan-ng/hfa384x_usb.c2
-rw-r--r--drivers/staging/xgifb/Makefile2
-rw-r--r--drivers/staging/xgifb/XGI_accel.h3
-rw-r--r--drivers/staging/xgifb/XGI_main.h30
-rw-r--r--drivers/staging/xgifb/XGI_main_26.c3876
-rw-r--r--drivers/staging/xgifb/vb_ext.c1737
-rw-r--r--drivers/staging/xgifb/vb_init.c5022
-rw-r--r--drivers/staging/xgifb/vb_setmode.c17041
-rw-r--r--drivers/staging/xgifb/vb_table.h620
-rw-r--r--drivers/staging/xgifb/vb_util.c192
-rw-r--r--drivers/staging/zram/Kconfig12
-rw-r--r--drivers/staging/zram/Makefile2
-rw-r--r--drivers/staging/zram/zram.txt58
-rw-r--r--drivers/staging/zram/zram_drv.c219
-rw-r--r--drivers/staging/zram/zram_drv.h57
-rw-r--r--drivers/staging/zram/zram_ioctl.h41
-rw-r--r--drivers/staging/zram/zram_sysfs.c224
-rw-r--r--fs/Kconfig2
-rw-r--r--fs/Makefile2
-rw-r--r--fs/compat.c31
-rw-r--r--fs/compat_ioctl.c29
-rw-r--r--include/linux/Kbuild4
-rw-r--r--include/linux/ti_wilink_st.h400
-rw-r--r--include/linux/tty.h1
1365 files changed, 421108 insertions, 148540 deletions
diff --git a/Documentation/ABI/testing/sysfs-block-zram b/Documentation/ABI/testing/sysfs-block-zram
new file mode 100644
index 00000000000..c8b3b48ec62
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-block-zram
@@ -0,0 +1,99 @@
+What: /sys/block/zram<id>/disksize
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The disksize file is read-write and specifies the disk size
+ which represents the limit on the *uncompressed* worth of data
+ that can be stored in this disk.
+
+What: /sys/block/zram<id>/initstate
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The disksize file is read-only and shows the initialization
+ state of the device.
+
+What: /sys/block/zram<id>/reset
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The disksize file is write-only and allows resetting the
+ device. The reset operation frees all the memory assocaited
+ with this device.
+
+What: /sys/block/zram<id>/num_reads
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The num_reads file is read-only and specifies the number of
+ reads (failed or successful) done on this device.
+
+What: /sys/block/zram<id>/num_writes
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The num_writes file is read-only and specifies the number of
+ writes (failed or successful) done on this device.
+
+What: /sys/block/zram<id>/invalid_io
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The invalid_io file is read-only and specifies the number of
+ non-page-size-aligned I/O requests issued to this device.
+
+What: /sys/block/zram<id>/notify_free
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The notify_free file is read-only and specifies the number of
+ swap slot free notifications received by this device. These
+ notifications are send to a swap block device when a swap slot
+ is freed. This statistic is applicable only when this disk is
+ being used as a swap disk.
+
+What: /sys/block/zram<id>/discard
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The discard file is read-only and specifies the number of
+ discard requests received by this device. These requests
+ provide information to block device regarding blocks which are
+ no longer used by filesystem.
+
+What: /sys/block/zram<id>/zero_pages
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The zero_pages file is read-only and specifies number of zero
+ filled pages written to this disk. No memory is allocated for
+ such pages.
+
+What: /sys/block/zram<id>/orig_data_size
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The orig_data_size file is read-only and specifies uncompressed
+ size of data stored in this disk. This excludes zero-filled
+ pages (zero_pages) since no memory is allocated for them.
+ Unit: bytes
+
+What: /sys/block/zram<id>/compr_data_size
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The compr_data_size file is read-only and specifies compressed
+ size of data stored in this disk. So, compression ratio can be
+ calculated using orig_data_size and this statistic.
+ Unit: bytes
+
+What: /sys/block/zram<id>/mem_used_total
+Date: August 2010
+Contact: Nitin Gupta <ngupta@vflare.org>
+Description:
+ The mem_used_total file is read-only and specifies the amount
+ of memory, including allocator fragmentation and metadata
+ overhead, allocated for this disk. So, allocator space
+ efficiency can be calculated using compr_data_size and this
+ statistic.
+ Unit: bytes \ No newline at end of file
diff --git a/Documentation/filesystems/00-INDEX b/Documentation/filesystems/00-INDEX
index 4303614b5ad..8c624a18f67 100644
--- a/Documentation/filesystems/00-INDEX
+++ b/Documentation/filesystems/00-INDEX
@@ -96,8 +96,6 @@ seq_file.txt
- how to use the seq_file API
sharedsubtree.txt
- a description of shared subtrees for namespaces.
-smbfs.txt
- - info on using filesystems with the SMB protocol (Win 3.11 and NT).
spufs.txt
- info and mount options for the SPU filesystem used on Cell.
sysfs-pci.txt
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 33223ff121d..d15834a6e46 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -259,7 +259,7 @@ Code Seq#(hex) Include File Comments
't' 00-7F linux/if_ppp.h
't' 80-8F linux/isdn_ppp.h
't' 90 linux/toshiba.h
-'u' 00-1F linux/smb_fs.h
+'u' 00-1F linux/smb_fs.h gone
'v' all linux/videodev.h conflict!
'v' 00-1F linux/ext2_fs.h conflict!
'v' 00-1F linux/fs.h conflict!
diff --git a/MAINTAINERS b/MAINTAINERS
index 1e6b6bdf634..ba9480edf8f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1391,6 +1391,14 @@ L: netdev@vger.kernel.org
S: Supported
F: drivers/net/tg3.*
+BROADCOM BRCM80211 IEEE802.11n WIRELESS DRIVER
+M: Brett Rudley <brudley@broadcom.com>
+M: Henry Ptasinski <henryp@broadcom.com>
+M: Nohee Ko <noheek@broadcom.com>
+L: linux-wireless@vger.kernel.org
+S: Supported
+F: drivers/staging/brcm80211/
+
BROCADE BFA FC SCSI DRIVER
M: Jing Huang <huangj@brocade.com>
L: linux-scsi@vger.kernel.org
@@ -3383,8 +3391,8 @@ F: Documentation/kdump/
KERNEL AUTOMOUNTER (AUTOFS)
M: "H. Peter Anvin" <hpa@zytor.com>
L: autofs@linux.kernel.org
-S: Odd Fixes
-F: fs/autofs/
+S: Obsolete
+F: drivers/staging/autofs/
KERNEL AUTOMOUNTER v4 (AUTOFS4)
M: Ian Kent <raven@themaw.net>
@@ -5667,7 +5675,7 @@ S: Maintained
STAGING SUBSYSTEM
M: Greg Kroah-Hartman <gregkh@suse.de>
-T: quilt kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-next-2.6.git
L: devel@driverdev.osuosl.org
S: Maintained
F: drivers/staging/
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 7352412e491..60e51bcf53b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -108,6 +108,10 @@ obj-y += $(iommu-m) $(iommu-y)
i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
obj-y += $(i2c-omap-m) $(i2c-omap-y)
+ifneq ($(CONFIG_TIDSPBRIDGE),)
+obj-y += dsp.o
+endif
+
# Specific board support
obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
new file mode 100644
index 00000000000..6feeeae6c21
--- /dev/null
+++ b/arch/arm/mach-omap2/dsp.c
@@ -0,0 +1,85 @@
+/*
+ * TI's OMAP DSP platform device registration
+ *
+ * Copyright (C) 2005-2006 Texas Instruments, Inc.
+ * Copyright (C) 2009 Nokia Corporation
+ *
+ * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include "prm.h"
+#include "cm.h"
+#ifdef CONFIG_BRIDGE_DVFS
+#include <plat/omap-pm.h>
+#endif
+
+#include <plat/dsp.h>
+
+extern phys_addr_t omap_dsp_get_mempool_base(void);
+
+static struct platform_device *omap_dsp_pdev;
+
+static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
+#ifdef CONFIG_BRIDGE_DVFS
+ .dsp_set_min_opp = omap_pm_dsp_set_min_opp,
+ .dsp_get_opp = omap_pm_dsp_get_opp,
+ .cpu_set_freq = omap_pm_cpu_set_freq,
+ .cpu_get_freq = omap_pm_cpu_get_freq,
+#endif
+ .dsp_prm_read = prm_read_mod_reg,
+ .dsp_prm_write = prm_write_mod_reg,
+ .dsp_prm_rmw_bits = prm_rmw_mod_reg_bits,
+ .dsp_cm_read = cm_read_mod_reg,
+ .dsp_cm_write = cm_write_mod_reg,
+ .dsp_cm_rmw_bits = cm_rmw_mod_reg_bits,
+};
+
+static int __init omap_dsp_init(void)
+{
+ struct platform_device *pdev;
+ int err = -ENOMEM;
+ struct omap_dsp_platform_data *pdata = &omap_dsp_pdata;
+
+ pdata->phys_mempool_base = omap_dsp_get_mempool_base();
+
+ if (pdata->phys_mempool_base) {
+ pdata->phys_mempool_size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
+ pr_info("%s: %x bytes @ %x\n", __func__,
+ pdata->phys_mempool_size, pdata->phys_mempool_base);
+ }
+
+ pdev = platform_device_alloc("omap-dsp", -1);
+ if (!pdev)
+ goto err_out;
+
+ err = platform_device_add_data(pdev, pdata, sizeof(*pdata));
+ if (err)
+ goto err_out;
+
+ err = platform_device_add(pdev);
+ if (err)
+ goto err_out;
+
+ omap_dsp_pdev = pdev;
+ return 0;
+
+err_out:
+ platform_device_put(pdev);
+ return err;
+}
+module_init(omap_dsp_init);
+
+static void __exit omap_dsp_exit(void)
+{
+ platform_device_unregister(omap_dsp_pdev);
+}
+module_exit(omap_dsp_exit);
+
+MODULE_AUTHOR("Hiroshi DOYU");
+MODULE_DESCRIPTION("TI's OMAP DSP platform device registration");
+MODULE_LICENSE("GPL");
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 221a675ebba..f0473182030 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -19,6 +19,7 @@
#include <plat/common.h>
#include <plat/board.h>
#include <plat/vram.h>
+#include <plat/dsp.h>
#define NO_LENGTH_CHECK 0xffffffff
@@ -64,4 +65,5 @@ void __init omap_reserve(void)
{
omapfb_reserve_sdram_memblock();
omap_vram_reserve_sdram_memblock();
+ omap_dsp_reserve_sdram_memblock();
}
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 1e2383eae63..6f42a18b8aa 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -15,6 +15,7 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/slab.h>
+#include <linux/memblock.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@@ -231,6 +232,75 @@ static void omap_init_uwire(void)
static inline void omap_init_uwire(void) {}
#endif
+/*-------------------------------------------------------------------------*/
+
+#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
+
+static struct resource wdt_resources[] = {
+ {
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device omap_wdt_device = {
+ .name = "omap_wdt",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(wdt_resources),
+ .resource = wdt_resources,
+};
+
+static void omap_init_wdt(void)
+{
+ if (cpu_is_omap16xx())
+ wdt_resources[0].start = 0xfffeb000;
+ else if (cpu_is_omap2420())
+ wdt_resources[0].start = 0x48022000; /* WDT2 */
+ else if (cpu_is_omap2430())
+ wdt_resources[0].start = 0x49016000; /* WDT2 */
+ else if (cpu_is_omap343x())
+ wdt_resources[0].start = 0x48314000; /* WDT2 */
+ else if (cpu_is_omap44xx())
+ wdt_resources[0].start = 0x4a314000;
+ else
+ return;
+
+ wdt_resources[0].end = wdt_resources[0].start + 0x4f;
+
+ (void) platform_device_register(&omap_wdt_device);
+}
+#else
+static inline void omap_init_wdt(void) {}
+#endif
+
+#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
+
+static phys_addr_t omap_dsp_phys_mempool_base;
+
+void __init omap_dsp_reserve_sdram_memblock(void)
+{
+ phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
+ phys_addr_t paddr;
+
+ if (!size)
+ return;
+
+ paddr = __memblock_alloc_base(size, SZ_1M, MEMBLOCK_REAL_LIMIT);
+ if (!paddr) {
+ pr_err("%s: failed to reserve %x bytes\n",
+ __func__, size);
+ return;
+ }
+
+ omap_dsp_phys_mempool_base = paddr;
+}
+
+phys_addr_t omap_dsp_get_mempool_base(void)
+{
+ return omap_dsp_phys_mempool_base;
+}
+EXPORT_SYMBOL(omap_dsp_get_mempool_base);
+#endif
+
/*
* This gets called after board-specific INIT_MACHINE, and initializes most
* on-chip peripherals accessible on this board (except for few like USB):
diff --git a/arch/arm/plat-omap/include/plat/dsp.h b/arch/arm/plat-omap/include/plat/dsp.h
new file mode 100644
index 00000000000..9c604b390f9
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/dsp.h
@@ -0,0 +1,31 @@
+#ifndef __OMAP_DSP_H__
+#define __OMAP_DSP_H__
+
+#include <linux/types.h>
+
+struct omap_dsp_platform_data {
+ void (*dsp_set_min_opp) (u8 opp_id);
+ u8 (*dsp_get_opp) (void);
+ void (*cpu_set_freq) (unsigned long f);
+ unsigned long (*cpu_get_freq) (void);
+ unsigned long mpu_speed[6];
+
+ /* functions to write and read PRCM registers */
+ void (*dsp_prm_write)(u32, s16 , u16);
+ u32 (*dsp_prm_read)(s16 , u16);
+ u32 (*dsp_prm_rmw_bits)(u32, u32, s16, s16);
+ void (*dsp_cm_write)(u32, s16 , u16);
+ u32 (*dsp_cm_read)(s16 , u16);
+ u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
+
+ phys_addr_t phys_mempool_base;
+ phys_addr_t phys_mempool_size;
+};
+
+#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
+extern void omap_dsp_reserve_sdram_memblock(void);
+#else
+static inline void omap_dsp_reserve_sdram_memblock(void) { }
+#endif
+
+#endif
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 5a74db75f66..39a2173b4e6 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -447,5 +447,6 @@ source "drivers/misc/c2port/Kconfig"
source "drivers/misc/eeprom/Kconfig"
source "drivers/misc/cb710/Kconfig"
source "drivers/misc/iwmc3200top/Kconfig"
+source "drivers/misc/ti-st/Kconfig"
endif # MISC_DEVICES
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 4be5c6fc5ef..47af4cd08f0 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -40,3 +40,4 @@ obj-y += cb710/
obj-$(CONFIG_VMWARE_BALLOON) += vmw_balloon.o
obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o
obj-$(CONFIG_PCH_PHUB) += pch_phub.o
+obj-y += ti-st/
diff --git a/drivers/misc/ti-st/Kconfig b/drivers/misc/ti-st/Kconfig
new file mode 100644
index 00000000000..2c8c3f39710
--- /dev/null
+++ b/drivers/misc/ti-st/Kconfig
@@ -0,0 +1,17 @@
+#
+# TI's shared transport line discipline and the protocol
+# drivers (BT, FM and GPS)
+#
+menu "Texas Instruments shared transport line discipline"
+config TI_ST
+ tristate "Shared transport core driver"
+ depends on RFKILL
+ select FW_LOADER
+ help
+ This enables the shared transport core driver for TI
+ BT / FM and GPS combo chips. This enables protocol drivers
+ to register themselves with core and send data, the responses
+ are returned to relevant protocol drivers based on their
+ packet types.
+
+endmenu
diff --git a/drivers/misc/ti-st/Makefile b/drivers/misc/ti-st/Makefile
new file mode 100644
index 00000000000..78d7ebb1474
--- /dev/null
+++ b/drivers/misc/ti-st/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for TI's shared transport line discipline
+# and its protocol drivers (BT, FM, GPS)
+#
+obj-$(CONFIG_TI_ST) += st_drv.o
+st_drv-objs := st_core.o st_kim.o st_ll.o
diff --git a/drivers/staging/ti-st/st_core.c b/drivers/misc/ti-st/st_core.c
index b85d8bfdf60..f9aad06d1ae 100644
--- a/drivers/staging/ti-st/st_core.c
+++ b/drivers/misc/ti-st/st_core.c
@@ -1,7 +1,8 @@
/*
* Shared Transport Line discipline driver Core
* This hooks up ST KIM driver and ST LL driver
- * Copyright (C) 2009 Texas Instruments
+ * Copyright (C) 2009-2010 Texas Instruments
+ * Author: Pavan Savoy <pavan_savoy@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -28,25 +29,8 @@
#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>
#include <net/bluetooth/hci.h>
-#include "fm.h"
-/*
- * packet formats for fm and gps
- * #include "gps.h"
- */
-#include "st_core.h"
-#include "st_kim.h"
-#include "st_ll.h"
-#include "st.h"
+#include <linux/ti_wilink_st.h>
-/* strings to be used for rfkill entries and by
- * ST Core to be used for sysfs debug entry
- */
-#define PROTO_ENTRY(type, name) name
-const unsigned char *protocol_strngs[] = {
- PROTO_ENTRY(ST_BT, "Bluetooth"),
- PROTO_ENTRY(ST_FM, "FM"),
- PROTO_ENTRY(ST_GPS, "GPS"),
-};
/* function pointer pointing to either,
* st_kim_recv during registration to receive fw download responses
* st_int_recv after registration to receive proto stack responses
@@ -151,7 +135,7 @@ void st_reg_complete(struct st_data_s *st_gdata, char err)
static inline int st_check_data_len(struct st_data_s *st_gdata,
int protoid, int len)
{
- register int room = skb_tailroom(st_gdata->rx_skb);
+ int room = skb_tailroom(st_gdata->rx_skb);
pr_debug("len %d room %d", len, room);
@@ -194,7 +178,7 @@ static inline int st_check_data_len(struct st_data_s *st_gdata,
static inline void st_wakeup_ack(struct st_data_s *st_gdata,
unsigned char cmd)
{
- register struct sk_buff *waiting_skb;
+ struct sk_buff *waiting_skb;
unsigned long flags = 0;
spin_lock_irqsave(&st_gdata->lock, flags);
@@ -223,13 +207,13 @@ static inline void st_wakeup_ack(struct st_data_s *st_gdata,
void st_int_recv(void *disc_data,
const unsigned char *data, long count)
{
- register char *ptr;
+ char *ptr;
struct hci_event_hdr *eh;
struct hci_acl_hdr *ah;
struct hci_sco_hdr *sh;
struct fm_event_hdr *fm;
struct gps_event_hdr *gps;
- register int len = 0, type = 0, dlen = 0;
+ int len = 0, type = 0, dlen = 0;
static enum proto_type protoid = ST_MAX;
struct st_data_s *st_gdata = (struct st_data_s *)disc_data;
@@ -685,9 +669,8 @@ long st_register(struct st_proto_s *new_proto)
default:
pr_err("%d protocol not supported",
new_proto->type);
- err = -EPROTONOSUPPORT;
- /* something wrong */
- break;
+ spin_unlock_irqrestore(&st_gdata->lock, flags);
+ return -EPROTONOSUPPORT;
}
st_gdata->list[new_proto->type] = new_proto;
st_gdata->protos_registered++;
@@ -926,34 +909,27 @@ static void st_tty_flush_buffer(struct tty_struct *tty)
return;
}
+static struct tty_ldisc_ops st_ldisc_ops = {
+ .magic = TTY_LDISC_MAGIC,
+ .name = "n_st",
+ .open = st_tty_open,
+ .close = st_tty_close,
+ .receive_buf = st_tty_receive,
+ .write_wakeup = st_tty_wakeup,
+ .flush_buffer = st_tty_flush_buffer,
+ .owner = THIS_MODULE
+};
+
/********************************************************************/
int st_core_init(struct st_data_s **core_data)
{
struct st_data_s *st_gdata;
long err;
- static struct tty_ldisc_ops *st_ldisc_ops;
- /* populate and register to TTY line discipline */
- st_ldisc_ops = kzalloc(sizeof(*st_ldisc_ops), GFP_KERNEL);
- if (!st_ldisc_ops) {
- pr_err("no mem to allocate");
- return -ENOMEM;
- }
-
- st_ldisc_ops->magic = TTY_LDISC_MAGIC;
- st_ldisc_ops->name = "n_st"; /*"n_hci"; */
- st_ldisc_ops->open = st_tty_open;
- st_ldisc_ops->close = st_tty_close;
- st_ldisc_ops->receive_buf = st_tty_receive;
- st_ldisc_ops->write_wakeup = st_tty_wakeup;
- st_ldisc_ops->flush_buffer = st_tty_flush_buffer;
- st_ldisc_ops->owner = THIS_MODULE;
-
- err = tty_register_ldisc(N_TI_WL, st_ldisc_ops);
+ err = tty_register_ldisc(N_TI_WL, &st_ldisc_ops);
if (err) {
pr_err("error registering %d line discipline %ld",
N_TI_WL, err);
- kfree(st_ldisc_ops);
return err;
}
pr_debug("registered n_shared line discipline");
@@ -964,7 +940,6 @@ int st_core_init(struct st_data_s **core_data)
err = tty_unregister_ldisc(N_TI_WL);
if (err)
pr_err("unable to un-register ldisc %ld", err);
- kfree(st_ldisc_ops);
err = -ENOMEM;
return err;
}
@@ -978,22 +953,6 @@ int st_core_init(struct st_data_s **core_data)
/* Locking used in st_int_enqueue() to avoid multiple execution */
spin_lock_init(&st_gdata->lock);
- /* ldisc_ops ref to be only used in __exit of module */
- st_gdata->ldisc_ops = st_ldisc_ops;
-
-#if 0
- err = st_kim_init();
- if (err) {
- pr_err("error during kim initialization(%ld)", err);
- kfree(st_gdata);
- err = tty_unregister_ldisc(N_TI_WL);
- if (err)
- pr_err("unable to un-register ldisc");
- kfree(st_ldisc_ops);
- return -1;
- }
-#endif
-
err = st_ll_init(st_gdata);
if (err) {
pr_err("error during st_ll initialization(%ld)", err);
@@ -1001,7 +960,6 @@ int st_core_init(struct st_data_s **core_data)
err = tty_unregister_ldisc(N_TI_WL);
if (err)
pr_err("unable to un-register ldisc");
- kfree(st_ldisc_ops);
return -1;
}
*core_data = st_gdata;
@@ -1015,11 +973,7 @@ void st_core_exit(struct st_data_s *st_gdata)
err = st_ll_deinit(st_gdata);
if (err)
pr_err("error during deinit of ST LL %ld", err);
-#if 0
- err = st_kim_deinit();
- if (err)
- pr_err("error during deinit of ST KIM %ld", err);
-#endif
+
if (st_gdata != NULL) {
/* Free ST Tx Qs and skbs */
skb_queue_purge(&st_gdata->txq);
@@ -1030,7 +984,6 @@ void st_core_exit(struct st_data_s *st_gdata)
err = tty_unregister_ldisc(N_TI_WL);
if (err)
pr_err("unable to un-register ldisc %ld", err);
- kfree(st_gdata->ldisc_ops);
/* free the global data pointer */
kfree(st_gdata);
}
diff --git a/drivers/staging/ti-st/st_kim.c b/drivers/misc/ti-st/st_kim.c
index 9e99463f76e..73b6c8b0e86 100644
--- a/drivers/staging/ti-st/st_kim.c
+++ b/drivers/misc/ti-st/st_kim.c
@@ -2,7 +2,8 @@
* Shared Transport Line discipline driver Core
* Init Manager module responsible for GPIO control
* and firmware download
- * Copyright (C) 2009 Texas Instruments
+ * Copyright (C) 2009-2010 Texas Instruments
+ * Author: Pavan Savoy <pavan_savoy@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -28,15 +29,16 @@
#include <linux/gpio.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
-
#include <linux/sched.h>
+#include <linux/rfkill.h>
-#include "st_kim.h"
/* understand BT events for fw response */
#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>
#include <net/bluetooth/hci.h>
+#include <linux/ti_wilink_st.h>
+
static int kim_probe(struct platform_device *pdev);
static int kim_remove(struct platform_device *pdev);
@@ -73,7 +75,7 @@ const unsigned char *protocol_names[] = {
};
#define MAX_ST_DEVICES 3 /* Imagine 1 on each UART for now */
-struct platform_device *st_kim_devices[MAX_ST_DEVICES];
+static struct platform_device *st_kim_devices[MAX_ST_DEVICES];
/**********************************************************************/
/* internal functions */
@@ -155,17 +157,18 @@ static inline int kim_check_data_len(struct kim_data_s *kim_gdata, int len)
void kim_int_recv(struct kim_data_s *kim_gdata,
const unsigned char *data, long count)
{
- register char *ptr;
+ const unsigned char *ptr;
struct hci_event_hdr *eh;
- register int len = 0, type = 0;
+ int len = 0, type = 0;
pr_debug("%s", __func__);
/* Decode received bytes here */
- ptr = (char *)data;
+ ptr = data;
if (unlikely(ptr == NULL)) {
pr_err(" received null from TTY ");
return;
}
+
while (count) {
if (kim_gdata->rx_count) {
len = min_t(unsigned int, kim_gdata->rx_count, count);
@@ -229,7 +232,7 @@ void kim_int_recv(struct kim_data_s *kim_gdata,
static long read_local_version(struct kim_data_s *kim_gdata, char *bts_scr_name)
{
unsigned short version = 0, chip = 0, min_ver = 0, maj_ver = 0;
- char read_ver_cmd[] = { 0x01, 0x01, 0x10, 0x00 };
+ const char read_ver_cmd[] = { 0x01, 0x01, 0x10, 0x00 };
pr_debug("%s", __func__);
@@ -276,8 +279,8 @@ static long download_firmware(struct kim_data_s *kim_gdata)
{
long err = 0;
long len = 0;
- register unsigned char *ptr = NULL;
- register unsigned char *action_ptr = NULL;
+ unsigned char *ptr = NULL;
+ unsigned char *action_ptr = NULL;
unsigned char bts_scr_name[30] = { 0 }; /* 30 char long bts scr name? */
err = read_local_version(kim_gdata, bts_scr_name);
@@ -638,7 +641,14 @@ static int kim_probe(struct platform_device *pdev)
long *gpios = pdev->dev.platform_data;
struct kim_data_s *kim_gdata;
- st_kim_devices[pdev->id] = pdev;
+ if ((pdev->id != -1) && (pdev->id < MAX_ST_DEVICES)) {
+ /* multiple devices could exist */
+ st_kim_devices[pdev->id] = pdev;
+ } else {
+ /* platform's sure about existance of 1 device */
+ st_kim_devices[0] = pdev;
+ }
+
kim_gdata = kzalloc(sizeof(struct kim_data_s), GFP_ATOMIC);
if (!kim_gdata) {
pr_err("no mem to allocate");
diff --git a/drivers/staging/ti-st/st_ll.c b/drivers/misc/ti-st/st_ll.c
index 7a1fb6de830..2bda8dea15b 100644
--- a/drivers/staging/ti-st/st_ll.c
+++ b/drivers/misc/ti-st/st_ll.c
@@ -1,7 +1,8 @@
/*
* Shared Transport driver
* HCI-LL module responsible for TI proprietary HCI_LL protocol
- * Copyright (C) 2009 Texas Instruments
+ * Copyright (C) 2009-2010 Texas Instruments
+ * Author: Pavan Savoy <pavan_savoy@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -19,7 +20,9 @@
*/
#define pr_fmt(fmt) "(stll) :" fmt
-#include "st_ll.h"
+#include <linux/skbuff.h>
+#include <linux/module.h>
+#include <linux/ti_wilink_st.h>
/**********************************************************************/
/* internal functions */
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 8e03e760023..7069eb66f88 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -59,7 +59,7 @@ source "drivers/staging/wlan-ng/Kconfig"
source "drivers/staging/echo/Kconfig"
-source "drivers/staging/otus/Kconfig"
+source "drivers/staging/brcm80211/Kconfig"
source "drivers/staging/rt2860/Kconfig"
@@ -67,24 +67,28 @@ source "drivers/staging/rt2870/Kconfig"
source "drivers/staging/comedi/Kconfig"
+source "drivers/staging/olpc_dcon/Kconfig"
+
source "drivers/staging/asus_oled/Kconfig"
source "drivers/staging/panel/Kconfig"
source "drivers/staging/rtl8187se/Kconfig"
-source "drivers/staging/rtl8192su/Kconfig"
-
source "drivers/staging/rtl8192u/Kconfig"
source "drivers/staging/rtl8192e/Kconfig"
+source "drivers/staging/rtl8712/Kconfig"
+
source "drivers/staging/frontier/Kconfig"
source "drivers/staging/dream/Kconfig"
source "drivers/staging/pohmelfs/Kconfig"
+source "drivers/staging/autofs/Kconfig"
+
source "drivers/staging/phison/Kconfig"
source "drivers/staging/line6/Kconfig"
@@ -143,6 +147,8 @@ source "drivers/staging/msm/Kconfig"
source "drivers/staging/lirc/Kconfig"
+source "drivers/staging/smbfs/Kconfig"
+
source "drivers/staging/easycap/Kconfig"
source "drivers/staging/solo6x10/Kconfig"
@@ -151,5 +157,21 @@ source "drivers/staging/tidspbridge/Kconfig"
source "drivers/staging/quickstart/Kconfig"
+source "drivers/staging/westbridge/Kconfig"
+
+source "drivers/staging/sbe-2t3e3/Kconfig"
+
+source "drivers/staging/ath6kl/Kconfig"
+
+source "drivers/staging/keucr/Kconfig"
+
+source "drivers/staging/bcm/Kconfig"
+
+source "drivers/staging/ft1000/Kconfig"
+
+source "drivers/staging/intel_sst/Kconfig"
+
+source "drivers/staging/speakup/Kconfig"
+
endif # !STAGING_EXCLUDE_BUILD
endif # STAGING
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index 0e7d7559d37..97d58b64381 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -13,23 +13,26 @@ obj-$(CONFIG_USB_IP_COMMON) += usbip/
obj-$(CONFIG_W35UND) += winbond/
obj-$(CONFIG_PRISM2_USB) += wlan-ng/
obj-$(CONFIG_ECHO) += echo/
-obj-$(CONFIG_OTUS) += otus/
+obj-$(CONFIG_BRCM80211) += brcm80211/
obj-$(CONFIG_RT2860) += rt2860/
obj-$(CONFIG_RT2870) += rt2870/
obj-$(CONFIG_COMEDI) += comedi/
+obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/
obj-$(CONFIG_ASUS_OLED) += asus_oled/
obj-$(CONFIG_PANEL) += panel/
obj-$(CONFIG_R8187SE) += rtl8187se/
-obj-$(CONFIG_RTL8192SU) += rtl8192su/
obj-$(CONFIG_RTL8192U) += rtl8192u/
obj-$(CONFIG_RTL8192E) += rtl8192e/
+obj-$(CONFIG_R8712U) += rtl8712/
obj-$(CONFIG_SPECTRA) += spectra/
obj-$(CONFIG_TRANZPORT) += frontier/
obj-$(CONFIG_DREAM) += dream/
obj-$(CONFIG_POHMELFS) += pohmelfs/
+obj-$(CONFIG_AUTOFS_FS) += autofs/
obj-$(CONFIG_IDE_PHISON) += phison/
obj-$(CONFIG_LINE6_USB) += line6/
obj-$(CONFIG_USB_SERIAL_QUATECH2) += serqt_usb2/
+obj-$(CONFIG_SMB_FS) += smbfs/
obj-$(CONFIG_USB_SERIAL_QUATECH_USB2) += quatech_usb2/
obj-$(CONFIG_OCTEON_ETHERNET) += octeon/
obj-$(CONFIG_VT6655) += vt6655/
@@ -56,3 +59,11 @@ obj-$(CONFIG_EASYCAP) += easycap/
obj-$(CONFIG_SOLO6X10) += solo6x10/
obj-$(CONFIG_TIDSPBRIDGE) += tidspbridge/
obj-$(CONFIG_ACPI_QUICKSTART) += quickstart/
+obj-$(CONFIG_WESTBRIDGE_ASTORIA) += westbridge/astoria/
+obj-$(CONFIG_SBE_2T3E3) += sbe-2t3e3/
+obj-$(CONFIG_ATH6K_LEGACY) += ath6kl/
+obj-$(CONFIG_USB_ENESTORAGE) += keucr/
+obj-$(CONFIG_BCM_WIMAX) += bcm/
+obj-$(CONFIG_FT1000) += ft1000/
+obj-$(CONFIG_SND_INTEL_SST) += intel_sst/
+obj-$(CONFIG_SPEAKUP) += speakup/
diff --git a/drivers/staging/adis16255/adis16255.c b/drivers/staging/adis16255/adis16255.c
index c3e6a4d5f33..8d4d7cbab97 100644
--- a/drivers/staging/adis16255/adis16255.c
+++ b/drivers/staging/adis16255/adis16255.c
@@ -406,12 +406,14 @@ static int __devinit spi_adis16255_probe(struct spi_device *spi)
status = spi_adis16255_bringup(spiadis);
if (status != 0)
- goto irq_err;
+ goto sysfs_err;
dev_info(&spi->dev, "spi_adis16255 driver added!\n");
return status;
+sysfs_err:
+ sysfs_remove_group(&spiadis->spi->dev.kobj, &adis16255_attr_group);
irq_err:
free_irq(spiadis->irq, spiadis);
gpio_err:
diff --git a/drivers/staging/ath6kl/Kconfig b/drivers/staging/ath6kl/Kconfig
new file mode 100644
index 00000000000..ae2cdf48b74
--- /dev/null
+++ b/drivers/staging/ath6kl/Kconfig
@@ -0,0 +1,163 @@
+config ATH6K_LEGACY
+ tristate "Atheros AR6003 support (non mac80211)"
+ depends on MMC && WLAN
+ select WIRELESS_EXT
+ select WEXT_PRIV
+ help
+ This module adds support for wireless adapters based on Atheros AR6003 chipset running over SDIO. If you choose to build it as a module, it will be called ath6kl. Pls note that AR6002 and AR6001 are not supported by this driver.
+
+choice
+ prompt "AR6003 Board Data Configuration"
+ depends on ATH6K_LEGACY
+ default AR600x_SD31_XXX
+ help
+ Select the appropriate board data template from the list below that matches your AR6003 based reference design.
+
+config AR600x_SD31_XXX
+ bool "SD31-xxx"
+ help
+ Board Data file for a standard SD31 reference design (File: bdata.SD31.bin)
+
+config AR600x_WB31_XXX
+ bool "WB31-xxx"
+ help
+ Board Data file for a standard WB31 (BT/WiFi) reference design (File: bdata.WB31.bin)
+
+config AR600x_SD32_XXX
+ bool "SD32-xxx"
+ help
+ Board Data file for a standard SD32 (5GHz) reference design (File: bdata.SD32.bin)
+
+config AR600x_CUSTOM_XXX
+ bool "CUSTOM-xxx"
+ help
+ Board Data file for a custom reference design (File: should be named as bdata.CUSTOM.bin)
+endchoice
+
+config ATH6KL_ENABLE_COEXISTENCE
+ bool "BT Coexistence support"
+ depends on ATH6K_LEGACY
+ help
+ Enables WLAN/BT coexistence support. Select the apprpriate configuration from below.
+
+choice
+ prompt "Front-End Antenna Configuration"
+ depends on ATH6KL_ENABLE_COEXISTENCE
+ default AR600x_DUAL_ANTENNA
+ help
+ Indicates the number of antennas being used by BT and WLAN. Select the appropriate configuration from the list below that matches your AR6003 based reference design.
+
+config AR600x_DUAL_ANTENNA
+ bool "Dual Antenna"
+ help
+ Dual Antenna Design
+
+config AR600x_SINGLE_ANTENNA
+ bool "Single Antenna"
+ help
+ Single Antenna Design
+endchoice
+
+choice
+ prompt "Collocated Bluetooth Type"
+ depends on ATH6KL_ENABLE_COEXISTENCE
+ default AR600x_BT_AR3001
+ help
+ Select the appropriate configuration from the list below that matches your AR6003 based reference design.
+
+config AR600x_BT_QCOM
+ bool "Qualcomm BTS4020X"
+ help
+ Qualcomm BT (3 Wire PTA)
+
+config AR600x_BT_CSR
+ bool "CSR BC06"
+ help
+ CSR BT (3 Wire PTA)
+
+config AR600x_BT_AR3001
+ bool "Atheros AR3001"
+ help
+ Atheros BT (3 Wire PTA)
+endchoice
+
+config ATH6KL_HCI_BRIDGE
+ bool "HCI over SDIO support"
+ depends on ATH6K_LEGACY
+ help
+ Enables BT over SDIO. Applicable only for combo designs (eg: WB31)
+
+config ATH6KL_CONFIG_GPIO_BT_RESET
+ bool "Configure BT Reset GPIO"
+ depends on ATH6KL_HCI_BRIDGE
+ help
+ Configure a WLAN GPIO for use with BT.
+
+config AR600x_BT_RESET_PIN
+ int "GPIO"
+ depends on ATH6KL_CONFIG_GPIO_BT_RESET
+ default 22
+ help
+ WLAN GPIO to be used for resetting BT
+
+config ATH6KL_CFG80211
+ bool "CFG80211 support"
+ depends on ATH6K_LEGACY
+ help
+ Enables support for CFG80211 APIs. The default option is to use WEXT. Even with this option enabled, WEXT is not explicitly disabled and the onus of not exercising WEXT lies on the application(s) running in the user space.
+
+config ATH6KL_HTC_RAW_INTERFACE
+ bool "RAW HTC support"
+ depends on ATH6K_LEGACY
+ help
+ Enables raw HTC interface. Allows application to directly talk to the HTC interface via the ioctl interface
+
+config ATH6KL_VIRTUAL_SCATTER_GATHER
+ bool "Virtual Scatter-Gather support"
+ depends on ATH6K_LEGACY
+ help
+ Enables virtual scatter gather support for the hardware that does not support it natively.
+
+config ATH6KL_SKIP_ABI_VERSION_CHECK
+ bool "Skip ABI version check support"
+ depends on ATH6K_LEGACY
+ help
+ Forces the driver to disable ABI version check. Caution: Incompatilbity between the host driver and target firmware may lead to unknown side effects.
+
+config ATH6KL_BT_UART_FC_POLARITY
+ int "UART Flow Control Polarity"
+ depends on ATH6KL_LEGACY
+ default 0
+ help
+ Configures the polarity of UART Flow Control. A value of 0 implies active low and is the default setting. Set it to 1 for active high.
+
+config ATH6KL_DEBUG
+ bool "Debug support"
+ depends on ATH6K_LEGACY
+ help
+ Enables debug support
+
+config ATH6KL_ENABLE_HOST_DEBUG
+ bool "Host Debug support"
+ depends on ATH6KL_DEBUG
+ help
+ Enables debug support in the driver
+
+config ATH6KL_ENABLE_TARGET_DEBUG_PRINTS
+ bool "Target Debug support - Enable UART prints"
+ depends on ATH6KL_DEBUG
+ help
+ Enables uart prints
+
+config AR600x_DEBUG_UART_TX_PIN
+ int "GPIO"
+ depends on ATH6KL_ENABLE_TARGET_DEBUG_PRINTS
+ default 8
+ help
+ WLAN GPIO to be used for Debug UART (Tx)
+
+config ATH6KL_DISABLE_TARGET_DBGLOGS
+ bool "Target Debug support - Disable Debug logs"
+ depends on ATH6KL_DEBUG
+ help
+ Enables debug logs
diff --git a/drivers/staging/ath6kl/Makefile b/drivers/staging/ath6kl/Makefile
new file mode 100644
index 00000000000..ab68078699f
--- /dev/null
+++ b/drivers/staging/ath6kl/Makefile
@@ -0,0 +1,159 @@
+#------------------------------------------------------------------------------
+# Copyright (c) 2004-2010 Atheros Communications Inc.
+# All rights reserved.
+#
+#
+#
+# Permission to use, copy, modify, and/or distribute this software for any
+# purpose with or without fee is hereby granted, provided that the above
+# copyright notice and this permission notice appear in all copies.
+#
+# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+#
+#
+#
+# Author(s): ="Atheros"
+#------------------------------------------------------------------------------
+
+ccflags-y += -I$(obj)/include
+ccflags-y += -I$(obj)/include/common
+ccflags-y += -I$(obj)/wlan/include
+ccflags-y += -I$(obj)/os/linux/include
+ccflags-y += -I$(obj)/os
+ccflags-y += -I$(obj)/bmi/include
+ccflags-y += -I$(obj)/include/common/AR6002/hw4.0
+
+ifeq ($(CONFIG_AR600x_SD31_XXX),y)
+ccflags-y += -DAR600x_SD31_XXX
+endif
+
+ifeq ($(CONFIG_AR600x_WB31_XXX),y)
+ccflags-y += -DAR600x_WB31_XXX
+endif
+
+ifeq ($(CONFIG_AR600x_SD32_XXX),y)
+ccflags-y += -DAR600x_SD32_XXX
+endif
+
+ifeq ($(CONFIG_AR600x_CUSTOM_XXX),y)
+ccflags-y += -DAR600x_CUSTOM_XXX
+endif
+
+ifeq ($(CONFIG_ATH6KL_ENABLE_COEXISTENCE),y)
+ccflags-y += -DENABLE_COEXISTENCE
+endif
+
+ifeq ($(CONFIG_AR600x_DUAL_ANTENNA),y)
+ccflags-y += -DAR600x_DUAL_ANTENNA
+endif
+
+ifeq ($(CONFIG_AR600x_SINGLE_ANTENNA),y)
+ccflags-y += -DAR600x_SINGLE_ANTENNA
+endif
+
+ifeq ($(CONFIG_AR600x_BT_QCOM),y)
+ccflags-y += -DAR600x_BT_QCOM
+endif
+
+ifeq ($(CONFIG_AR600x_BT_CSR),y)
+ccflags-y += -DAR600x_BT_CSR
+endif
+
+ifeq ($(CONFIG_AR600x_BT_AR3001),y)
+ccflags-y += -DAR600x_BT_AR3001
+endif
+
+ifeq ($(CONFIG_ATH6KL_HCI_BRIDGE),y)
+ccflags-y += -DATH_AR6K_ENABLE_GMBOX
+ccflags-y += -DHCI_TRANSPORT_SDIO
+ccflags-y += -DSETUPHCI_ENABLED
+ccflags-y += -DSETUPBTDEV_ENABLED
+ath6kl-y += htc2/AR6000/ar6k_gmbox.o
+ath6kl-y += htc2/AR6000/ar6k_gmbox_hciuart.o
+ath6kl-y += miscdrv/ar3kconfig.o
+ath6kl-y += miscdrv/ar3kps/ar3kpsconfig.o
+ath6kl-y += miscdrv/ar3kps/ar3kpsparser.o
+endif
+
+ifeq ($(CONFIG_ATH6KL_CONFIG_GPIO_BT_RESET),y)
+ccflags-y += -DATH6KL_CONFIG_GPIO_BT_RESET
+endif
+
+ifeq ($(CONFIG_ATH6KL_CFG80211),y)
+ccflags-y += -DATH6K_CONFIG_CFG80211
+ath6kl-y += os/linux/cfg80211.o
+endif
+
+ifeq ($(CONFIG_ATH6KL_HTC_RAW_INTERFACE),y)
+ccflags-y += -DHTC_RAW_INTERFACE
+endif
+
+ifeq ($(CONFIG_ATH6KL_ENABLE_HOST_DEBUG),y)
+ccflags-y += -DDEBUG
+ccflags-y += -DATH_DEBUG_MODULE
+endif
+
+ifeq ($(CONFIG_ATH6KL_ENABLE_TARGET_DEBUG_PRINTS),y)
+ccflags-y += -DENABLEUARTPRINT_SET
+endif
+
+ifeq ($(CONFIG_ATH6KL_DISABLE_TARGET_DBGLOGS),y)
+ccflags-y += -DATH6KL_DISABLE_TARGET_DBGLOGS
+endif
+
+ifeq ($(CONFIG_ATH6KL_VIRTUAL_SCATTER_GATHER),y)
+ccflags-y += -DATH6KL_CONFIG_HIF_VIRTUAL_SCATTER
+endif
+
+ifeq ($(CONFIG_ATH6KL_SKIP_ABI_VERSION_CHECK),y)
+ccflags-y += -DATH6KL_SKIP_ABI_VERSION_CHECK
+endif
+
+ccflags-y += -DLINUX -DKERNEL_2_6
+ccflags-y += -DTCMD
+ccflags-y += -DSEND_EVENT_TO_APP
+ccflags-y += -DUSER_KEYS
+ccflags-y += -DNO_SYNC_FLUSH
+ccflags-y += -DHTC_EP_STAT_PROFILING
+ccflags-y += -DATH_AR6K_11N_SUPPORT
+ccflags-y += -DWAPI_ENABLE
+ccflags-y += -DCHECKSUM_OFFLOAD
+ccflags-y += -DWLAN_HEADERS
+ccflags-y += -DINIT_MODE_DRV_ENABLED
+ccflags-y += -DBMIENABLE_SET
+
+obj-$(CONFIG_ATH6K_LEGACY) := ath6kl.o
+ath6kl-y += htc2/AR6000/ar6k.o
+ath6kl-y += htc2/AR6000/ar6k_events.o
+ath6kl-y += htc2/htc_send.o
+ath6kl-y += htc2/htc_recv.o
+ath6kl-y += htc2/htc_services.o
+ath6kl-y += htc2/htc.o
+ath6kl-y += bmi/src/bmi.o
+ath6kl-y += os/linux/ar6000_drv.o
+ath6kl-y += os/linux/ar6000_raw_if.o
+ath6kl-y += os/linux/ar6000_pm.o
+ath6kl-y += os/linux/netbuf.o
+ath6kl-y += os/linux/wireless_ext.o
+ath6kl-y += os/linux/ioctl.o
+ath6kl-y += os/linux/hci_bridge.o
+ath6kl-y += os/linux/ar6k_pal.o
+ath6kl-y += miscdrv/common_drv.o
+ath6kl-y += miscdrv/credit_dist.o
+ath6kl-y += wmi/wmi.o
+ath6kl-y += reorder/rcv_aggr.o
+ath6kl-y += wlan/src/wlan_node.o
+ath6kl-y += wlan/src/wlan_recv_beacon.o
+ath6kl-y += wlan/src/wlan_utils.o
+
+# ATH_HIF_TYPE := sdio
+ccflags-y += -I$(obj)/hif/sdio/linux_sdio/include
+ccflags-y += -DSDIO
+ath6kl-y += hif/sdio/linux_sdio/src/hif.o
+ath6kl-y += hif/sdio/linux_sdio/src/hif_scatter.o
diff --git a/drivers/staging/ath6kl/TODO b/drivers/staging/ath6kl/TODO
new file mode 100644
index 00000000000..d4629274397
--- /dev/null
+++ b/drivers/staging/ath6kl/TODO
@@ -0,0 +1,8 @@
+- The driver is a stop-gap measure until a proper mac80211 driver is available.
+- The driver does not conform to the Linux coding style.
+- The driver has been tested on a wide variety of embedded platforms running different versions of the Linux kernel but may still have bringup/performance issues with a new platform.
+- Pls use the following link to get information about the driver's architecture, exposed APIs, supported features, limitations, testing, hardware availability and other details.
+ http://wireless.kernel.org/en/users/Drivers/ath6kl
+- Pls send any patches to
+ - Greg Kroah-Hartman <greg@kroah.com>
+ - Vipin Mehta <vmehta@atheros.com>
diff --git a/drivers/staging/ath6kl/bmi/include/bmi_internal.h b/drivers/staging/ath6kl/bmi/include/bmi_internal.h
new file mode 100644
index 00000000000..a44027cee4e
--- /dev/null
+++ b/drivers/staging/ath6kl/bmi/include/bmi_internal.h
@@ -0,0 +1,55 @@
+//------------------------------------------------------------------------------
+// Copyright (c) 2004-2010 Atheros Communications Inc.
+// All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+//
+// Author(s): ="Atheros"
+//==============================================================================
+#ifndef BMI_INTERNAL_H
+#define BMI_INTERNAL_H
+
+#include "a_config.h"
+#include "athdefs.h"
+#include "a_types.h"
+#include "a_osapi.h"
+#define ATH_MODULE_NAME bmi
+#include "a_debug.h"
+#include "AR6002/hw2.0/hw/mbox_host_reg.h"
+#include "bmi_msg.h"
+
+#define ATH_DEBUG_BMI ATH_DEBUG_MAKE_MODULE_MASK(0)
+
+
+#define BMI_COMMUNICATION_TIMEOUT 100000
+
+/* ------ Global Variable Declarations ------- */
+static A_BOOL bmiDone;
+
+A_STATUS
+bmiBufferSend(HIF_DEVICE *device,
+ A_UCHAR *buffer,
+ A_UINT32 length);
+
+A_STATUS
+bmiBufferReceive(HIF_DEVICE *device,
+ A_UCHAR *buffer,
+ A_UINT32 length,
+ A_BOOL want_timeout);
+
+#endif
diff --git a/drivers/staging/ath6kl/bmi/src/bmi.c b/drivers/staging/ath6kl/bmi/src/bmi.c
new file mode 100644
index 00000000000..f17f5636f5b
--- /dev/null
+++ b/drivers/staging/ath6kl/bmi/src/bmi.c
@@ -0,0 +1,1010 @@
+//------------------------------------------------------------------------------
+// <copyright file="bmi.c" company="Atheros">
+// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+//
+// Author(s): ="Atheros"
+//==============================================================================
+
+
+#ifdef THREAD_X
+#include <string.h>
+#endif
+
+#include "hif.h"
+#include "bmi.h"
+#include "htc_api.h"
+#include "bmi_internal.h"
+
+#ifdef ATH_DEBUG_MODULE
+static ATH_DEBUG_MASK_DESCRIPTION bmi_debug_desc[] = {
+ { ATH_DEBUG_BMI , "BMI Tracing"},
+};
+
+ATH_DEBUG_INSTANTIATE_MODULE_VAR(bmi,
+ "bmi",
+ "Boot Manager Interface",
+ ATH_DEBUG_MASK_DEFAULTS,
+ ATH_DEBUG_DESCRIPTION_COUNT(bmi_debug_desc),
+ bmi_debug_desc);
+
+#endif
+
+/*
+Although we had envisioned BMI to run on top of HTC, this is not how the
+final implementation ended up. On the Target side, BMI is a part of the BSP
+and does not use the HTC protocol nor even DMA -- it is intentionally kept
+very simple.
+*/
+
+static A_BOOL pendingEventsFuncCheck = FALSE;
+static A_UINT32 *pBMICmdCredits;
+static A_UCHAR *pBMICmdBuf;
+#define MAX_BMI_CMDBUF_SZ (BMI_DATASZ_MAX + \
+ sizeof(A_UINT32) /* cmd */ + \
+ sizeof(A_UINT32) /* addr */ + \
+ sizeof(A_UINT32))/* length */
+#define BMI_COMMAND_FITS(sz) ((sz) <= MAX_BMI_CMDBUF_SZ)
+
+/* APIs visible to the driver */
+void
+BMIInit(void)
+{
+ bmiDone = FALSE;
+ pendingEventsFuncCheck = FALSE;
+
+ /*
+ * On some platforms, it's not possible to DMA to a static variable
+ * in a device driver (e.g. Linux loadable driver module).
+ * So we need to A_MALLOC space for "command credits" and for commands.
+ *
+ * Note: implicitly relies on A_MALLOC to provide a buffer that is
+ * suitable for DMA (or PIO). This buffer will be passed down the
+ * bus stack.
+ */
+ if (!pBMICmdCredits) {
+ pBMICmdCredits = (A_UINT32 *)A_MALLOC_NOWAIT(4);
+ A_ASSERT(pBMICmdCredits);
+ }
+
+ if (!pBMICmdBuf) {
+ pBMICmdBuf = (A_UCHAR *)A_MALLOC_NOWAIT(MAX_BMI_CMDBUF_SZ);
+ A_ASSERT(pBMICmdBuf);
+ }
+
+ A_REGISTER_MODULE_DEBUG_INFO(bmi);
+}
+
+void
+BMICleanup(void)
+{
+ if (pBMICmdCredits) {
+ A_FREE(pBMICmdCredits);
+ pBMICmdCredits = NULL;
+ }
+
+ if (pBMICmdBuf) {
+ A_FREE(pBMICmdBuf);
+ pBMICmdBuf = NULL;
+ }
+}
+
+A_STATUS
+BMIDone(HIF_DEVICE *device)
+{
+ A_STATUS status;
+ A_UINT32 cid;
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF (ATH_DEBUG_BMI, ("BMIDone skipped\n"));
+ return A_OK;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Done: Enter (device: 0x%p)\n", device));
+ bmiDone = TRUE;
+ cid = BMI_DONE;
+
+ status = bmiBufferSend(device, (A_UCHAR *)&cid, sizeof(cid));
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+
+ if (pBMICmdCredits) {
+ A_FREE(pBMICmdCredits);
+ pBMICmdCredits = NULL;
+ }
+
+ if (pBMICmdBuf) {
+ A_FREE(pBMICmdBuf);
+ pBMICmdBuf = NULL;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Done: Exit\n"));
+
+ return A_OK;
+}
+
+A_STATUS
+BMIGetTargetInfo(HIF_DEVICE *device, struct bmi_target_info *targ_info)
+{
+ A_STATUS status;
+ A_UINT32 cid;
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Enter (device: 0x%p)\n", device));
+ cid = BMI_GET_TARGET_INFO;
+
+ status = bmiBufferSend(device, (A_UCHAR *)&cid, sizeof(cid));
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+
+ status = bmiBufferReceive(device, (A_UCHAR *)&targ_info->target_ver,
+ sizeof(targ_info->target_ver), TRUE);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Version from the device\n"));
+ return A_ERROR;
+ }
+
+ if (targ_info->target_ver == TARGET_VERSION_SENTINAL) {
+ /* Determine how many bytes are in the Target's targ_info */
+ status = bmiBufferReceive(device, (A_UCHAR *)&targ_info->target_info_byte_count,
+ sizeof(targ_info->target_info_byte_count), TRUE);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info Byte Count from the device\n"));
+ return A_ERROR;
+ }
+
+ /*
+ * The Target's targ_info doesn't match the Host's targ_info.
+ * We need to do some backwards compatibility work to make this OK.
+ */
+ A_ASSERT(targ_info->target_info_byte_count == sizeof(*targ_info));
+
+ /* Read the remainder of the targ_info */
+ status = bmiBufferReceive(device,
+ ((A_UCHAR *)targ_info)+sizeof(targ_info->target_info_byte_count),
+ sizeof(*targ_info)-sizeof(targ_info->target_info_byte_count), TRUE);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info (%d bytes) from the device\n",
+ targ_info->target_info_byte_count));
+ return A_ERROR;
+ }
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Exit (ver: 0x%x type: 0x%x)\n",
+ targ_info->target_ver, targ_info->target_type));
+
+ return A_OK;
+}
+
+A_STATUS
+BMIReadMemory(HIF_DEVICE *device,
+ A_UINT32 address,
+ A_UCHAR *buffer,
+ A_UINT32 length)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+ A_UINT32 remaining, rxlen;
+
+ A_ASSERT(BMI_COMMAND_FITS(BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length)));
+ memset (pBMICmdBuf, 0, BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length));
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI Read Memory: Enter (device: 0x%p, address: 0x%x, length: %d)\n",
+ device, address, length));
+
+ cid = BMI_READ_MEMORY;
+
+ remaining = length;
+
+ while (remaining)
+ {
+ rxlen = (remaining < BMI_DATASZ_MAX) ? remaining : BMI_DATASZ_MAX;
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &address, sizeof(address));
+ offset += sizeof(address);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &rxlen, sizeof(rxlen));
+ offset += sizeof(length);
+
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+ status = bmiBufferReceive(device, pBMICmdBuf, rxlen, TRUE);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
+ return A_ERROR;
+ }
+ A_MEMCPY(&buffer[length - remaining], pBMICmdBuf, rxlen);
+ remaining -= rxlen; address += rxlen;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read Memory: Exit\n"));
+ return A_OK;
+}
+
+A_STATUS
+BMIWriteMemory(HIF_DEVICE *device,
+ A_UINT32 address,
+ A_UCHAR *buffer,
+ A_UINT32 length)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+ A_UINT32 remaining, txlen;
+ const A_UINT32 header = sizeof(cid) + sizeof(address) + sizeof(length);
+ A_UCHAR alignedBuffer[BMI_DATASZ_MAX];
+ A_UCHAR *src;
+
+ A_ASSERT(BMI_COMMAND_FITS(BMI_DATASZ_MAX + header));
+ memset (pBMICmdBuf, 0, BMI_DATASZ_MAX + header);
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI Write Memory: Enter (device: 0x%p, address: 0x%x, length: %d)\n",
+ device, address, length));
+
+ cid = BMI_WRITE_MEMORY;
+
+ remaining = length;
+ while (remaining)
+ {
+ src = &buffer[length - remaining];
+ if (remaining < (BMI_DATASZ_MAX - header)) {
+ if (remaining & 3) {
+ /* align it with 4 bytes */
+ remaining = remaining + (4 - (remaining & 3));
+ memcpy(alignedBuffer, src, remaining);
+ src = alignedBuffer;
+ }
+ txlen = remaining;
+ } else {
+ txlen = (BMI_DATASZ_MAX - header);
+ }
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &address, sizeof(address));
+ offset += sizeof(address);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &txlen, sizeof(txlen));
+ offset += sizeof(txlen);
+ A_MEMCPY(&(pBMICmdBuf[offset]), src, txlen);
+ offset += txlen;
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+ remaining -= txlen; address += txlen;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Write Memory: Exit\n"));
+
+ return A_OK;
+}
+
+A_STATUS
+BMIExecute(HIF_DEVICE *device,
+ A_UINT32 address,
+ A_UINT32 *param)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+
+ A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(address) + sizeof(param)));
+ memset (pBMICmdBuf, 0, sizeof(cid) + sizeof(address) + sizeof(param));
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI Execute: Enter (device: 0x%p, address: 0x%x, param: %d)\n",
+ device, address, *param));
+
+ cid = BMI_EXECUTE;
+
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &address, sizeof(address));
+ offset += sizeof(address);
+ A_MEMCPY(&(pBMICmdBuf[offset]), param, sizeof(*param));
+ offset += sizeof(*param);
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+
+ status = bmiBufferReceive(device, pBMICmdBuf, sizeof(*param), FALSE);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
+ return A_ERROR;
+ }
+
+ A_MEMCPY(param, pBMICmdBuf, sizeof(*param));
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Execute: Exit (param: %d)\n", *param));
+ return A_OK;
+}
+
+A_STATUS
+BMISetAppStart(HIF_DEVICE *device,
+ A_UINT32 address)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+
+ A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(address)));
+ memset (pBMICmdBuf, 0, sizeof(cid) + sizeof(address));
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI Set App Start: Enter (device: 0x%p, address: 0x%x)\n",
+ device, address));
+
+ cid = BMI_SET_APP_START;
+
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &address, sizeof(address));
+ offset += sizeof(address);
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Set App Start: Exit\n"));
+ return A_OK;
+}
+
+A_STATUS
+BMIReadSOCRegister(HIF_DEVICE *device,
+ A_UINT32 address,
+ A_UINT32 *param)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+
+ A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(address)));
+ memset (pBMICmdBuf, 0, sizeof(cid) + sizeof(address));
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI Read SOC Register: Enter (device: 0x%p, address: 0x%x)\n",
+ device, address));
+
+ cid = BMI_READ_SOC_REGISTER;
+
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &address, sizeof(address));
+ offset += sizeof(address);
+
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+
+ status = bmiBufferReceive(device, pBMICmdBuf, sizeof(*param), TRUE);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
+ return A_ERROR;
+ }
+ A_MEMCPY(param, pBMICmdBuf, sizeof(*param));
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read SOC Register: Exit (value: %d)\n", *param));
+ return A_OK;
+}
+
+A_STATUS
+BMIWriteSOCRegister(HIF_DEVICE *device,
+ A_UINT32 address,
+ A_UINT32 param)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+
+ A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(address) + sizeof(param)));
+ memset (pBMICmdBuf, 0, sizeof(cid) + sizeof(address) + sizeof(param));
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI Write SOC Register: Enter (device: 0x%p, address: 0x%x, param: %d)\n",
+ device, address, param));
+
+ cid = BMI_WRITE_SOC_REGISTER;
+
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &address, sizeof(address));
+ offset += sizeof(address);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &param, sizeof(param));
+ offset += sizeof(param);
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read SOC Register: Exit\n"));
+ return A_OK;
+}
+
+A_STATUS
+BMIrompatchInstall(HIF_DEVICE *device,
+ A_UINT32 ROM_addr,
+ A_UINT32 RAM_addr,
+ A_UINT32 nbytes,
+ A_UINT32 do_activate,
+ A_UINT32 *rompatch_id)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+
+ A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
+ sizeof(nbytes) + sizeof(do_activate)));
+ memset(pBMICmdBuf, 0, sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
+ sizeof(nbytes) + sizeof(do_activate));
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI rompatch Install: Enter (device: 0x%p, ROMaddr: 0x%x, RAMaddr: 0x%x length: %d activate: %d)\n",
+ device, ROM_addr, RAM_addr, nbytes, do_activate));
+
+ cid = BMI_ROMPATCH_INSTALL;
+
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &ROM_addr, sizeof(ROM_addr));
+ offset += sizeof(ROM_addr);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &RAM_addr, sizeof(RAM_addr));
+ offset += sizeof(RAM_addr);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &nbytes, sizeof(nbytes));
+ offset += sizeof(nbytes);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &do_activate, sizeof(do_activate));
+ offset += sizeof(do_activate);
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+
+ status = bmiBufferReceive(device, pBMICmdBuf, sizeof(*rompatch_id), TRUE);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
+ return A_ERROR;
+ }
+ A_MEMCPY(rompatch_id, pBMICmdBuf, sizeof(*rompatch_id));
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch Install: (rompatch_id=%d)\n", *rompatch_id));
+ return A_OK;
+}
+
+A_STATUS
+BMIrompatchUninstall(HIF_DEVICE *device,
+ A_UINT32 rompatch_id)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+
+ A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(rompatch_id)));
+ memset (pBMICmdBuf, 0, sizeof(cid) + sizeof(rompatch_id));
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI rompatch Uninstall: Enter (device: 0x%p, rompatch_id: %d)\n",
+ device, rompatch_id));
+
+ cid = BMI_ROMPATCH_UNINSTALL;
+
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &rompatch_id, sizeof(rompatch_id));
+ offset += sizeof(rompatch_id);
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch UNinstall: (rompatch_id=0x%x)\n", rompatch_id));
+ return A_OK;
+}
+
+static A_STATUS
+_BMIrompatchChangeActivation(HIF_DEVICE *device,
+ A_UINT32 rompatch_count,
+ A_UINT32 *rompatch_list,
+ A_UINT32 do_activate)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+ A_UINT32 length;
+
+ A_ASSERT(BMI_COMMAND_FITS(BMI_DATASZ_MAX + sizeof(cid) + sizeof(rompatch_count)));
+ memset(pBMICmdBuf, 0, BMI_DATASZ_MAX + sizeof(cid) + sizeof(rompatch_count));
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI Change rompatch Activation: Enter (device: 0x%p, count: %d)\n",
+ device, rompatch_count));
+
+ cid = do_activate ? BMI_ROMPATCH_ACTIVATE : BMI_ROMPATCH_DEACTIVATE;
+
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &rompatch_count, sizeof(rompatch_count));
+ offset += sizeof(rompatch_count);
+ length = rompatch_count * sizeof(*rompatch_list);
+ A_MEMCPY(&(pBMICmdBuf[offset]), rompatch_list, length);
+ offset += length;
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Change rompatch Activation: Exit\n"));
+
+ return A_OK;
+}
+
+A_STATUS
+BMIrompatchActivate(HIF_DEVICE *device,
+ A_UINT32 rompatch_count,
+ A_UINT32 *rompatch_list)
+{
+ return _BMIrompatchChangeActivation(device, rompatch_count, rompatch_list, 1);
+}
+
+A_STATUS
+BMIrompatchDeactivate(HIF_DEVICE *device,
+ A_UINT32 rompatch_count,
+ A_UINT32 *rompatch_list)
+{
+ return _BMIrompatchChangeActivation(device, rompatch_count, rompatch_list, 0);
+}
+
+A_STATUS
+BMILZData(HIF_DEVICE *device,
+ A_UCHAR *buffer,
+ A_UINT32 length)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+ A_UINT32 remaining, txlen;
+ const A_UINT32 header = sizeof(cid) + sizeof(length);
+
+ A_ASSERT(BMI_COMMAND_FITS(BMI_DATASZ_MAX+header));
+ memset (pBMICmdBuf, 0, BMI_DATASZ_MAX+header);
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI Send LZ Data: Enter (device: 0x%p, length: %d)\n",
+ device, length));
+
+ cid = BMI_LZ_DATA;
+
+ remaining = length;
+ while (remaining)
+ {
+ txlen = (remaining < (BMI_DATASZ_MAX - header)) ?
+ remaining : (BMI_DATASZ_MAX - header);
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &txlen, sizeof(txlen));
+ offset += sizeof(txlen);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &buffer[length - remaining], txlen);
+ offset += txlen;
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
+ return A_ERROR;
+ }
+ remaining -= txlen;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI LZ Data: Exit\n"));
+
+ return A_OK;
+}
+
+A_STATUS
+BMILZStreamStart(HIF_DEVICE *device,
+ A_UINT32 address)
+{
+ A_UINT32 cid;
+ A_STATUS status;
+ A_UINT32 offset;
+
+ A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(address)));
+ memset (pBMICmdBuf, 0, sizeof(cid) + sizeof(address));
+
+ if (bmiDone) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
+ ("BMI LZ Stream Start: Enter (device: 0x%p, address: 0x%x)\n",
+ device, address));
+
+ cid = BMI_LZ_STREAM_START;
+ offset = 0;
+ A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
+ offset += sizeof(cid);
+ A_MEMCPY(&(pBMICmdBuf[offset]), &address, sizeof(address));
+ offset += sizeof(address);
+ status = bmiBufferSend(device, pBMICmdBuf, offset);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to Start LZ Stream to the device\n"));
+ return A_ERROR;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI LZ Stream Start: Exit\n"));
+
+ return A_OK;
+}
+
+/* BMI Access routines */
+A_STATUS
+bmiBufferSend(HIF_DEVICE *device,
+ A_UCHAR *buffer,
+ A_UINT32 length)
+{
+ A_STATUS status;
+ A_UINT32 timeout;
+ A_UINT32 address;
+ A_UINT32 mboxAddress[HTC_MAILBOX_NUM_MAX];
+
+ HIFConfigureDevice(device, HIF_DEVICE_GET_MBOX_ADDR,
+ &mboxAddress[0], sizeof(mboxAddress));
+
+ *pBMICmdCredits = 0;
+ timeout = BMI_COMMUNICATION_TIMEOUT;
+
+ while(timeout-- && !(*pBMICmdCredits)) {
+ /* Read the counter register to get the command credits */
+ address = COUNT_DEC_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 4;
+ /* hit the credit counter with a 4-byte access, the first byte read will hit the counter and cause
+ * a decrement, while the remaining 3 bytes has no effect. The rationale behind this is to
+ * make all HIF accesses 4-byte aligned */
+ status = HIFReadWrite(device, address, (A_UINT8 *)pBMICmdCredits, 4,
+ HIF_RD_SYNC_BYTE_INC, NULL);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to decrement the command credit count register\n"));
+ return A_ERROR;
+ }
+ /* the counter is only 8=bits, ignore anything in the upper 3 bytes */
+ (*pBMICmdCredits) &= 0xFF;
+ }
+
+ if (*pBMICmdCredits) {
+ address = mboxAddress[ENDPOINT1];
+ status = HIFReadWrite(device, address, buffer, length,
+ HIF_WR_SYNC_BYTE_INC, NULL);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to send the BMI data to the device\n"));
+ return A_ERROR;
+ }
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("BMI Communication timeout - bmiBufferSend\n"));
+ return A_ERROR;
+ }
+
+ return status;
+}
+
+A_STATUS
+bmiBufferReceive(HIF_DEVICE *device,
+ A_UCHAR *buffer,
+ A_UINT32 length,
+ A_BOOL want_timeout)
+{
+ A_STATUS status;
+ A_UINT32 address;
+ A_UINT32 mboxAddress[HTC_MAILBOX_NUM_MAX];
+ HIF_PENDING_EVENTS_INFO hifPendingEvents;
+ static HIF_PENDING_EVENTS_FUNC getPendingEventsFunc = NULL;
+
+ if (!pendingEventsFuncCheck) {
+ /* see if the HIF layer implements an alternative function to get pending events
+ * do this only once! */
+ HIFConfigureDevice(device,
+ HIF_DEVICE_GET_PENDING_EVENTS_FUNC,
+ &getPendingEventsFunc,
+ sizeof(getPendingEventsFunc));
+ pendingEventsFuncCheck = TRUE;
+ }
+
+ HIFConfigureDevice(device, HIF_DEVICE_GET_MBOX_ADDR,
+ &mboxAddress[0], sizeof(mboxAddress));
+
+ /*
+ * During normal bootup, small reads may be required.
+ * Rather than issue an HIF Read and then wait as the Target
+ * adds successive bytes to the FIFO, we wait here until
+ * we know that response data is available.
+ *
+ * This allows us to cleanly timeout on an unexpected
+ * Target failure rather than risk problems at the HIF level. In
+ * particular, this avoids SDIO timeouts and possibly garbage
+ * data on some host controllers. And on an interconnect
+ * such as Compact Flash (as well as some SDIO masters) which
+ * does not provide any indication on data timeout, it avoids
+ * a potential hang or garbage response.
+ *
+ * Synchronization is more difficult for reads larger than the
+ * size of the MBOX FIFO (128B), because the Target is unable
+ * to push the 129th byte of data until AFTER the Host posts an
+ * HIF Read and removes some FIFO data. So for large reads the
+ * Host proceeds to post an HIF Read BEFORE all the data is
+ * actually available to read. Fortunately, large BMI reads do
+ * not occur in practice -- they're supported for debug/development.
+ *
+ * So Host/Target BMI synchronization is divided into these cases:
+ * CASE 1: length < 4
+ * Should not happen
+ *
+ * CASE 2: 4 <= length <= 128
+ * Wait for first 4 bytes to be in FIFO
+ * If CONSERVATIVE_BMI_READ is enabled, also wait for
+ * a BMI command credit, which indicates that the ENTIRE
+ * response is available in the the FIFO
+ *
+ * CASE 3: length > 128
+ * Wait for the first 4 bytes to be in FIFO
+ *
+ * For most uses, a small timeout should be sufficient and we will
+ * usually see a response quickly; but there may be some unusual
+ * (debug) cases of BMI_EXECUTE where we want an larger timeout.
+ * For now, we use an unbounded busy loop while waiting for
+ * BMI_EXECUTE.
+ *
+ * If BMI_EXECUTE ever needs to support longer-latency execution,
+ * especially in production, this code needs to be enhanced to sleep
+ * and yield. Also note that BMI_COMMUNICATION_TIMEOUT is currently
+ * a function of Host processor speed.
+ */
+ if (length >= 4) { /* NB: Currently, always true */
+ /*
+ * NB: word_available is declared static for esoteric reasons
+ * having to do with protection on some OSes.
+ */
+ static A_UINT32 word_available;
+ A_UINT32 timeout;
+
+ word_available = 0;
+ timeout = BMI_COMMUNICATION_TIMEOUT;
+ while((!want_timeout || timeout--) && !word_available) {
+
+ if (getPendingEventsFunc != NULL) {
+ status = getPendingEventsFunc(device,
+ &hifPendingEvents,
+ NULL);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("BMI: Failed to get pending events \n"));
+ break;
+ }
+
+ if (hifPendingEvents.AvailableRecvBytes >= sizeof(A_UINT32)) {
+ word_available = 1;
+ }
+ continue;
+ }
+
+ status = HIFReadWrite(device, RX_LOOKAHEAD_VALID_ADDRESS, (A_UINT8 *)&word_available,
+ sizeof(word_available), HIF_RD_SYNC_BYTE_INC, NULL);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read RX_LOOKAHEAD_VALID register\n"));
+ return A_ERROR;
+ }
+ /* We did a 4-byte read to the same register; all we really want is one bit */
+ word_available &= (1 << ENDPOINT1);
+ }
+
+ if (!word_available) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("BMI Communication timeout - bmiBufferReceive FIFO empty\n"));
+ return A_ERROR;
+ }
+ }
+
+#define CONSERVATIVE_BMI_READ 0
+#if CONSERVATIVE_BMI_READ
+ /*
+ * This is an extra-conservative CREDIT check. It guarantees
+ * that ALL data is available in the FIFO before we start to
+ * read from the interconnect.
+ *
+ * This credit check is useless when firmware chooses to
+ * allow multiple outstanding BMI Command Credits, since the next
+ * credit will already be present. To restrict the Target to one
+ * BMI Command Credit, see HI_OPTION_BMI_CRED_LIMIT.
+ *
+ * And for large reads (when HI_OPTION_BMI_CRED_LIMIT is set)
+ * we cannot wait for the next credit because the Target's FIFO
+ * will not hold the entire response. So we need the Host to
+ * start to empty the FIFO sooner. (And again, large reads are
+ * not used in practice; they are for debug/development only.)
+ *
+ * For a more conservative Host implementation (which would be
+ * safer for a Compact Flash interconnect):
+ * Set CONSERVATIVE_BMI_READ (above) to 1
+ * Set HI_OPTION_BMI_CRED_LIMIT and
+ * reduce BMI_DATASZ_MAX to 32 or 64
+ */
+ if ((length > 4) && (length < 128)) { /* check against MBOX FIFO size */
+ A_UINT32 timeout;
+
+ *pBMICmdCredits = 0;
+ timeout = BMI_COMMUNICATION_TIMEOUT;
+ while((!want_timeout || timeout--) && !(*pBMICmdCredits) {
+ /* Read the counter register to get the command credits */
+ address = COUNT_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 1;
+ /* read the counter using a 4-byte read. Since the counter is NOT auto-decrementing,
+ * we can read this counter multiple times using a non-incrementing address mode.
+ * The rationale here is to make all HIF accesses a multiple of 4 bytes */
+ status = HIFReadWrite(device, address, (A_UINT8 *)pBMICmdCredits, sizeof(*pBMICmdCredits),
+ HIF_RD_SYNC_BYTE_FIX, NULL);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read the command credit count register\n"));
+ return A_ERROR;
+ }
+ /* we did a 4-byte read to the same count register so mask off upper bytes */
+ (*pBMICmdCredits) &= 0xFF;
+ }
+
+ if (!(*pBMICmdCredits)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("BMI Communication timeout- bmiBufferReceive no credit\n"));
+ return A_ERROR;
+ }
+ }
+#endif
+
+ address = mboxAddress[ENDPOINT1];
+ status = HIFReadWrite(device, address, buffer, length, HIF_RD_SYNC_BYTE_INC, NULL);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read the BMI data from the device\n"));
+ return A_ERROR;
+ }
+
+ return A_OK;
+}
+
+A_STATUS
+BMIFastDownload(HIF_DEVICE *device, A_UINT32 address, A_UCHAR *buffer, A_UINT32 length)
+{
+ A_STATUS status = A_ERROR;
+ A_UINT32 lastWord = 0;
+ A_UINT32 lastWordOffset = length & ~0x3;
+ A_UINT32 unalignedBytes = length & 0x3;
+
+ status = BMILZStreamStart (device, address);
+ if (A_FAILED(status)) {
+ return A_ERROR;
+ }
+
+ if (unalignedBytes) {
+ /* copy the last word into a zero padded buffer */
+ A_MEMCPY(&lastWord, &buffer[lastWordOffset], unalignedBytes);
+ }
+
+ status = BMILZData(device, buffer, lastWordOffset);
+
+ if (A_FAILED(status)) {
+ return A_ERROR;
+ }
+
+ if (unalignedBytes) {
+ status = BMILZData(device, (A_UINT8 *)&lastWord, 4);
+ }
+
+ if (A_SUCCESS(status)) {
+ //
+ // Close compressed stream and open a new (fake) one. This serves mainly to flush Target caches.
+ //
+ status = BMILZStreamStart (device, 0x00);
+ if (A_FAILED(status)) {
+ return A_ERROR;
+ }
+ }
+ return status;
+}
+
+A_STATUS
+BMIRawWrite(HIF_DEVICE *device, A_UCHAR *buffer, A_UINT32 length)
+{
+ return bmiBufferSend(device, buffer, length);
+}
+
+A_STATUS
+BMIRawRead(HIF_DEVICE *device, A_UCHAR *buffer, A_UINT32 length, A_BOOL want_timeout)
+{
+ return bmiBufferReceive(device, buffer, length, want_timeout);
+}
diff --git a/drivers/staging/ath6kl/hif/common/hif_sdio_common.h b/drivers/staging/ath6kl/hif/common/hif_sdio_common.h
new file mode 100644
index 00000000000..0f4e913cb13
--- /dev/null
+++ b/drivers/staging/ath6kl/hif/common/hif_sdio_common.h
@@ -0,0 +1,87 @@
+//------------------------------------------------------------------------------
+// Copyright (c) 2009-2010 Atheros Corporation. All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+// common header file for HIF modules designed for SDIO
+//
+// Author(s): ="Atheros"
+//==============================================================================
+
+#ifndef HIF_SDIO_COMMON_H_
+#define HIF_SDIO_COMMON_H_
+
+ /* SDIO manufacturer ID and Codes */
+#define MANUFACTURER_ID_AR6002_BASE 0x200
+#define MANUFACTURER_ID_AR6003_BASE 0x300
+#define MANUFACTURER_ID_AR6K_BASE_MASK 0xFF00
+#define FUNCTION_CLASS 0x0
+#define MANUFACTURER_CODE 0x271 /* Atheros */
+
+ /* Mailbox address in SDIO address space */
+#define HIF_MBOX_BASE_ADDR 0x800
+#define HIF_MBOX_WIDTH 0x800
+#define HIF_MBOX_START_ADDR(mbox) \
+ ( HIF_MBOX_BASE_ADDR + mbox * HIF_MBOX_WIDTH)
+
+#define HIF_MBOX_END_ADDR(mbox) \
+ (HIF_MBOX_START_ADDR(mbox) + HIF_MBOX_WIDTH - 1)
+
+ /* extended MBOX address for larger MBOX writes to MBOX 0*/
+#define HIF_MBOX0_EXTENDED_BASE_ADDR 0x2800
+#define HIF_MBOX0_EXTENDED_WIDTH_AR6002 (6*1024)
+#define HIF_MBOX0_EXTENDED_WIDTH_AR6003 (18*1024)
+
+ /* version 1 of the chip has only a 12K extended mbox range */
+#define HIF_MBOX0_EXTENDED_BASE_ADDR_AR6003_V1 0x4000
+#define HIF_MBOX0_EXTENDED_WIDTH_AR6003_V1 (12*1024)
+
+ /* GMBOX addresses */
+#define HIF_GMBOX_BASE_ADDR 0x7000
+#define HIF_GMBOX_WIDTH 0x4000
+
+ /* for SDIO we recommend a 128-byte block size */
+#define HIF_DEFAULT_IO_BLOCK_SIZE 128
+
+ /* set extended MBOX window information for SDIO interconnects */
+static INLINE void SetExtendedMboxWindowInfo(A_UINT16 Manfid, HIF_DEVICE_MBOX_INFO *pInfo)
+{
+ switch (Manfid & MANUFACTURER_ID_AR6K_BASE_MASK) {
+ case MANUFACTURER_ID_AR6002_BASE :
+ /* MBOX 0 has an extended range */
+ pInfo->MboxProp[0].ExtendedAddress = HIF_MBOX0_EXTENDED_BASE_ADDR;
+ pInfo->MboxProp[0].ExtendedSize = HIF_MBOX0_EXTENDED_WIDTH_AR6002;
+ break;
+ case MANUFACTURER_ID_AR6003_BASE :
+ /* MBOX 0 has an extended range */
+ pInfo->MboxProp[0].ExtendedAddress = HIF_MBOX0_EXTENDED_BASE_ADDR_AR6003_V1;
+ pInfo->MboxProp[0].ExtendedSize = HIF_MBOX0_EXTENDED_WIDTH_AR6003_V1;
+ pInfo->GMboxAddress = HIF_GMBOX_BASE_ADDR;
+ pInfo->GMboxSize = HIF_GMBOX_WIDTH;
+ break;
+ default:
+ A_ASSERT(FALSE);
+ break;
+ }
+}
+
+/* special CCCR (func 0) registers */
+
+#define CCCR_SDIO_IRQ_MODE_REG 0xF0 /* interrupt mode register */
+#define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ (1 << 0) /* mode to enable special 4-bit interrupt assertion without clock*/
+
+#endif /*HIF_SDIO_COMMON_H_*/
diff --git a/drivers/staging/ath6kl/hif/sdio/linux_sdio/include/hif_internal.h b/drivers/staging/ath6kl/hif/sdio/linux_sdio/include/hif_internal.h
new file mode 100644
index 00000000000..857f35f36ca
--- /dev/null
+++ b/drivers/staging/ath6kl/hif/sdio/linux_sdio/include/hif_internal.h
@@ -0,0 +1,134 @@
+//------------------------------------------------------------------------------
+// <copyright file="hif_internal.h" company="Atheros">
+// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+// internal header file for hif layer
+//
+// Author(s): ="Atheros"
+//==============================================================================
+#ifndef _HIF_INTERNAL_H_
+#define _HIF_INTERNAL_H_
+
+#include "a_config.h"
+#include "athdefs.h"
+#include "a_types.h"
+#include "a_osapi.h"
+#include "hif.h"
+#include "../../../common/hif_sdio_common.h"
+#include <linux/scatterlist.h>
+#define HIF_LINUX_MMC_SCATTER_SUPPORT
+
+#define BUS_REQUEST_MAX_NUM 64
+
+#define SDIO_CLOCK_FREQUENCY_DEFAULT 25000000
+#define SDWLAN_ENABLE_DISABLE_TIMEOUT 20
+#define FLAGS_CARD_ENAB 0x02
+#define FLAGS_CARD_IRQ_UNMSK 0x04
+
+#define HIF_MBOX_BLOCK_SIZE HIF_DEFAULT_IO_BLOCK_SIZE
+#define HIF_MBOX0_BLOCK_SIZE 1
+#define HIF_MBOX1_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE
+#define HIF_MBOX2_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE
+#define HIF_MBOX3_BLOCK_SIZE HIF_MBOX_BLOCK_SIZE
+
+struct _HIF_SCATTER_REQ_PRIV;
+
+typedef struct bus_request {
+ struct bus_request *next; /* link list of available requests */
+ struct bus_request *inusenext; /* link list of in use requests */
+ struct semaphore sem_req;
+ A_UINT32 address; /* request data */
+ A_UCHAR *buffer;
+ A_UINT32 length;
+ A_UINT32 request;
+ void *context;
+ A_STATUS status;
+ struct _HIF_SCATTER_REQ_PRIV *pScatterReq; /* this request is a scatter request */
+} BUS_REQUEST;
+
+struct hif_device {
+ struct sdio_func *func;
+ spinlock_t asynclock;
+ struct task_struct* async_task; /* task to handle async commands */
+ struct semaphore sem_async; /* wake up for async task */
+ int async_shutdown; /* stop the async task */
+ struct completion async_completion; /* thread completion */
+ BUS_REQUEST *asyncreq; /* request for async tasklet */
+ BUS_REQUEST *taskreq; /* async tasklet data */
+ spinlock_t lock;
+ BUS_REQUEST *s_busRequestFreeQueue; /* free list */
+ BUS_REQUEST busRequest[BUS_REQUEST_MAX_NUM]; /* available bus requests */
+ void *claimedContext;
+ HTC_CALLBACKS htcCallbacks;
+ A_UINT8 *dma_buffer;
+ DL_LIST ScatterReqHead; /* scatter request list head */
+ A_BOOL scatter_enabled; /* scatter enabled flag */
+ A_BOOL is_suspend;
+ A_BOOL is_disabled;
+ atomic_t irqHandling;
+ HIF_DEVICE_POWER_CHANGE_TYPE powerConfig;
+ const struct sdio_device_id *id;
+};
+
+#define HIF_DMA_BUFFER_SIZE (32 * 1024)
+#define CMD53_FIXED_ADDRESS 1
+#define CMD53_INCR_ADDRESS 2
+
+BUS_REQUEST *hifAllocateBusRequest(HIF_DEVICE *device);
+void hifFreeBusRequest(HIF_DEVICE *device, BUS_REQUEST *busrequest);
+void AddToAsyncList(HIF_DEVICE *device, BUS_REQUEST *busrequest);
+
+#ifdef HIF_LINUX_MMC_SCATTER_SUPPORT
+
+#define MAX_SCATTER_REQUESTS 4
+#define MAX_SCATTER_ENTRIES_PER_REQ 16
+#define MAX_SCATTER_REQ_TRANSFER_SIZE 32*1024
+
+typedef struct _HIF_SCATTER_REQ_PRIV {
+ HIF_SCATTER_REQ *pHifScatterReq; /* HIF scatter request with allocated entries */
+ HIF_DEVICE *device; /* this device */
+ BUS_REQUEST *busrequest; /* request associated with request */
+ /* scatter list for linux */
+ struct scatterlist sgentries[MAX_SCATTER_ENTRIES_PER_REQ];
+} HIF_SCATTER_REQ_PRIV;
+
+#define ATH_DEBUG_SCATTER ATH_DEBUG_MAKE_MODULE_MASK(0)
+
+A_STATUS SetupHIFScatterSupport(HIF_DEVICE *device, HIF_DEVICE_SCATTER_SUPPORT_INFO *pInfo);
+void CleanupHIFScatterResources(HIF_DEVICE *device);
+A_STATUS DoHifReadWriteScatter(HIF_DEVICE *device, BUS_REQUEST *busrequest);
+
+#else // HIF_LINUX_MMC_SCATTER_SUPPORT
+
+static inline A_STATUS SetupHIFScatterSupport(HIF_DEVICE *device, HIF_DEVICE_SCATTER_SUPPORT_INFO *pInfo)
+{
+ return A_ENOTSUP;
+}
+
+static inline A_STATUS DoHifReadWriteScatter(HIF_DEVICE *device, BUS_REQUEST *busrequest)
+{
+ return A_ENOTSUP;
+}
+
+#define CleanupHIFScatterResources(d) { }
+
+#endif // HIF_LINUX_MMC_SCATTER_SUPPORT
+
+#endif // _HIF_INTERNAL_H_
+
diff --git a/drivers/staging/ath6kl/hif/sdio/linux_sdio/src/hif.c b/drivers/staging/ath6kl/hif/sdio/linux_sdio/src/hif.c
new file mode 100644
index 00000000000..c307a555936
--- /dev/null
+++ b/drivers/staging/ath6kl/hif/sdio/linux_sdio/src/hif.c
@@ -0,0 +1,1298 @@
+//------------------------------------------------------------------------------
+// <copyright file="hif.c" company="Atheros">
+// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+// HIF layer reference implementation for Linux Native MMC stack
+//
+// Author(s): ="Atheros"
+//==============================================================================
+#include <linux/mmc/card.h>
+#include <linux/mmc/mmc.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/sdio.h>
+#include <linux/mmc/sd.h>
+#include <linux/kthread.h>
+
+/* by default setup a bounce buffer for the data packets, if the underlying host controller driver
+ does not use DMA you may be able to skip this step and save the memory allocation and transfer time */
+#define HIF_USE_DMA_BOUNCE_BUFFER 1
+#include "hif_internal.h"
+#define ATH_MODULE_NAME hif
+#include "a_debug.h"
+#include "AR6002/hw2.0/hw/mbox_host_reg.h"
+
+#if HIF_USE_DMA_BOUNCE_BUFFER
+/* macro to check if DMA buffer is WORD-aligned and DMA-able. Most host controllers assume the
+ * buffer is DMA'able and will bug-check otherwise (i.e. buffers on the stack).
+ * virt_addr_valid check fails on stack memory.
+ */
+#define BUFFER_NEEDS_BOUNCE(buffer) (((unsigned long)(buffer) & 0x3) || !virt_addr_valid((buffer)))
+#else
+#define BUFFER_NEEDS_BOUNCE(buffer) (FALSE)
+#endif
+
+/* ATHENV */
+#if defined(CONFIG_PM)
+#define dev_to_sdio_func(d) container_of(d, struct sdio_func, dev)
+#define to_sdio_driver(d) container_of(d, struct sdio_driver, drv)
+static int hifDeviceSuspend(struct device *dev);
+static int hifDeviceResume(struct device *dev);
+#endif /* CONFIG_PM */
+static int hifDeviceInserted(struct sdio_func *func, const struct sdio_device_id *id);
+static void hifDeviceRemoved(struct sdio_func *func);
+static HIF_DEVICE *addHifDevice(struct sdio_func *func);
+static HIF_DEVICE *getHifDevice(struct sdio_func *func);
+static void delHifDevice(HIF_DEVICE * device);
+static int Func0_CMD52WriteByte(struct mmc_card *card, unsigned int address, unsigned char byte);
+static int Func0_CMD52ReadByte(struct mmc_card *card, unsigned int address, unsigned char *byte);
+
+int reset_sdio_on_unload = 0;
+module_param(reset_sdio_on_unload, int, 0644);
+
+extern A_UINT32 nohifscattersupport;
+
+
+/* ------ Static Variables ------ */
+static const struct sdio_device_id ar6k_id_table[] = {
+ { SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6002_BASE | 0x0)) },
+ { SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6002_BASE | 0x1)) },
+ { SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0)) },
+ { SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1)) },
+ { /* null */ },
+};
+MODULE_DEVICE_TABLE(sdio, ar6k_id_table);
+
+static struct sdio_driver ar6k_driver = {
+ .name = "ar6k_wlan",
+ .id_table = ar6k_id_table,
+ .probe = hifDeviceInserted,
+ .remove = hifDeviceRemoved,
+};
+
+#if defined(CONFIG_PM)
+/* New suspend/resume based on linux-2.6.32
+ * Need to patch linux-2.6.32 with mmc2.6.32_suspend.patch
+ * Need to patch with msmsdcc2.6.29_suspend.patch for msm_sdcc host
+ */
+static struct dev_pm_ops ar6k_device_pm_ops = {
+ .suspend = hifDeviceSuspend,
+ .resume = hifDeviceResume,
+};
+#endif /* CONFIG_PM */
+
+/* make sure we only unregister when registered. */
+static int registered = 0;
+
+OSDRV_CALLBACKS osdrvCallbacks;
+extern A_UINT32 onebitmode;
+extern A_UINT32 busspeedlow;
+extern A_UINT32 debughif;
+
+static void ResetAllCards(void);
+static A_STATUS hifDisableFunc(HIF_DEVICE *device, struct sdio_func *func);
+static A_STATUS hifEnableFunc(HIF_DEVICE *device, struct sdio_func *func);
+
+#ifdef DEBUG
+
+ATH_DEBUG_INSTANTIATE_MODULE_VAR(hif,
+ "hif",
+ "(Linux MMC) Host Interconnect Framework",
+ ATH_DEBUG_MASK_DEFAULTS,
+ 0,
+ NULL);
+
+#endif
+
+
+/* ------ Functions ------ */
+A_STATUS HIFInit(OSDRV_CALLBACKS *callbacks)
+{
+ int status;
+ AR_DEBUG_ASSERT(callbacks != NULL);
+
+ A_REGISTER_MODULE_DEBUG_INFO(hif);
+
+ /* store the callback handlers */
+ osdrvCallbacks = *callbacks;
+
+ /* Register with bus driver core */
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: HIFInit registering\n"));
+ registered = 1;
+#if defined(CONFIG_PM)
+ if (callbacks->deviceSuspendHandler && callbacks->deviceResumeHandler) {
+ ar6k_driver.drv.pm = &ar6k_device_pm_ops;
+ }
+#endif /* CONFIG_PM */
+ status = sdio_register_driver(&ar6k_driver);
+ AR_DEBUG_ASSERT(status==0);
+
+ if (status != 0) {
+ return A_ERROR;
+ }
+
+ return A_OK;
+
+}
+
+static A_STATUS
+__HIFReadWrite(HIF_DEVICE *device,
+ A_UINT32 address,
+ A_UCHAR *buffer,
+ A_UINT32 length,
+ A_UINT32 request,
+ void *context)
+{
+ A_UINT8 opcode;
+ A_STATUS status = A_OK;
+ int ret;
+ A_UINT8 *tbuffer;
+ A_BOOL bounced = FALSE;
+
+ AR_DEBUG_ASSERT(device != NULL);
+ AR_DEBUG_ASSERT(device->func != NULL);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Device: 0x%p, buffer:0x%p (addr:0x%X)\n",
+ device, buffer, address));
+
+ do {
+ if (request & HIF_EXTENDED_IO) {
+ //AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Command type: CMD53\n"));
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("AR6000: Invalid command type: 0x%08x\n", request));
+ status = A_EINVAL;
+ break;
+ }
+
+ if (request & HIF_BLOCK_BASIS) {
+ /* round to whole block length size */
+ length = (length / HIF_MBOX_BLOCK_SIZE) * HIF_MBOX_BLOCK_SIZE;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
+ ("AR6000: Block mode (BlockLen: %d)\n",
+ length));
+ } else if (request & HIF_BYTE_BASIS) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
+ ("AR6000: Byte mode (BlockLen: %d)\n",
+ length));
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("AR6000: Invalid data mode: 0x%08x\n", request));
+ status = A_EINVAL;
+ break;
+ }
+
+#if 0
+ /* useful for checking register accesses */
+ if (length & 0x3) {
+ A_PRINTF(KERN_ALERT"AR6000: HIF (%s) is not a multiple of 4 bytes, addr:0x%X, len:%d\n",
+ request & HIF_WRITE ? "write":"read", address, length);
+ }
+#endif
+
+ if (request & HIF_WRITE) {
+ if ((address >= HIF_MBOX_START_ADDR(0)) &&
+ (address <= HIF_MBOX_END_ADDR(3)))
+ {
+
+ AR_DEBUG_ASSERT(length <= HIF_MBOX_WIDTH);
+
+ /*
+ * Mailbox write. Adjust the address so that the last byte
+ * falls on the EOM address.
+ */
+ address += (HIF_MBOX_WIDTH - length);
+ }
+ }
+
+ if (request & HIF_FIXED_ADDRESS) {
+ opcode = CMD53_FIXED_ADDRESS;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Address mode: Fixed 0x%X\n", address));
+ } else if (request & HIF_INCREMENTAL_ADDRESS) {
+ opcode = CMD53_INCR_ADDRESS;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Address mode: Incremental 0x%X\n", address));
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("AR6000: Invalid address mode: 0x%08x\n", request));
+ status = A_EINVAL;
+ break;
+ }
+
+ if (request & HIF_WRITE) {
+#if HIF_USE_DMA_BOUNCE_BUFFER
+ if (BUFFER_NEEDS_BOUNCE(buffer)) {
+ AR_DEBUG_ASSERT(device->dma_buffer != NULL);
+ tbuffer = device->dma_buffer;
+ /* copy the write data to the dma buffer */
+ AR_DEBUG_ASSERT(length <= HIF_DMA_BUFFER_SIZE);
+ memcpy(tbuffer, buffer, length);
+ bounced = TRUE;
+ } else {
+ tbuffer = buffer;
+ }
+#else
+ tbuffer = buffer;
+#endif
+ if (opcode == CMD53_FIXED_ADDRESS) {
+ ret = sdio_writesb(device->func, address, tbuffer, length);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: writesb ret=%d address: 0x%X, len: %d, 0x%X\n",
+ ret, address, length, *(int *)tbuffer));
+ } else {
+ ret = sdio_memcpy_toio(device->func, address, tbuffer, length);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: writeio ret=%d address: 0x%X, len: %d, 0x%X\n",
+ ret, address, length, *(int *)tbuffer));
+ }
+ } else if (request & HIF_READ) {
+#if HIF_USE_DMA_BOUNCE_BUFFER
+ if (BUFFER_NEEDS_BOUNCE(buffer)) {
+ AR_DEBUG_ASSERT(device->dma_buffer != NULL);
+ AR_DEBUG_ASSERT(length <= HIF_DMA_BUFFER_SIZE);
+ tbuffer = device->dma_buffer;
+ bounced = TRUE;
+ } else {
+ tbuffer = buffer;
+ }
+#else
+ tbuffer = buffer;
+#endif
+ if (opcode == CMD53_FIXED_ADDRESS) {
+ ret = sdio_readsb(device->func, tbuffer, address, length);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: readsb ret=%d address: 0x%X, len: %d, 0x%X\n",
+ ret, address, length, *(int *)tbuffer));
+ } else {
+ ret = sdio_memcpy_fromio(device->func, tbuffer, address, length);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: readio ret=%d address: 0x%X, len: %d, 0x%X\n",
+ ret, address, length, *(int *)tbuffer));
+ }
+#if HIF_USE_DMA_BOUNCE_BUFFER
+ if (bounced) {
+ /* copy the read data from the dma buffer */
+ memcpy(buffer, tbuffer, length);
+ }
+#endif
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("AR6000: Invalid direction: 0x%08x\n", request));
+ status = A_EINVAL;
+ break;
+ }
+
+ if (ret) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("AR6000: SDIO bus operation failed! MMC stack returned : %d \n", ret));
+ status = A_ERROR;
+ }
+ } while (FALSE);
+
+ return status;
+}
+
+void AddToAsyncList(HIF_DEVICE *device, BUS_REQUEST *busrequest)
+{
+ unsigned long flags;
+ BUS_REQUEST *async;
+ BUS_REQUEST *active;
+
+ spin_lock_irqsave(&device->asynclock, flags);
+ active = device->asyncreq;
+ if (active == NULL) {
+ device->asyncreq = busrequest;
+ device->asyncreq->inusenext = NULL;
+ } else {
+ for (async = device->asyncreq;
+ async != NULL;
+ async = async->inusenext) {
+ active = async;
+ }
+ active->inusenext = busrequest;
+ busrequest->inusenext = NULL;
+ }
+ spin_unlock_irqrestore(&device->asynclock, flags);
+}
+
+
+/* queue a read/write request */
+A_STATUS
+HIFReadWrite(HIF_DEVICE *device,
+ A_UINT32 address,
+ A_UCHAR *buffer,
+ A_UINT32 length,
+ A_UINT32 request,
+ void *context)
+{
+ A_STATUS status = A_OK;
+ BUS_REQUEST *busrequest;
+
+
+ AR_DEBUG_ASSERT(device != NULL);
+ AR_DEBUG_ASSERT(device->func != NULL);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Device: %p addr:0x%X\n", device,address));
+
+ do {
+ if ((request & HIF_ASYNCHRONOUS) || (request & HIF_SYNCHRONOUS)){
+ /* serialize all requests through the async thread */
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Execution mode: %s\n",
+ (request & HIF_ASYNCHRONOUS)?"Async":"Synch"));
+ busrequest = hifAllocateBusRequest(device);
+ if (busrequest == NULL) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("AR6000: no async bus requests available (%s, addr:0x%X, len:%d) \n",
+ request & HIF_READ ? "READ":"WRITE", address, length));
+ return A_ERROR;
+ }
+ busrequest->address = address;
+ busrequest->buffer = buffer;
+ busrequest->length = length;
+ busrequest->request = request;
+ busrequest->context = context;
+
+ AddToAsyncList(device, busrequest);
+
+ if (request & HIF_SYNCHRONOUS) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: queued sync req: 0x%lX\n", (unsigned long)busrequest));
+
+ /* wait for completion */
+ up(&device->sem_async);
+ if (down_interruptible(&busrequest->sem_req) != 0) {
+ /* interrupted, exit */
+ return A_ERROR;
+ } else {
+ A_STATUS status = busrequest->status;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: sync return freeing 0x%lX: 0x%X\n",
+ (unsigned long)busrequest, busrequest->status));
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: freeing req: 0x%X\n", (unsigned int)request));
+ hifFreeBusRequest(device, busrequest);
+ return status;
+ }
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: queued async req: 0x%lX\n", (unsigned long)busrequest));
+ up(&device->sem_async);
+ return A_PENDING;
+ }
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("AR6000: Invalid execution mode: 0x%08x\n", (unsigned int)request));
+ status = A_EINVAL;
+ break;
+ }
+ } while(0);
+
+ return status;
+}
+/* thread to serialize all requests, both sync and async */
+static int async_task(void *param)
+ {
+ HIF_DEVICE *device;
+ BUS_REQUEST *request;
+ A_STATUS status;
+ unsigned long flags;
+
+ device = (HIF_DEVICE *)param;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: async task\n"));
+ set_current_state(TASK_INTERRUPTIBLE);
+ while(!device->async_shutdown) {
+ /* wait for work */
+ if (down_interruptible(&device->sem_async) != 0) {
+ /* interrupted, exit */
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: async task interrupted\n"));
+ break;
+ }
+ if (device->async_shutdown) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: async task stopping\n"));
+ break;
+ }
+ /* we want to hold the host over multiple cmds if possible, but holding the host blocks card interrupts */
+ sdio_claim_host(device->func);
+ spin_lock_irqsave(&device->asynclock, flags);
+ /* pull the request to work on */
+ while (device->asyncreq != NULL) {
+ request = device->asyncreq;
+ if (request->inusenext != NULL) {
+ device->asyncreq = request->inusenext;
+ } else {
+ device->asyncreq = NULL;
+ }
+ spin_unlock_irqrestore(&device->asynclock, flags);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: async_task processing req: 0x%lX\n", (unsigned long)request));
+
+ if (request->pScatterReq != NULL) {
+ A_ASSERT(device->scatter_enabled);
+ /* this is a queued scatter request, pass the request to scatter routine which
+ * executes it synchronously, note, no need to free the request since scatter requests
+ * are maintained on a separate list */
+ status = DoHifReadWriteScatter(device,request);
+ } else {
+ /* call HIFReadWrite in sync mode to do the work */
+ status = __HIFReadWrite(device, request->address, request->buffer,
+ request->length, request->request & ~HIF_SYNCHRONOUS, NULL);
+ if (request->request & HIF_ASYNCHRONOUS) {
+ void *context = request->context;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: async_task freeing req: 0x%lX\n", (unsigned long)request));
+ hifFreeBusRequest(device, request);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: async_task completion routine req: 0x%lX\n", (unsigned long)request));
+ device->htcCallbacks.rwCompletionHandler(context, status);
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: async_task upping req: 0x%lX\n", (unsigned long)request));
+ request->status = status;
+ up(&request->sem_req);
+ }
+ }
+ spin_lock_irqsave(&device->asynclock, flags);
+ }
+ spin_unlock_irqrestore(&device->asynclock, flags);
+ sdio_release_host(device->func);
+ }
+
+ complete_and_exit(&device->async_completion, 0);
+ return 0;
+}
+
+static A_INT32 IssueSDCommand(HIF_DEVICE *device, A_UINT32 opcode, A_UINT32 arg, A_UINT32 flags, A_UINT32 *resp)
+{
+ struct mmc_command cmd;
+ A_INT32 err;
+ struct mmc_host *host;
+ struct sdio_func *func;
+
+ func = device->func;
+ host = func->card->host;
+
+ memset(&cmd, 0, sizeof(struct mmc_command));
+ cmd.opcode = opcode;
+ cmd.arg = arg;
+ cmd.flags = flags;
+ err = mmc_wait_for_cmd(host, &cmd, 3);
+
+ if ((!err) && (resp)) {
+ *resp = cmd.resp[0];
+ }
+
+ return err;
+}
+
+A_STATUS ReinitSDIO(HIF_DEVICE *device)
+{
+ A_INT32 err;
+ struct mmc_host *host;
+ struct mmc_card *card;
+ struct sdio_func *func;
+ A_UINT8 cmd52_resp;
+ A_UINT32 clock;
+
+ func = device->func;
+ card = func->card;
+ host = card->host;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: +ReinitSDIO \n"));
+ sdio_claim_host(func);
+
+ do {
+ if (!device->is_suspend) {
+ A_UINT32 resp;
+ A_UINT16 rca;
+ A_UINT32 i;
+ int bit = fls(host->ocr_avail) - 1;
+ /* emulate the mmc_power_up(...) */
+ host->ios.vdd = bit;
+ host->ios.chip_select = MMC_CS_DONTCARE;
+ host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
+ host->ios.power_mode = MMC_POWER_UP;
+ host->ios.bus_width = MMC_BUS_WIDTH_1;
+ host->ios.timing = MMC_TIMING_LEGACY;
+ host->ops->set_ios(host, &host->ios);
+ /*
+ * This delay should be sufficient to allow the power supply
+ * to reach the minimum voltage.
+ */
+ msleep(2);
+
+ host->ios.clock = host->f_min;
+ host->ios.power_mode = MMC_POWER_ON;
+ host->ops->set_ios(host, &host->ios);
+
+ /*
+ * This delay must be at least 74 clock sizes, or 1 ms, or the
+ * time required to reach a stable voltage.
+ */
+ msleep(2);
+
+ /* Issue CMD0. Goto idle state */
+ host->ios.chip_select = MMC_CS_HIGH;
+ host->ops->set_ios(host, &host->ios);
+ msleep(1);
+ err = IssueSDCommand(device, MMC_GO_IDLE_STATE, 0, (MMC_RSP_NONE | MMC_CMD_BC), NULL);
+ host->ios.chip_select = MMC_CS_DONTCARE;
+ host->ops->set_ios(host, &host->ios);
+ msleep(1);
+ host->use_spi_crc = 0;
+
+ if (err) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("ReinitSDIO: CMD0 failed : %d \n",err));
+ break;
+ }
+
+ if (!host->ocr) {
+ /* Issue CMD5, arg = 0 */
+ err = IssueSDCommand(device, SD_IO_SEND_OP_COND, 0, (MMC_RSP_R4 | MMC_CMD_BCR), &resp);
+ if (err) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("ReinitSDIO: CMD5 failed : %d \n",err));
+ break;
+ }
+ host->ocr = resp;
+ }
+
+ /* Issue CMD5, arg = ocr. Wait till card is ready */
+ for (i=0;i<100;i++) {
+ err = IssueSDCommand(device, SD_IO_SEND_OP_COND, host->ocr, (MMC_RSP_R4 | MMC_CMD_BCR), &resp);
+ if (err) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("ReinitSDIO: CMD5 failed : %d \n",err));
+ break;
+ }
+ if (resp & MMC_CARD_BUSY) {
+ break;
+ }
+ msleep(10);
+ }
+
+ if ((i == 100) || (err)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("ReinitSDIO: card in not ready : %d %d \n",i,err));
+ break;
+ }
+
+ /* Issue CMD3, get RCA */
+ err = IssueSDCommand(device, SD_SEND_RELATIVE_ADDR, 0, MMC_RSP_R6 | MMC_CMD_BCR, &resp);
+ if (err) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("ReinitSDIO: CMD3 failed : %d \n",err));
+ break;
+ }
+ rca = resp >> 16;
+ host->ios.bus_mode = MMC_BUSMODE_PUSHPULL;
+ host->ops->set_ios(host, &host->ios);
+
+ /* Issue CMD7, select card */
+ err = IssueSDCommand(device, MMC_SELECT_CARD, (rca << 16), MMC_RSP_R1 | MMC_CMD_AC, NULL);
+ if (err) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("ReinitSDIO: CMD7 failed : %d \n",err));
+ break;
+ }
+ }
+
+ /* Enable high speed */
+ if (card->host->caps & MMC_CAP_SD_HIGHSPEED) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("ReinitSDIO: Set high speed mode\n"));
+ err = Func0_CMD52ReadByte(card, SDIO_CCCR_SPEED, &cmd52_resp);
+ if (err) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("ReinitSDIO: CMD52 read to CCCR speed register failed : %d \n",err));
+ card->state &= ~MMC_STATE_HIGHSPEED;
+ /* no need to break */
+ } else {
+ err = Func0_CMD52WriteByte(card, SDIO_CCCR_SPEED, (cmd52_resp | SDIO_SPEED_EHS));
+ if (err) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("ReinitSDIO: CMD52 write to CCCR speed register failed : %d \n",err));
+ break;
+ }
+ mmc_card_set_highspeed(card);
+ host->ios.timing = MMC_TIMING_SD_HS;
+ host->ops->set_ios(host, &host->ios);
+ }
+ }
+
+ /* Set clock */
+ if (mmc_card_highspeed(card)) {
+ clock = 50000000;
+ } else {
+ clock = card->cis.max_dtr;
+ }
+
+ if (clock > host->f_max) {
+ clock = host->f_max;
+ }
+ host->ios.clock = clock;
+ host->ops->set_ios(host, &host->ios);
+
+
+ if (card->host->caps & MMC_CAP_4_BIT_DATA) {
+ /* CMD52: Set bus width & disable card detect resistor */
+ err = Func0_CMD52WriteByte(card, SDIO_CCCR_IF, SDIO_BUS_CD_DISABLE | SDIO_BUS_WIDTH_4BIT);
+ if (err) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("ReinitSDIO: CMD52 to set bus mode failed : %d \n",err));
+ break;
+ }
+ host->ios.bus_width = MMC_BUS_WIDTH_4;
+ host->ops->set_ios(host, &host->ios);
+ }
+ } while (0);
+
+ sdio_release_host(func);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: -ReinitSDIO \n"));
+
+ return (err) ? A_ERROR : A_OK;
+}
+
+A_STATUS
+PowerStateChangeNotify(HIF_DEVICE *device, HIF_DEVICE_POWER_CHANGE_TYPE config)
+{
+ A_STATUS status = A_OK;
+#if defined(CONFIG_PM)
+ struct sdio_func *func = device->func;
+ int old_reset_val;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: +PowerStateChangeNotify %d\n", config));
+ switch (config) {
+ case HIF_DEVICE_POWER_DOWN:
+ case HIF_DEVICE_POWER_CUT:
+ old_reset_val = reset_sdio_on_unload;
+ reset_sdio_on_unload = 1;
+ status = hifDisableFunc(device, func);
+ reset_sdio_on_unload = old_reset_val;
+ if (!device->is_suspend) {
+ struct mmc_host *host = func->card->host;
+ host->ios.clock = 0;
+ host->ios.vdd = 0;
+ host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
+ host->ios.chip_select = MMC_CS_DONTCARE;
+ host->ios.power_mode = MMC_POWER_OFF;
+ host->ios.bus_width = MMC_BUS_WIDTH_1;
+ host->ios.timing = MMC_TIMING_LEGACY;
+ host->ops->set_ios(host, &host->ios);
+ }
+ break;
+ case HIF_DEVICE_POWER_UP:
+ if (device->powerConfig == HIF_DEVICE_POWER_CUT) {
+ status = ReinitSDIO(device);
+ }
+ if (status == A_OK) {
+ status = hifEnableFunc(device, func);
+ }
+ break;
+ }
+ device->powerConfig = config;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: -PowerStateChangeNotify\n"));
+#endif
+ return status;
+}
+
+A_STATUS
+HIFConfigureDevice(HIF_DEVICE *device, HIF_DEVICE_CONFIG_OPCODE opcode,
+ void *config, A_UINT32 configLen)
+{
+ A_UINT32 count;
+ A_STATUS status = A_OK;
+
+ switch(opcode) {
+ case HIF_DEVICE_GET_MBOX_BLOCK_SIZE:
+ ((A_UINT32 *)config)[0] = HIF_MBOX0_BLOCK_SIZE;
+ ((A_UINT32 *)config)[1] = HIF_MBOX1_BLOCK_SIZE;
+ ((A_UINT32 *)config)[2] = HIF_MBOX2_BLOCK_SIZE;
+ ((A_UINT32 *)config)[3] = HIF_MBOX3_BLOCK_SIZE;
+ break;
+
+ case HIF_DEVICE_GET_MBOX_ADDR:
+ for (count = 0; count < 4; count ++) {
+ ((A_UINT32 *)config)[count] = HIF_MBOX_START_ADDR(count);
+ }
+
+ if (configLen >= sizeof(HIF_DEVICE_MBOX_INFO)) {
+ SetExtendedMboxWindowInfo((A_UINT16)device->func->device,
+ (HIF_DEVICE_MBOX_INFO *)config);
+ }
+
+ break;
+ case HIF_DEVICE_GET_IRQ_PROC_MODE:
+ *((HIF_DEVICE_IRQ_PROCESSING_MODE *)config) = HIF_DEVICE_IRQ_SYNC_ONLY;
+ break;
+ case HIF_CONFIGURE_QUERY_SCATTER_REQUEST_SUPPORT:
+ if (!device->scatter_enabled) {
+ return A_ENOTSUP;
+ }
+ status = SetupHIFScatterSupport(device, (HIF_DEVICE_SCATTER_SUPPORT_INFO *)config);
+ if (A_FAILED(status)) {
+ device->scatter_enabled = FALSE;
+ }
+ break;
+ case HIF_DEVICE_GET_OS_DEVICE:
+ /* pass back a pointer to the SDIO function's "dev" struct */
+ ((HIF_DEVICE_OS_DEVICE_INFO *)config)->pOSDevice = &device->func->dev;
+ break;
+ case HIF_DEVICE_POWER_STATE_CHANGE:
+ status = PowerStateChangeNotify(device, *(HIF_DEVICE_POWER_CHANGE_TYPE *)config);
+ break;
+ default:
+ AR_DEBUG_PRINTF(ATH_DEBUG_WARN,
+ ("AR6000: Unsupported configuration opcode: %d\n", opcode));
+ status = A_ERROR;
+ }
+
+ return status;
+}
+
+void
+HIFShutDownDevice(HIF_DEVICE *device)
+{
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: +HIFShutDownDevice\n"));
+ if (device != NULL) {
+ AR_DEBUG_ASSERT(device->func != NULL);
+ } else {
+ /* since we are unloading the driver anyways, reset all cards in case the SDIO card
+ * is externally powered and we are unloading the SDIO stack. This avoids the problem when
+ * the SDIO stack is reloaded and attempts are made to re-enumerate a card that is already
+ * enumerated */
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: HIFShutDownDevice, resetting\n"));
+ ResetAllCards();
+
+ /* Unregister with bus driver core */
+ if (registered) {
+ registered = 0;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
+ ("AR6000: Unregistering with the bus driver\n"));
+ sdio_unregister_driver(&ar6k_driver);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
+ ("AR6000: Unregistered\n"));
+ }
+ }
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: -HIFShutDownDevice\n"));
+}
+
+static void
+hifIRQHandler(struct sdio_func *func)
+{
+ A_STATUS status;
+ HIF_DEVICE *device;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: +hifIRQHandler\n"));
+
+ device = getHifDevice(func);
+ atomic_set(&device->irqHandling, 1);
+ /* release the host during ints so we can pick it back up when we process cmds */
+ sdio_release_host(device->func);
+ status = device->htcCallbacks.dsrHandler(device->htcCallbacks.context);
+ sdio_claim_host(device->func);
+ atomic_set(&device->irqHandling, 0);
+ AR_DEBUG_ASSERT(status == A_OK || status == A_ECANCELED);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: -hifIRQHandler\n"));
+}
+
+/* handle HTC startup via thread*/
+static int startup_task(void *param)
+{
+ HIF_DEVICE *device;
+
+ device = (HIF_DEVICE *)param;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: call HTC from startup_task\n"));
+ /* start up inform DRV layer */
+ if ((osdrvCallbacks.deviceInsertedHandler(osdrvCallbacks.context,device)) != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Device rejected\n"));
+ }
+ return 0;
+}
+
+#if defined(CONFIG_PM)
+static int enable_task(void *param)
+{
+ HIF_DEVICE *device;
+ device = (HIF_DEVICE *)param;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: call from resume_task\n"));
+
+ /* start up inform DRV layer */
+ if (device &&
+ device->claimedContext &&
+ osdrvCallbacks.devicePowerChangeHandler &&
+ osdrvCallbacks.devicePowerChangeHandler(device->claimedContext, HIF_DEVICE_POWER_UP) != A_OK)
+ {
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: Device rejected\n"));
+ }
+
+ return 0;
+}
+#endif
+
+static int hifDeviceInserted(struct sdio_func *func, const struct sdio_device_id *id)
+{
+ int ret;
+ HIF_DEVICE * device;
+ int count;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
+ ("AR6000: hifDeviceInserted, Function: 0x%X, Vendor ID: 0x%X, Device ID: 0x%X, block size: 0x%X/0x%X\n",
+ func->num, func->vendor, func->device, func->max_blksize, func->cur_blksize));
+
+ addHifDevice(func);
+ device = getHifDevice(func);
+
+ device->id = id;
+ device->is_disabled = TRUE;
+
+ spin_lock_init(&device->lock);
+
+ spin_lock_init(&device->asynclock);
+
+ DL_LIST_INIT(&device->ScatterReqHead);
+
+ if (!nohifscattersupport) {
+ /* try to allow scatter operation on all instances,
+ * unless globally overridden */
+ device->scatter_enabled = TRUE;
+ }
+
+ /* Initialize the bus requests to be used later */
+ A_MEMZERO(device->busRequest, sizeof(device->busRequest));
+ for (count = 0; count < BUS_REQUEST_MAX_NUM; count ++) {
+ sema_init(&device->busRequest[count].sem_req, 0);
+ hifFreeBusRequest(device, &device->busRequest[count]);
+ }
+ sema_init(&device->sem_async, 0);
+
+ ret = hifEnableFunc(device, func);
+
+ return ret;
+}
+
+
+void
+HIFAckInterrupt(HIF_DEVICE *device)
+{
+ AR_DEBUG_ASSERT(device != NULL);
+
+ /* Acknowledge our function IRQ */
+}
+
+void
+HIFUnMaskInterrupt(HIF_DEVICE *device)
+{
+ int ret;;
+
+ AR_DEBUG_ASSERT(device != NULL);
+ AR_DEBUG_ASSERT(device->func != NULL);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: HIFUnMaskInterrupt\n"));
+
+ /* Register the IRQ Handler */
+ sdio_claim_host(device->func);
+ ret = sdio_claim_irq(device->func, hifIRQHandler);
+ sdio_release_host(device->func);
+ AR_DEBUG_ASSERT(ret == 0);
+}
+
+void HIFMaskInterrupt(HIF_DEVICE *device)
+{
+ int ret;
+ AR_DEBUG_ASSERT(device != NULL);
+ AR_DEBUG_ASSERT(device->func != NULL);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: HIFMaskInterrupt\n"));
+
+ /* Mask our function IRQ */
+ sdio_claim_host(device->func);
+ while (atomic_read(&device->irqHandling)) {
+ sdio_release_host(device->func);
+ schedule_timeout(HZ/10);
+ sdio_claim_host(device->func);
+ }
+ ret = sdio_release_irq(device->func);
+ sdio_release_host(device->func);
+ AR_DEBUG_ASSERT(ret == 0);
+}
+
+BUS_REQUEST *hifAllocateBusRequest(HIF_DEVICE *device)
+{
+ BUS_REQUEST *busrequest;
+ unsigned long flag;
+
+ /* Acquire lock */
+ spin_lock_irqsave(&device->lock, flag);
+
+ /* Remove first in list */
+ if((busrequest = device->s_busRequestFreeQueue) != NULL)
+ {
+ device->s_busRequestFreeQueue = busrequest->next;
+ }
+ /* Release lock */
+ spin_unlock_irqrestore(&device->lock, flag);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: hifAllocateBusRequest: 0x%p\n", busrequest));
+ return busrequest;
+}
+
+void
+hifFreeBusRequest(HIF_DEVICE *device, BUS_REQUEST *busrequest)
+{
+ unsigned long flag;
+
+ AR_DEBUG_ASSERT(busrequest != NULL);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: hifFreeBusRequest: 0x%p\n", busrequest));
+ /* Acquire lock */
+ spin_lock_irqsave(&device->lock, flag);
+
+
+ /* Insert first in list */
+ busrequest->next = device->s_busRequestFreeQueue;
+ busrequest->inusenext = NULL;
+ device->s_busRequestFreeQueue = busrequest;
+
+ /* Release lock */
+ spin_unlock_irqrestore(&device->lock, flag);
+}
+
+static A_STATUS hifDisableFunc(HIF_DEVICE *device, struct sdio_func *func)
+{
+ int ret;
+ A_STATUS status = A_OK;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: +hifDisableFunc\n"));
+ device = getHifDevice(func);
+ if (!IS_ERR(device->async_task)) {
+ init_completion(&device->async_completion);
+ device->async_shutdown = 1;
+ up(&device->sem_async);
+ wait_for_completion(&device->async_completion);
+ device->async_task = NULL;
+ }
+ /* Disable the card */
+ sdio_claim_host(device->func);
+ ret = sdio_disable_func(device->func);
+ if (ret) {
+ status = A_ERROR;
+ }
+
+ if (reset_sdio_on_unload) {
+ /* reset the SDIO interface. This is useful in automated testing where the card
+ * does not need to be removed at the end of the test. It is expected that the user will
+ * also unload/reload the host controller driver to force the bus driver to re-enumerate the slot */
+ AR_DEBUG_PRINTF(ATH_DEBUG_WARN, ("AR6000: reseting SDIO card back to uninitialized state \n"));
+
+ /* NOTE : sdio_f0_writeb() cannot be used here, that API only allows access
+ * to undefined registers in the range of: 0xF0-0xFF */
+
+ ret = Func0_CMD52WriteByte(device->func->card, SDIO_CCCR_ABORT, (1 << 3));
+ if (ret) {
+ status = A_ERROR;
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("AR6000: reset failed : %d \n",ret));
+ }
+ }
+
+ sdio_release_host(device->func);
+
+ if (status == A_OK) {
+ device->is_disabled = TRUE;
+ }
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: -hifDisableFunc\n"));
+
+ return status;
+}
+
+static int hifEnableFunc(HIF_DEVICE *device, struct sdio_func *func)
+{
+ struct task_struct* pTask;
+ const char *taskName = NULL;
+ int (*taskFunc)(void *) = NULL;
+ int ret = A_OK;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: +hifEnableFunc\n"));
+ device = getHifDevice(func);
+
+ if (device->is_disabled) {
+ /* enable the SDIO function */
+ sdio_claim_host(func);
+
+ if ((device->id->device & MANUFACTURER_ID_AR6K_BASE_MASK) >= MANUFACTURER_ID_AR6003_BASE) {
+ /* enable 4-bit ASYNC interrupt on AR6003 or later devices */
+ ret = Func0_CMD52WriteByte(func->card, CCCR_SDIO_IRQ_MODE_REG, SDIO_IRQ_MODE_ASYNC_4BIT_IRQ);
+ if (ret) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("AR6000: failed to enable 4-bit ASYNC IRQ mode %d \n",ret));
+ sdio_release_host(func);
+ return A_ERROR;
+ }
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: 4-bit ASYNC IRQ mode enabled\n"));
+ }
+ /* give us some time to enable, in ms */
+ func->enable_timeout = 100;
+ ret = sdio_enable_func(func);
+ if (ret) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("AR6000: %s(), Unable to enable AR6K: 0x%X\n",
+ __FUNCTION__, ret));
+ sdio_release_host(func);
+ return A_ERROR;
+ }
+ ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE);
+ sdio_release_host(func);
+ if (ret) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("AR6000: %s(), Unable to set block size 0x%x AR6K: 0x%X\n",
+ __FUNCTION__, HIF_MBOX_BLOCK_SIZE, ret));
+ return A_ERROR;
+ }
+ device->is_disabled = FALSE;
+ /* create async I/O thread */
+ if (!device->async_task) {
+ device->async_shutdown = 0;
+ device->async_task = kthread_create(async_task,
+ (void *)device,
+ "AR6K Async");
+ if (IS_ERR(device->async_task)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("AR6000: %s(), to create async task\n", __FUNCTION__));
+ return A_ERROR;
+ }
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: start async task\n"));
+ wake_up_process(device->async_task );
+ }
+ }
+
+ if (!device->claimedContext) {
+ taskFunc = startup_task;
+ taskName = "AR6K startup";
+ ret = A_OK;
+#if defined(CONFIG_PM)
+ } else {
+ taskFunc = enable_task;
+ taskName = "AR6K enable";
+ ret = A_PENDING;
+#endif /* CONFIG_PM */
+ }
+ /* create resume thread */
+ pTask = kthread_create(taskFunc, (void *)device, taskName);
+ if (IS_ERR(pTask)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("AR6000: %s(), to create enabel task\n", __FUNCTION__));
+ return A_ERROR;
+ }
+ wake_up_process(pTask);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: -hifEnableFunc\n"));
+
+ /* task will call the enable func, indicate pending */
+ return ret;
+}
+
+#if defined(CONFIG_PM)
+static int hifDeviceSuspend(struct device *dev)
+{
+ struct sdio_func *func=dev_to_sdio_func(dev);
+ A_STATUS status = A_OK;
+ HIF_DEVICE *device;
+
+ device = getHifDevice(func);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: +hifDeviceSuspend\n"));
+ if (device && device->claimedContext && osdrvCallbacks.deviceSuspendHandler) {
+ device->is_suspend = TRUE; /* set true first for PowerStateChangeNotify(..) */
+ status = osdrvCallbacks.deviceSuspendHandler(device->claimedContext);
+ if (status != A_OK) {
+ device->is_suspend = FALSE;
+ }
+ }
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: -hifDeviceSuspend\n"));
+
+ switch (status) {
+ case A_OK:
+ return 0;
+ case A_EBUSY:
+ return -EBUSY; /* Hack for kernel in order to support deep sleep and wow */
+ default:
+ return -1;
+ }
+}
+
+static int hifDeviceResume(struct device *dev)
+{
+ struct sdio_func *func=dev_to_sdio_func(dev);
+ A_STATUS status = A_OK;
+ HIF_DEVICE *device;
+
+ device = getHifDevice(func);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: +hifDeviceResume\n"));
+ if (device && device->claimedContext && osdrvCallbacks.deviceSuspendHandler) {
+ status = osdrvCallbacks.deviceResumeHandler(device->claimedContext);
+ if (status == A_OK) {
+ device->is_suspend = FALSE;
+ }
+ }
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: -hifDeviceResume\n"));
+
+ return A_SUCCESS(status) ? 0 : status;
+}
+#endif /* CONFIG_PM */
+
+static void hifDeviceRemoved(struct sdio_func *func)
+{
+ A_STATUS status = A_OK;
+ HIF_DEVICE *device;
+ AR_DEBUG_ASSERT(func != NULL);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: +hifDeviceRemoved\n"));
+ device = getHifDevice(func);
+ if (device->claimedContext != NULL) {
+ status = osdrvCallbacks.deviceRemovedHandler(device->claimedContext, device);
+ }
+
+ if (device->is_disabled) {
+ device->is_disabled = FALSE;
+ } else {
+ status = hifDisableFunc(device, func);
+ }
+ CleanupHIFScatterResources(device);
+
+ delHifDevice(device);
+ AR_DEBUG_ASSERT(status == A_OK);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: -hifDeviceRemoved\n"));
+}
+
+/*
+ * This should be moved to AR6K HTC layer.
+ */
+A_STATUS hifWaitForPendingRecv(HIF_DEVICE *device)
+{
+ A_INT32 cnt = 10;
+ A_UINT8 host_int_status;
+ A_STATUS status = A_OK;
+
+ do {
+ while (atomic_read(&device->irqHandling)) {
+ /* wait until irq handler finished all the jobs */
+ schedule_timeout(HZ/10);
+ }
+ /* check if there is any pending irq due to force done */
+ host_int_status = 0;
+ status = HIFReadWrite(device, HOST_INT_STATUS_ADDRESS,
+ (A_UINT8 *)&host_int_status, sizeof(host_int_status),
+ HIF_RD_SYNC_BYTE_INC, NULL);
+ host_int_status = A_SUCCESS(status) ? (host_int_status & (1 << 0)) : 0;
+ if (host_int_status) {
+ schedule(); /* schedule for next dsrHandler */
+ }
+ } while (host_int_status && --cnt > 0);
+
+ if (host_int_status && cnt == 0) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("AR6000: %s(), Unable clear up pending IRQ before the system suspended\n", __FUNCTION__));
+ }
+
+ return A_OK;
+}
+
+
+static HIF_DEVICE *
+addHifDevice(struct sdio_func *func)
+{
+ HIF_DEVICE *hifdevice;
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: addHifDevice\n"));
+ AR_DEBUG_ASSERT(func != NULL);
+ hifdevice = (HIF_DEVICE *)kzalloc(sizeof(HIF_DEVICE), GFP_KERNEL);
+ AR_DEBUG_ASSERT(hifdevice != NULL);
+#if HIF_USE_DMA_BOUNCE_BUFFER
+ hifdevice->dma_buffer = kmalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL);
+ AR_DEBUG_ASSERT(hifdevice->dma_buffer != NULL);
+#endif
+ hifdevice->func = func;
+ hifdevice->powerConfig = HIF_DEVICE_POWER_UP;
+ sdio_set_drvdata(func, hifdevice);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: addHifDevice; 0x%p\n", hifdevice));
+ return hifdevice;
+}
+
+static HIF_DEVICE *
+getHifDevice(struct sdio_func *func)
+{
+ AR_DEBUG_ASSERT(func != NULL);
+ return (HIF_DEVICE *)sdio_get_drvdata(func);
+}
+
+static void
+delHifDevice(HIF_DEVICE * device)
+{
+ AR_DEBUG_ASSERT(device!= NULL);
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("AR6000: delHifDevice; 0x%p\n", device));
+ if (device->dma_buffer != NULL) {
+ kfree(device->dma_buffer);
+ }
+ kfree(device);
+}
+
+static void ResetAllCards(void)
+{
+}
+
+void HIFClaimDevice(HIF_DEVICE *device, void *context)
+{
+ device->claimedContext = context;
+}
+
+void HIFReleaseDevice(HIF_DEVICE *device)
+{
+ device->claimedContext = NULL;
+}
+
+A_STATUS HIFAttachHTC(HIF_DEVICE *device, HTC_CALLBACKS *callbacks)
+{
+ if (device->htcCallbacks.context != NULL) {
+ /* already in use! */
+ return A_ERROR;
+ }
+ device->htcCallbacks = *callbacks;
+ return A_OK;
+}
+
+void HIFDetachHTC(HIF_DEVICE *device)
+{
+ A_MEMZERO(&device->htcCallbacks,sizeof(device->htcCallbacks));
+}
+
+#define SDIO_SET_CMD52_ARG(arg,rw,func,raw,address,writedata) \
+ (arg) = (((rw) & 1) << 31) | \
+ (((func) & 0x7) << 28) | \
+ (((raw) & 1) << 27) | \
+ (1 << 26) | \
+ (((address) & 0x1FFFF) << 9) | \
+ (1 << 8) | \
+ ((writedata) & 0xFF)
+
+#define SDIO_SET_CMD52_READ_ARG(arg,func,address) \
+ SDIO_SET_CMD52_ARG(arg,0,(func),0,address,0x00)
+#define SDIO_SET_CMD52_WRITE_ARG(arg,func,address,value) \
+ SDIO_SET_CMD52_ARG(arg,1,(func),0,address,value)
+
+static int Func0_CMD52WriteByte(struct mmc_card *card, unsigned int address, unsigned char byte)
+{
+ struct mmc_command ioCmd;
+ unsigned long arg;
+
+ memset(&ioCmd,0,sizeof(ioCmd));
+ SDIO_SET_CMD52_WRITE_ARG(arg,0,address,byte);
+ ioCmd.opcode = SD_IO_RW_DIRECT;
+ ioCmd.arg = arg;
+ ioCmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
+
+ return mmc_wait_for_cmd(card->host, &ioCmd, 0);
+}
+
+static int Func0_CMD52ReadByte(struct mmc_card *card, unsigned int address, unsigned char *byte)
+{
+ struct mmc_command ioCmd;
+ unsigned long arg;
+ A_INT32 err;
+
+ memset(&ioCmd,0,sizeof(ioCmd));
+ SDIO_SET_CMD52_READ_ARG(arg,0,address);
+ ioCmd.opcode = SD_IO_RW_DIRECT;
+ ioCmd.arg = arg;
+ ioCmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
+
+ err = mmc_wait_for_cmd(card->host, &ioCmd, 0);
+
+ if ((!err) && (byte)) {
+ *byte = ioCmd.resp[0] & 0xFF;
+ }
+
+ return err;
+}
diff --git a/drivers/staging/ath6kl/hif/sdio/linux_sdio/src/hif_scatter.c b/drivers/staging/ath6kl/hif/sdio/linux_sdio/src/hif_scatter.c
new file mode 100644
index 00000000000..22c6c6659f5
--- /dev/null
+++ b/drivers/staging/ath6kl/hif/sdio/linux_sdio/src/hif_scatter.c
@@ -0,0 +1,393 @@
+//------------------------------------------------------------------------------
+// Copyright (c) 2009-2010 Atheros Corporation. All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+// HIF scatter implementation
+//
+// Author(s): ="Atheros"
+//==============================================================================
+
+#include <linux/mmc/card.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/sdio.h>
+#include <linux/kthread.h>
+#include "hif_internal.h"
+#define ATH_MODULE_NAME hif
+#include "a_debug.h"
+
+#ifdef HIF_LINUX_MMC_SCATTER_SUPPORT
+
+#define _CMD53_ARG_READ 0
+#define _CMD53_ARG_WRITE 1
+#define _CMD53_ARG_BLOCK_BASIS 1
+#define _CMD53_ARG_FIXED_ADDRESS 0
+#define _CMD53_ARG_INCR_ADDRESS 1
+
+#define SDIO_SET_CMD53_ARG(arg,rw,func,mode,opcode,address,bytes_blocks) \
+ (arg) = (((rw) & 1) << 31) | \
+ (((func) & 0x7) << 28) | \
+ (((mode) & 1) << 27) | \
+ (((opcode) & 1) << 26) | \
+ (((address) & 0x1FFFF) << 9) | \
+ ((bytes_blocks) & 0x1FF)
+
+static void FreeScatterReq(HIF_DEVICE *device, HIF_SCATTER_REQ *pReq)
+{
+ unsigned long flag;
+
+ spin_lock_irqsave(&device->lock, flag);
+
+ DL_ListInsertTail(&device->ScatterReqHead, &pReq->ListLink);
+
+ spin_unlock_irqrestore(&device->lock, flag);
+
+}
+
+static HIF_SCATTER_REQ *AllocScatterReq(HIF_DEVICE *device)
+{
+ DL_LIST *pItem;
+ unsigned long flag;
+
+ spin_lock_irqsave(&device->lock, flag);
+
+ pItem = DL_ListRemoveItemFromHead(&device->ScatterReqHead);
+
+ spin_unlock_irqrestore(&device->lock, flag);
+
+ if (pItem != NULL) {
+ return A_CONTAINING_STRUCT(pItem, HIF_SCATTER_REQ, ListLink);
+ }
+
+ return NULL;
+}
+
+ /* called by async task to perform the operation synchronously using direct MMC APIs */
+A_STATUS DoHifReadWriteScatter(HIF_DEVICE *device, BUS_REQUEST *busrequest)
+{
+ int i;
+ A_UINT8 rw;
+ A_UINT8 opcode;
+ struct mmc_request mmcreq;
+ struct mmc_command cmd;
+ struct mmc_data data;
+ HIF_SCATTER_REQ_PRIV *pReqPriv;
+ HIF_SCATTER_REQ *pReq;
+ A_STATUS status = A_OK;
+ struct scatterlist *pSg;
+
+ pReqPriv = busrequest->pScatterReq;
+
+ A_ASSERT(pReqPriv != NULL);
+
+ pReq = pReqPriv->pHifScatterReq;
+
+ memset(&mmcreq, 0, sizeof(struct mmc_request));
+ memset(&cmd, 0, sizeof(struct mmc_command));
+ memset(&data, 0, sizeof(struct mmc_data));
+
+ data.blksz = HIF_MBOX_BLOCK_SIZE;
+ data.blocks = pReq->TotalLength / HIF_MBOX_BLOCK_SIZE;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: (%s) Address: 0x%X, (BlockLen: %d, BlockCount: %d) , (tot:%d,sg:%d)\n",
+ (pReq->Request & HIF_WRITE) ? "WRITE":"READ", pReq->Address, data.blksz, data.blocks,
+ pReq->TotalLength,pReq->ValidScatterEntries));
+
+ if (pReq->Request & HIF_WRITE) {
+ rw = _CMD53_ARG_WRITE;
+ data.flags = MMC_DATA_WRITE;
+ } else {
+ rw = _CMD53_ARG_READ;
+ data.flags = MMC_DATA_READ;
+ }
+
+ if (pReq->Request & HIF_FIXED_ADDRESS) {
+ opcode = _CMD53_ARG_FIXED_ADDRESS;
+ } else {
+ opcode = _CMD53_ARG_INCR_ADDRESS;
+ }
+
+ /* fill SG entries */
+ pSg = pReqPriv->sgentries;
+ sg_init_table(pSg, pReq->ValidScatterEntries);
+
+ /* assemble SG list */
+ for (i = 0 ; i < pReq->ValidScatterEntries ; i++, pSg++) {
+ /* setup each sg entry */
+ if ((unsigned long)pReq->ScatterList[i].pBuffer & 0x3) {
+ /* note some scatter engines can handle unaligned buffers, print this
+ * as informational only */
+ AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER,
+ ("HIF: (%s) Scatter Buffer is unaligned 0x%lx\n",
+ pReq->Request & HIF_WRITE ? "WRITE":"READ",
+ (unsigned long)pReq->ScatterList[i].pBuffer));
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, (" %d: Addr:0x%lX, Len:%d \n",
+ i,(unsigned long)pReq->ScatterList[i].pBuffer,pReq->ScatterList[i].Length));
+
+ sg_set_buf(pSg, pReq->ScatterList[i].pBuffer, pReq->ScatterList[i].Length);
+ }
+ /* set scatter-gather table for request */
+ data.sg = pReqPriv->sgentries;
+ data.sg_len = pReq->ValidScatterEntries;
+ /* set command argument */
+ SDIO_SET_CMD53_ARG(cmd.arg,
+ rw,
+ device->func->num,
+ _CMD53_ARG_BLOCK_BASIS,
+ opcode,
+ pReq->Address,
+ data.blocks);
+
+ cmd.opcode = SD_IO_RW_EXTENDED;
+ cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
+
+ mmcreq.cmd = &cmd;
+ mmcreq.data = &data;
+
+ mmc_set_data_timeout(&data, device->func->card);
+ /* synchronous call to process request */
+ mmc_wait_for_req(device->func->card->host, &mmcreq);
+
+ if (cmd.error) {
+ status = A_ERROR;
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("HIF-SCATTER: cmd error: %d \n",cmd.error));
+ }
+
+ if (data.error) {
+ status = A_ERROR;
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("HIF-SCATTER: data error: %d \n",data.error));
+ }
+
+ if (A_FAILED(status)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("HIF-SCATTER: FAILED!!! (%s) Address: 0x%X, Block mode (BlockLen: %d, BlockCount: %d)\n",
+ (pReq->Request & HIF_WRITE) ? "WRITE":"READ",pReq->Address, data.blksz, data.blocks));
+ }
+
+ /* set completion status, fail or success */
+ pReq->CompletionStatus = status;
+
+ if (pReq->Request & HIF_ASYNCHRONOUS) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: async_task completion routine req: 0x%lX (%d)\n",(unsigned long)busrequest, status));
+ /* complete the request */
+ A_ASSERT(pReq->CompletionRoutine != NULL);
+ pReq->CompletionRoutine(pReq);
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER async_task upping busrequest : 0x%lX (%d)\n", (unsigned long)busrequest,status));
+ /* signal wait */
+ up(&busrequest->sem_req);
+ }
+
+ return status;
+}
+
+ /* callback to issue a read-write scatter request */
+static A_STATUS HifReadWriteScatter(HIF_DEVICE *device, HIF_SCATTER_REQ *pReq)
+{
+ A_STATUS status = A_EINVAL;
+ A_UINT32 request = pReq->Request;
+ HIF_SCATTER_REQ_PRIV *pReqPriv = (HIF_SCATTER_REQ_PRIV *)pReq->HIFPrivate[0];
+
+ do {
+
+ A_ASSERT(pReqPriv != NULL);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: total len: %d Scatter Entries: %d\n",
+ pReq->TotalLength, pReq->ValidScatterEntries));
+
+ if (!(request & HIF_EXTENDED_IO)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("HIF-SCATTER: Invalid command type: 0x%08x\n", request));
+ break;
+ }
+
+ if (!(request & (HIF_SYNCHRONOUS | HIF_ASYNCHRONOUS))) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("HIF-SCATTER: Invalid execution mode: 0x%08x\n", request));
+ break;
+ }
+
+ if (!(request & HIF_BLOCK_BASIS)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("HIF-SCATTER: Invalid data mode: 0x%08x\n", request));
+ break;
+ }
+
+ if (pReq->TotalLength > MAX_SCATTER_REQ_TRANSFER_SIZE) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
+ ("HIF-SCATTER: Invalid length: %d \n", pReq->TotalLength));
+ break;
+ }
+
+ if (pReq->TotalLength == 0) {
+ A_ASSERT(FALSE);
+ break;
+ }
+
+ /* add bus request to the async list for the async I/O thread to process */
+ AddToAsyncList(device, pReqPriv->busrequest);
+
+ if (request & HIF_SYNCHRONOUS) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: queued sync req: 0x%lX\n", (unsigned long)pReqPriv->busrequest));
+ /* signal thread and wait */
+ up(&device->sem_async);
+ if (down_interruptible(&pReqPriv->busrequest->sem_req) != 0) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,("HIF-SCATTER: interrupted! \n"));
+ /* interrupted, exit */
+ status = A_ERROR;
+ break;
+ } else {
+ status = pReq->CompletionStatus;
+ }
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_SCATTER, ("HIF-SCATTER: queued async req: 0x%lX\n", (unsigned long)pReqPriv->busrequest));
+ /* wake thread, it will process and then take care of the async callback */
+ up(&device->sem_async);
+ status = A_OK;
+ }
+
+ } while (FALSE);
+
+ if (A_FAILED(status) && (request & HIF_ASYNCHRONOUS)) {
+ pReq->CompletionStatus = status;
+ pReq->CompletionRoutine(pReq);
+ status = A_OK;
+ }
+
+ return status;
+}
+
+ /* setup of HIF scatter resources */
+A_STATUS SetupHIFScatterSupport(HIF_DEVICE *device, HIF_DEVICE_SCATTER_SUPPORT_INFO *pInfo)
+{
+ A_STATUS status = A_ERROR;
+ int i;
+ HIF_SCATTER_REQ_PRIV *pReqPriv;
+ BUS_REQUEST *busrequest;
+
+ do {
+
+ /* check if host supports scatter requests and it meets our requirements */
+ if (device->func->card->host->max_hw_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("HIF-SCATTER : host only supports scatter of : %d entries, need: %d \n",
+ device->func->card->host->max_hw_segs, MAX_SCATTER_ENTRIES_PER_REQ));
+ status = A_ENOTSUP;
+ break;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,("HIF-SCATTER Enabled: max scatter req : %d entries: %d \n",
+ MAX_SCATTER_REQUESTS, MAX_SCATTER_ENTRIES_PER_REQ));
+
+ for (i = 0; i < MAX_SCATTER_REQUESTS; i++) {
+ /* allocate the private request blob */
+ pReqPriv = (HIF_SCATTER_REQ_PRIV *)A_MALLOC(sizeof(HIF_SCATTER_REQ_PRIV));
+ if (NULL == pReqPriv) {
+ break;
+ }
+ A_MEMZERO(pReqPriv, sizeof(HIF_SCATTER_REQ_PRIV));
+ /* save the device instance*/
+ pReqPriv->device = device;
+ /* allocate the scatter request */
+ pReqPriv->pHifScatterReq = (HIF_SCATTER_REQ *)A_MALLOC(sizeof(HIF_SCATTER_REQ) +
+ (MAX_SCATTER_ENTRIES_PER_REQ - 1) * (sizeof(HIF_SCATTER_ITEM)));
+
+ if (NULL == pReqPriv->pHifScatterReq) {
+ A_FREE(pReqPriv);
+ break;
+ }
+ /* just zero the main part of the scatter request */
+ A_MEMZERO(pReqPriv->pHifScatterReq, sizeof(HIF_SCATTER_REQ));
+ /* back pointer to the private struct */
+ pReqPriv->pHifScatterReq->HIFPrivate[0] = pReqPriv;
+ /* allocate a bus request for this scatter request */
+ busrequest = hifAllocateBusRequest(device);
+ if (NULL == busrequest) {
+ A_FREE(pReqPriv->pHifScatterReq);
+ A_FREE(pReqPriv);
+ break;
+ }
+ /* assign the scatter request to this bus request */
+ busrequest->pScatterReq = pReqPriv;
+ /* point back to the request */
+ pReqPriv->busrequest = busrequest;
+ /* add it to the scatter pool */
+ FreeScatterReq(device,pReqPriv->pHifScatterReq);
+ }
+
+ if (i != MAX_SCATTER_REQUESTS) {
+ status = A_NO_MEMORY;
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("HIF-SCATTER : failed to alloc scatter resources !\n"));
+ break;
+ }
+
+ /* set scatter function pointers */
+ pInfo->pAllocateReqFunc = AllocScatterReq;
+ pInfo->pFreeReqFunc = FreeScatterReq;
+ pInfo->pReadWriteScatterFunc = HifReadWriteScatter;
+ pInfo->MaxScatterEntries = MAX_SCATTER_ENTRIES_PER_REQ;
+ pInfo->MaxTransferSizePerScatterReq = MAX_SCATTER_REQ_TRANSFER_SIZE;
+
+ status = A_OK;
+
+ } while (FALSE);
+
+ if (A_FAILED(status)) {
+ CleanupHIFScatterResources(device);
+ }
+
+ return status;
+}
+
+ /* clean up scatter support */
+void CleanupHIFScatterResources(HIF_DEVICE *device)
+{
+ HIF_SCATTER_REQ_PRIV *pReqPriv;
+ HIF_SCATTER_REQ *pReq;
+
+ /* empty the free list */
+
+ while (1) {
+
+ pReq = AllocScatterReq(device);
+
+ if (NULL == pReq) {
+ break;
+ }
+
+ pReqPriv = (HIF_SCATTER_REQ_PRIV *)pReq->HIFPrivate[0];
+ A_ASSERT(pReqPriv != NULL);
+
+ if (pReqPriv->busrequest != NULL) {
+ pReqPriv->busrequest->pScatterReq = NULL;
+ /* free bus request */
+ hifFreeBusRequest(device, pReqPriv->busrequest);
+ pReqPriv->busrequest = NULL;
+ }
+
+ if (pReqPriv->pHifScatterReq != NULL) {
+ A_FREE(pReqPriv->pHifScatterReq);
+ pReqPriv->pHifScatterReq = NULL;
+ }
+
+ A_FREE(pReqPriv);
+ }
+}
+
+#endif // HIF_LINUX_MMC_SCATTER_SUPPORT
diff --git a/drivers/staging/ath6kl/htc2/AR6000/ar6k.c b/drivers/staging/ath6kl/htc2/AR6000/ar6k.c
new file mode 100644
index 00000000000..1efc85ce02b
--- /dev/null
+++ b/drivers/staging/ath6kl/htc2/AR6000/ar6k.c
@@ -0,0 +1,1471 @@
+//------------------------------------------------------------------------------
+// <copyright file="ar6k.c" company="Atheros">
+// Copyright (c) 2007-2010 Atheros Corporation. All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+// AR6K device layer that handles register level I/O
+//
+// Author(s): ="Atheros"
+//==============================================================================
+
+#include "a_config.h"
+#include "athdefs.h"
+#include "a_types.h"
+#include "AR6002/hw2.0/hw/mbox_host_reg.h"
+#include "a_osapi.h"
+#include "../htc_debug.h"
+#include "hif.h"
+#include "htc_packet.h"
+#include "ar6k.h"
+
+#define MAILBOX_FOR_BLOCK_SIZE 1
+
+A_STATUS DevEnableInterrupts(AR6K_DEVICE *pDev);
+A_STATUS DevDisableInterrupts(AR6K_DEVICE *pDev);
+
+static void DevCleanupVirtualScatterSupport(AR6K_DEVICE *pDev);
+
+void AR6KFreeIOPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket)
+{
+ LOCK_AR6K(pDev);
+ HTC_PACKET_ENQUEUE(&pDev->RegisterIOList,pPacket);
+ UNLOCK_AR6K(pDev);
+}
+
+HTC_PACKET *AR6KAllocIOPacket(AR6K_DEVICE *pDev)
+{
+ HTC_PACKET *pPacket;
+
+ LOCK_AR6K(pDev);
+ pPacket = HTC_PACKET_DEQUEUE(&pDev->RegisterIOList);
+ UNLOCK_AR6K(pDev);
+
+ return pPacket;
+}
+
+void DevCleanup(AR6K_DEVICE *pDev)
+{
+ DevCleanupGMbox(pDev);
+
+ if (pDev->HifAttached) {
+ HIFDetachHTC(pDev->HIFDevice);
+ pDev->HifAttached = FALSE;
+ }
+
+ DevCleanupVirtualScatterSupport(pDev);
+
+ if (A_IS_MUTEX_VALID(&pDev->Lock)) {
+ A_MUTEX_DELETE(&pDev->Lock);
+ }
+}
+
+A_STATUS DevSetup(AR6K_DEVICE *pDev)
+{
+ A_UINT32 blocksizes[AR6K_MAILBOXES];
+ A_STATUS status = A_OK;
+ int i;
+ HTC_CALLBACKS htcCallbacks;
+
+ do {
+
+ DL_LIST_INIT(&pDev->ScatterReqHead);
+ /* initialize our free list of IO packets */
+ INIT_HTC_PACKET_QUEUE(&pDev->RegisterIOList);
+ A_MUTEX_INIT(&pDev->Lock);
+
+ A_MEMZERO(&htcCallbacks, sizeof(HTC_CALLBACKS));
+ /* the device layer handles these */
+ htcCallbacks.rwCompletionHandler = DevRWCompletionHandler;
+ htcCallbacks.dsrHandler = DevDsrHandler;
+ htcCallbacks.context = pDev;
+
+ status = HIFAttachHTC(pDev->HIFDevice, &htcCallbacks);
+
+ if (A_FAILED(status)) {
+ break;
+ }
+
+ pDev->HifAttached = TRUE;
+
+ /* get the addresses for all 4 mailboxes */
+ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_ADDR,
+ &pDev->MailBoxInfo, sizeof(pDev->MailBoxInfo));
+
+ if (status != A_OK) {
+ A_ASSERT(FALSE);
+ break;
+ }
+
+ /* carve up register I/O packets (these are for ASYNC register I/O ) */
+ for (i = 0; i < AR6K_MAX_REG_IO_BUFFERS; i++) {
+ HTC_PACKET *pIOPacket;
+ pIOPacket = &pDev->RegIOBuffers[i].HtcPacket;
+ SET_HTC_PACKET_INFO_RX_REFILL(pIOPacket,
+ pDev,
+ pDev->RegIOBuffers[i].Buffer,
+ AR6K_REG_IO_BUFFER_SIZE,
+ 0); /* don't care */
+ AR6KFreeIOPacket(pDev,pIOPacket);
+ }
+
+ /* get the block sizes */
+ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
+ blocksizes, sizeof(blocksizes));
+
+ if (status != A_OK) {
+ A_ASSERT(FALSE);
+ break;
+ }
+
+ /* note: we actually get the block size of a mailbox other than 0, for SDIO the block
+ * size on mailbox 0 is artificially set to 1. So we use the block size that is set
+ * for the other 3 mailboxes */
+ pDev->BlockSize = blocksizes[MAILBOX_FOR_BLOCK_SIZE];
+ /* must be a power of 2 */
+ A_ASSERT((pDev->BlockSize & (pDev->BlockSize - 1)) == 0);
+
+ /* assemble mask, used for padding to a block */
+ pDev->BlockMask = pDev->BlockSize - 1;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("BlockSize: %d, MailboxAddress:0x%X \n",
+ pDev->BlockSize, pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX]));
+
+ pDev->GetPendingEventsFunc = NULL;
+ /* see if the HIF layer implements the get pending events function */
+ HIFConfigureDevice(pDev->HIFDevice,
+ HIF_DEVICE_GET_PENDING_EVENTS_FUNC,
+ &pDev->GetPendingEventsFunc,
+ sizeof(pDev->GetPendingEventsFunc));
+
+ /* assume we can process HIF interrupt events asynchronously */
+ pDev->HifIRQProcessingMode = HIF_DEVICE_IRQ_ASYNC_SYNC;
+
+ /* see if the HIF layer overrides this assumption */
+ HIFConfigureDevice(pDev->HIFDevice,
+ HIF_DEVICE_GET_IRQ_PROC_MODE,
+ &pDev->HifIRQProcessingMode,
+ sizeof(pDev->HifIRQProcessingMode));
+
+ switch (pDev->HifIRQProcessingMode) {
+ case HIF_DEVICE_IRQ_SYNC_ONLY:
+ AR_DEBUG_PRINTF(ATH_DEBUG_WARN,("HIF Interrupt processing is SYNC ONLY\n"));
+ /* see if HIF layer wants HTC to yield */
+ HIFConfigureDevice(pDev->HIFDevice,
+ HIF_DEVICE_GET_IRQ_YIELD_PARAMS,
+ &pDev->HifIRQYieldParams,
+ sizeof(pDev->HifIRQYieldParams));
+
+ if (pDev->HifIRQYieldParams.RecvPacketYieldCount > 0) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_WARN,
+ ("HIF requests that DSR yield per %d RECV packets \n",
+ pDev->HifIRQYieldParams.RecvPacketYieldCount));
+ pDev->DSRCanYield = TRUE;
+ }
+ break;
+ case HIF_DEVICE_IRQ_ASYNC_SYNC:
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF Interrupt processing is ASYNC and SYNC\n"));
+ break;
+ default:
+ A_ASSERT(FALSE);
+ }
+
+ pDev->HifMaskUmaskRecvEvent = NULL;
+
+ /* see if the HIF layer implements the mask/unmask recv events function */
+ HIFConfigureDevice(pDev->HIFDevice,
+ HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC,
+ &pDev->HifMaskUmaskRecvEvent,
+ sizeof(pDev->HifMaskUmaskRecvEvent));
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF special overrides : 0x%lX , 0x%lX\n",
+ (unsigned long)pDev->GetPendingEventsFunc, (unsigned long)pDev->HifMaskUmaskRecvEvent));
+
+ status = DevDisableInterrupts(pDev);
+
+ if (A_FAILED(status)) {
+ break;
+ }
+
+ status = DevSetupGMbox(pDev);
+
+ } while (FALSE);
+
+ if (A_FAILED(status)) {
+ if (pDev->HifAttached) {
+ HIFDetachHTC(pDev->HIFDevice);
+ pDev->HifAttached = FALSE;
+ }
+ }
+
+ return status;
+
+}
+
+A_STATUS DevEnableInterrupts(AR6K_DEVICE *pDev)
+{
+ A_STATUS status;
+ AR6K_IRQ_ENABLE_REGISTERS regs;
+
+ LOCK_AR6K(pDev);
+
+ /* Enable all the interrupts except for the internal AR6000 CPU interrupt */
+ pDev->IrqEnableRegisters.int_status_enable = INT_STATUS_ENABLE_ERROR_SET(0x01) |
+ INT_STATUS_ENABLE_CPU_SET(0x01) |
+ INT_STATUS_ENABLE_COUNTER_SET(0x01);
+
+ if (NULL == pDev->GetPendingEventsFunc) {
+ pDev->IrqEnableRegisters.int_status_enable |= INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
+ } else {
+ /* The HIF layer provided us with a pending events function which means that
+ * the detection of pending mbox messages is handled in the HIF layer.
+ * This is the case for the SPI2 interface.
+ * In the normal case we enable MBOX interrupts, for the case
+ * with HIFs that offer this mechanism, we keep these interrupts
+ * masked */
+ pDev->IrqEnableRegisters.int_status_enable &= ~INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
+ }
+
+
+ /* Set up the CPU Interrupt Status Register */
+ pDev->IrqEnableRegisters.cpu_int_status_enable = CPU_INT_STATUS_ENABLE_BIT_SET(0x00);
+
+ /* Set up the Error Interrupt Status Register */
+ pDev->IrqEnableRegisters.error_status_enable =
+ ERROR_STATUS_ENABLE_RX_UNDERFLOW_SET(0x01) |
+ ERROR_STATUS_ENABLE_TX_OVERFLOW_SET(0x01);
+
+ /* Set up the Counter Interrupt Status Register (only for debug interrupt to catch fatal errors) */
+ pDev->IrqEnableRegisters.counter_int_status_enable =
+ COUNTER_INT_STATUS_ENABLE_BIT_SET(AR6K_TARGET_DEBUG_INTR_MASK);
+
+ /* copy into our temp area */
+ A_MEMCPY(&regs,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
+
+ UNLOCK_AR6K(pDev);
+
+ /* always synchronous */
+ status = HIFReadWrite(pDev->HIFDevice,
+ INT_STATUS_ENABLE_ADDRESS,
+ &regs.int_status_enable,
+ AR6K_IRQ_ENABLE_REGS_SIZE,
+ HIF_WR_SYNC_BYTE_INC,
+ NULL);
+
+ if (status != A_OK) {
+ /* Can't write it for some reason */
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
+ ("Failed to update interrupt control registers err: %d\n", status));
+
+ }
+
+ return status;
+}
+
+A_STATUS DevDisableInterrupts(AR6K_DEVICE *pDev)
+{
+ AR6K_IRQ_ENABLE_REGISTERS regs;
+
+ LOCK_AR6K(pDev);
+ /* Disable all interrupts */
+ pDev->IrqEnableRegisters.int_status_enable = 0;
+ pDev->IrqEnableRegisters.cpu_int_status_enable = 0;
+ pDev->IrqEnableRegisters.error_status_enable = 0;
+ pDev->IrqEnableRegisters.counter_int_status_enable = 0;
+ /* copy into our temp area */
+ A_MEMCPY(&regs,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
+
+ UNLOCK_AR6K(pDev);
+
+ /* always synchronous */
+ return HIFReadWrite(pDev->HIFDevice,
+ INT_STATUS_ENABLE_ADDRESS,
+ &regs.int_status_enable,
+ AR6K_IRQ_ENABLE_REGS_SIZE,
+ HIF_WR_SYNC_BYTE_INC,
+ NULL);
+}
+
+/* enable device interrupts */
+A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev)
+{
+ /* for good measure, make sure interrupt are disabled before unmasking at the HIF
+ * layer.
+ * The rationale here is that between device insertion (where we clear the interrupts the first time)
+ * and when HTC is finally ready to handle interrupts, other software can perform target "soft" resets.
+ * The AR6K interrupt enables reset back to an "enabled" state when this happens.
+ * */
+ A_STATUS IntStatus = A_OK;
+ DevDisableInterrupts(pDev);
+
+#ifdef THREAD_X
+ // Tobe verified...
+ IntStatus = DevEnableInterrupts(pDev);
+ /* Unmask the host controller interrupts */
+ HIFUnMaskInterrupt(pDev->HIFDevice);
+#else
+ /* Unmask the host controller interrupts */
+ HIFUnMaskInterrupt(pDev->HIFDevice);
+ IntStatus = DevEnableInterrupts(pDev);
+#endif
+
+ return IntStatus;
+}
+
+/* disable all device interrupts */
+A_STATUS DevMaskInterrupts(AR6K_DEVICE *pDev)
+{
+ /* mask the interrupt at the HIF layer, we don't want a stray interrupt taken while
+ * we zero out our shadow registers in DevDisableInterrupts()*/
+ HIFMaskInterrupt(pDev->HIFDevice);
+
+ return DevDisableInterrupts(pDev);
+}
+
+/* callback when our fetch to enable/disable completes */
+static void DevDoEnableDisableRecvAsyncHandler(void *Context, HTC_PACKET *pPacket)
+{
+ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevDoEnableDisableRecvAsyncHandler: (dev: 0x%lX)\n", (unsigned long)pDev));
+
+ if (A_FAILED(pPacket->Status)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
+ (" Failed to disable receiver, status:%d \n", pPacket->Status));
+ }
+ /* free this IO packet */
+ AR6KFreeIOPacket(pDev,pPacket);
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevDoEnableDisableRecvAsyncHandler \n"));
+}
+
+/* disable packet reception (used in case the host runs out of buffers)
+ * this is the "override" method when the HIF reports another methods to
+ * disable recv events */
+static A_STATUS DevDoEnableDisableRecvOverride(AR6K_DEVICE *pDev, A_BOOL EnableRecv, A_BOOL AsyncMode)
+{
+ A_STATUS status = A_OK;
+ HTC_PACKET *pIOPacket = NULL;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("DevDoEnableDisableRecvOverride: Enable:%d Mode:%d\n",
+ EnableRecv,AsyncMode));
+
+ do {
+
+ if (AsyncMode) {
+
+ pIOPacket = AR6KAllocIOPacket(pDev);
+
+ if (NULL == pIOPacket) {
+ status = A_NO_MEMORY;
+ A_ASSERT(FALSE);
+ break;
+ }
+
+ /* stick in our completion routine when the I/O operation completes */
+ pIOPacket->Completion = DevDoEnableDisableRecvAsyncHandler;
+ pIOPacket->pContext = pDev;
+
+ /* call the HIF layer override and do this asynchronously */
+ status = pDev->HifMaskUmaskRecvEvent(pDev->HIFDevice,
+ EnableRecv ? HIF_UNMASK_RECV : HIF_MASK_RECV,
+ pIOPacket);
+ break;
+ }
+
+ /* if we get here we are doing it synchronously */
+ status = pDev->HifMaskUmaskRecvEvent(pDev->HIFDevice,
+ EnableRecv ? HIF_UNMASK_RECV : HIF_MASK_RECV,
+ NULL);
+
+ } while (FALSE);
+
+ if (A_FAILED(status) && (pIOPacket != NULL)) {
+ AR6KFreeIOPacket(pDev,pIOPacket);
+ }
+
+ return status;
+}
+
+/* disable packet reception (used in case the host runs out of buffers)
+ * this is the "normal" method using the interrupt enable registers through
+ * the host I/F */
+static A_STATUS DevDoEnableDisableRecvNormal(AR6K_DEVICE *pDev, A_BOOL EnableRecv, A_BOOL AsyncMode)
+{
+ A_STATUS status = A_OK;
+ HTC_PACKET *pIOPacket = NULL;
+ AR6K_IRQ_ENABLE_REGISTERS regs;
+
+ /* take the lock to protect interrupt enable shadows */
+ LOCK_AR6K(pDev);
+
+ if (EnableRecv) {
+ pDev->IrqEnableRegisters.int_status_enable |= INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
+ } else {
+ pDev->IrqEnableRegisters.int_status_enable &= ~INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
+ }
+
+ /* copy into our temp area */
+ A_MEMCPY(&regs,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
+ UNLOCK_AR6K(pDev);
+
+ do {
+
+ if (AsyncMode) {
+
+ pIOPacket = AR6KAllocIOPacket(pDev);
+
+ if (NULL == pIOPacket) {
+ status = A_NO_MEMORY;
+ A_ASSERT(FALSE);
+ break;
+ }
+
+ /* copy values to write to our async I/O buffer */
+ A_MEMCPY(pIOPacket->pBuffer,&regs,AR6K_IRQ_ENABLE_REGS_SIZE);
+
+ /* stick in our completion routine when the I/O operation completes */
+ pIOPacket->Completion = DevDoEnableDisableRecvAsyncHandler;
+ pIOPacket->pContext = pDev;
+
+ /* write it out asynchronously */
+ HIFReadWrite(pDev->HIFDevice,
+ INT_STATUS_ENABLE_ADDRESS,
+ pIOPacket->pBuffer,
+ AR6K_IRQ_ENABLE_REGS_SIZE,
+ HIF_WR_ASYNC_BYTE_INC,
+ pIOPacket);
+ break;
+ }
+
+ /* if we get here we are doing it synchronously */
+
+ status = HIFReadWrite(pDev->HIFDevice,
+ INT_STATUS_ENABLE_ADDRESS,
+ &regs.int_status_enable,
+ AR6K_IRQ_ENABLE_REGS_SIZE,
+ HIF_WR_SYNC_BYTE_INC,
+ NULL);
+
+ } while (FALSE);
+
+ if (A_FAILED(status) && (pIOPacket != NULL)) {
+ AR6KFreeIOPacket(pDev,pIOPacket);
+ }
+
+ return status;
+}
+
+
+A_STATUS DevStopRecv(AR6K_DEVICE *pDev, A_BOOL AsyncMode)
+{
+ if (NULL == pDev->HifMaskUmaskRecvEvent) {
+ return DevDoEnableDisableRecvNormal(pDev,FALSE,AsyncMode);
+ } else {
+ return DevDoEnableDisableRecvOverride(pDev,FALSE,AsyncMode);
+ }
+}
+
+A_STATUS DevEnableRecv(AR6K_DEVICE *pDev, A_BOOL AsyncMode)
+{
+ if (NULL == pDev->HifMaskUmaskRecvEvent) {
+ return DevDoEnableDisableRecvNormal(pDev,TRUE,AsyncMode);
+ } else {
+ return DevDoEnableDisableRecvOverride(pDev,TRUE,AsyncMode);
+ }
+}
+
+A_STATUS DevWaitForPendingRecv(AR6K_DEVICE *pDev,A_UINT32 TimeoutInMs,A_BOOL *pbIsRecvPending)
+{
+ A_STATUS status = A_OK;
+ A_UCHAR host_int_status = 0x0;
+ A_UINT32 counter = 0x0;
+
+ if(TimeoutInMs < 100)
+ {
+ TimeoutInMs = 100;
+ }
+
+ counter = TimeoutInMs / 100;
+
+ do
+ {
+ //Read the Host Interrupt Status Register
+ status = HIFReadWrite(pDev->HIFDevice,
+ HOST_INT_STATUS_ADDRESS,
+ &host_int_status,
+ sizeof(A_UCHAR),
+ HIF_RD_SYNC_BYTE_INC,
+ NULL);
+ if(A_FAILED(status))
+ {
+ AR_DEBUG_PRINTF(ATH_LOG_ERR,("DevWaitForPendingRecv:Read HOST_INT_STATUS_ADDRESS Failed 0x%X\n",status));
+ break;
+ }
+
+ host_int_status = A_SUCCESS(status) ? (host_int_status & (1 << 0)):0;
+ if(!host_int_status)
+ {
+ status = A_OK;
+ *pbIsRecvPending = FALSE;
+ break;
+ }
+ else
+ {
+ *pbIsRecvPending = TRUE;
+ }
+
+ A_MDELAY(100);
+
+ counter--;
+
+ }while(counter);
+ return status;
+}
+
+void DevDumpRegisters(AR6K_DEVICE *pDev,
+ AR6K_IRQ_PROC_REGISTERS *pIrqProcRegs,
+ AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs)
+{
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("\n<------- Register Table -------->\n"));
+
+ if (pIrqProcRegs != NULL) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("Host Int Status: 0x%x\n",pIrqProcRegs->host_int_status));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("CPU Int Status: 0x%x\n",pIrqProcRegs->cpu_int_status));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("Error Int Status: 0x%x\n",pIrqProcRegs->error_int_status));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("Counter Int Status: 0x%x\n",pIrqProcRegs->counter_int_status));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("Mbox Frame: 0x%x\n",pIrqProcRegs->mbox_frame));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("Rx Lookahead Valid: 0x%x\n",pIrqProcRegs->rx_lookahead_valid));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("Rx Lookahead 0: 0x%x\n",pIrqProcRegs->rx_lookahead[0]));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("Rx Lookahead 1: 0x%x\n",pIrqProcRegs->rx_lookahead[1]));
+
+ if (pDev->MailBoxInfo.GMboxAddress != 0) {
+ /* if the target supports GMBOX hardware, dump some additional state */
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("GMBOX Host Int Status 2: 0x%x\n",pIrqProcRegs->host_int_status2));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("GMBOX RX Avail: 0x%x\n",pIrqProcRegs->gmbox_rx_avail));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("GMBOX lookahead alias 0: 0x%x\n",pIrqProcRegs->rx_gmbox_lookahead_alias[0]));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("GMBOX lookahead alias 1: 0x%x\n",pIrqProcRegs->rx_gmbox_lookahead_alias[1]));
+ }
+
+ }
+
+ if (pIrqEnableRegs != NULL) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("Int Status Enable: 0x%x\n",pIrqEnableRegs->int_status_enable));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("Counter Int Status Enable: 0x%x\n",pIrqEnableRegs->counter_int_status_enable));
+ }
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("<------------------------------->\n"));
+}
+
+
+#define DEV_GET_VIRT_DMA_INFO(p) ((DEV_SCATTER_DMA_VIRTUAL_INFO *)((p)->HIFPrivate[0]))
+
+static HIF_SCATTER_REQ *DevAllocScatterReq(HIF_DEVICE *Context)
+{
+ DL_LIST *pItem;
+ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
+ LOCK_AR6K(pDev);
+ pItem = DL_ListRemoveItemFromHead(&pDev->ScatterReqHead);
+ UNLOCK_AR6K(pDev);
+ if (pItem != NULL) {
+ return A_CONTAINING_STRUCT(pItem, HIF_SCATTER_REQ, ListLink);
+ }
+ return NULL;
+}
+
+static void DevFreeScatterReq(HIF_DEVICE *Context, HIF_SCATTER_REQ *pReq)
+{
+ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
+ LOCK_AR6K(pDev);
+ DL_ListInsertTail(&pDev->ScatterReqHead, &pReq->ListLink);
+ UNLOCK_AR6K(pDev);
+}
+
+A_STATUS DevCopyScatterListToFromDMABuffer(HIF_SCATTER_REQ *pReq, A_BOOL FromDMA)
+{
+ A_UINT8 *pDMABuffer = NULL;
+ int i, remaining;
+ A_UINT32 length;
+
+ pDMABuffer = pReq->pScatterBounceBuffer;
+
+ if (pDMABuffer == NULL) {
+ A_ASSERT(FALSE);
+ return A_EINVAL;
+ }
+
+ remaining = (int)pReq->TotalLength;
+
+ for (i = 0; i < pReq->ValidScatterEntries; i++) {
+
+ length = min((int)pReq->ScatterList[i].Length, remaining);
+
+ if (length != (int)pReq->ScatterList[i].Length) {
+ A_ASSERT(FALSE);
+ /* there is a problem with the scatter list */
+ return A_EINVAL;
+ }
+
+ if (FromDMA) {
+ /* from DMA buffer */
+ A_MEMCPY(pReq->ScatterList[i].pBuffer, pDMABuffer , length);
+ } else {
+ /* to DMA buffer */
+ A_MEMCPY(pDMABuffer, pReq->ScatterList[i].pBuffer, length);
+ }
+
+ pDMABuffer += length;
+ remaining -= length;
+ }
+
+ return A_OK;
+}
+
+static void DevReadWriteScatterAsyncHandler(void *Context, HTC_PACKET *pPacket)
+{
+ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
+ HIF_SCATTER_REQ *pReq = (HIF_SCATTER_REQ *)pPacket->pPktContext;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+DevReadWriteScatterAsyncHandler: (dev: 0x%lX)\n", (unsigned long)pDev));
+
+ pReq->CompletionStatus = pPacket->Status;
+
+ AR6KFreeIOPacket(pDev,pPacket);
+
+ pReq->CompletionRoutine(pReq);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-DevReadWriteScatterAsyncHandler \n"));
+}
+
+static A_STATUS DevReadWriteScatter(HIF_DEVICE *Context, HIF_SCATTER_REQ *pReq)
+{
+ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
+ A_STATUS status = A_OK;
+ HTC_PACKET *pIOPacket = NULL;
+ A_UINT32 request = pReq->Request;
+
+ do {
+
+ if (pReq->TotalLength > AR6K_MAX_TRANSFER_SIZE_PER_SCATTER) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
+ ("Invalid length: %d \n", pReq->TotalLength));
+ break;
+ }
+
+ if (pReq->TotalLength == 0) {
+ A_ASSERT(FALSE);
+ break;
+ }
+
+ if (request & HIF_ASYNCHRONOUS) {
+ /* use an I/O packet to carry this request */
+ pIOPacket = AR6KAllocIOPacket(pDev);
+ if (NULL == pIOPacket) {
+ status = A_NO_MEMORY;
+ break;
+ }
+
+ /* save the request */
+ pIOPacket->pPktContext = pReq;
+ /* stick in our completion routine when the I/O operation completes */
+ pIOPacket->Completion = DevReadWriteScatterAsyncHandler;
+ pIOPacket->pContext = pDev;
+ }
+
+ if (request & HIF_WRITE) {
+ /* in virtual DMA, we are issuing the requests through the legacy HIFReadWrite API
+ * this API will adjust the address automatically for the last byte to fall on the mailbox
+ * EOM. */
+
+ /* if the address is an extended address, we can adjust the address here since the extended
+ * address will bypass the normal checks in legacy HIF layers */
+ if (pReq->Address == pDev->MailBoxInfo.MboxProp[HTC_MAILBOX].ExtendedAddress) {
+ pReq->Address += pDev->MailBoxInfo.MboxProp[HTC_MAILBOX].ExtendedSize - pReq->TotalLength;
+ }
+ }
+
+ /* use legacy readwrite */
+ status = HIFReadWrite(pDev->HIFDevice,
+ pReq->Address,
+ DEV_GET_VIRT_DMA_INFO(pReq)->pVirtDmaBuffer,
+ pReq->TotalLength,
+ request,
+ (request & HIF_ASYNCHRONOUS) ? pIOPacket : NULL);
+
+ } while (FALSE);
+
+ if ((status != A_PENDING) && A_FAILED(status) && (request & HIF_ASYNCHRONOUS)) {
+ if (pIOPacket != NULL) {
+ AR6KFreeIOPacket(pDev,pIOPacket);
+ }
+ pReq->CompletionStatus = status;
+ pReq->CompletionRoutine(pReq);
+ status = A_OK;
+ }
+
+ return status;
+}
+
+
+static void DevCleanupVirtualScatterSupport(AR6K_DEVICE *pDev)
+{
+ HIF_SCATTER_REQ *pReq;
+
+ while (1) {
+ pReq = DevAllocScatterReq((HIF_DEVICE *)pDev);
+ if (NULL == pReq) {
+ break;
+ }
+ A_FREE(pReq);
+ }
+
+}
+
+ /* function to set up virtual scatter support if HIF layer has not implemented the interface */
+static A_STATUS DevSetupVirtualScatterSupport(AR6K_DEVICE *pDev)
+{
+ A_STATUS status = A_OK;
+ int bufferSize, sgreqSize;
+ int i;
+ DEV_SCATTER_DMA_VIRTUAL_INFO *pVirtualInfo;
+ HIF_SCATTER_REQ *pReq;
+
+ bufferSize = sizeof(DEV_SCATTER_DMA_VIRTUAL_INFO) +
+ 2 * (A_GET_CACHE_LINE_BYTES()) + AR6K_MAX_TRANSFER_SIZE_PER_SCATTER;
+
+ sgreqSize = sizeof(HIF_SCATTER_REQ) +
+ (AR6K_SCATTER_ENTRIES_PER_REQ - 1) * (sizeof(HIF_SCATTER_ITEM));
+
+ for (i = 0; i < AR6K_SCATTER_REQS; i++) {
+ /* allocate the scatter request, buffer info and the actual virtual buffer itself */
+ pReq = (HIF_SCATTER_REQ *)A_MALLOC(sgreqSize + bufferSize);
+
+ if (NULL == pReq) {
+ status = A_NO_MEMORY;
+ break;
+ }
+
+ A_MEMZERO(pReq, sgreqSize);
+
+ /* the virtual DMA starts after the scatter request struct */
+ pVirtualInfo = (DEV_SCATTER_DMA_VIRTUAL_INFO *)((A_UINT8 *)pReq + sgreqSize);
+ A_MEMZERO(pVirtualInfo, sizeof(DEV_SCATTER_DMA_VIRTUAL_INFO));
+
+ pVirtualInfo->pVirtDmaBuffer = &pVirtualInfo->DataArea[0];
+ /* align buffer to cache line in case host controller can actually DMA this */
+ pVirtualInfo->pVirtDmaBuffer = A_ALIGN_TO_CACHE_LINE(pVirtualInfo->pVirtDmaBuffer);
+ /* store the structure in the private area */
+ pReq->HIFPrivate[0] = pVirtualInfo;
+ /* we emulate a DMA bounce interface */
+ pReq->ScatterMethod = HIF_SCATTER_DMA_BOUNCE;
+ pReq->pScatterBounceBuffer = pVirtualInfo->pVirtDmaBuffer;
+ /* free request to the list */
+ DevFreeScatterReq((HIF_DEVICE *)pDev,pReq);
+ }
+
+ if (A_FAILED(status)) {
+ DevCleanupVirtualScatterSupport(pDev);
+ } else {
+ pDev->HifScatterInfo.pAllocateReqFunc = DevAllocScatterReq;
+ pDev->HifScatterInfo.pFreeReqFunc = DevFreeScatterReq;
+ pDev->HifScatterInfo.pReadWriteScatterFunc = DevReadWriteScatter;
+ if (pDev->MailBoxInfo.MboxBusIFType == MBOX_BUS_IF_SPI) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_WARN, ("AR6K: SPI bus requires RX scatter limits\n"));
+ pDev->HifScatterInfo.MaxScatterEntries = AR6K_MIN_SCATTER_ENTRIES_PER_REQ;
+ pDev->HifScatterInfo.MaxTransferSizePerScatterReq = AR6K_MIN_TRANSFER_SIZE_PER_SCATTER;
+ } else {
+ pDev->HifScatterInfo.MaxScatterEntries = AR6K_SCATTER_ENTRIES_PER_REQ;
+ pDev->HifScatterInfo.MaxTransferSizePerScatterReq = AR6K_MAX_TRANSFER_SIZE_PER_SCATTER;
+ }
+ pDev->ScatterIsVirtual = TRUE;
+ }
+
+ return status;
+}
+
+
+A_STATUS DevSetupMsgBundling(AR6K_DEVICE *pDev, int MaxMsgsPerTransfer)
+{
+ A_STATUS status;
+
+ if (pDev->MailBoxInfo.Flags & HIF_MBOX_FLAG_NO_BUNDLING) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_WARN, ("HIF requires bundling disabled\n"));
+ return A_ENOTSUP;
+ }
+
+ status = HIFConfigureDevice(pDev->HIFDevice,
+ HIF_CONFIGURE_QUERY_SCATTER_REQUEST_SUPPORT,
+ &pDev->HifScatterInfo,
+ sizeof(pDev->HifScatterInfo));
+
+ if (A_FAILED(status)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_WARN,
+ ("AR6K: ** HIF layer does not support scatter requests (%d) \n",status));
+
+ /* we can try to use a virtual DMA scatter mechanism using legacy HIFReadWrite() */
+ status = DevSetupVirtualScatterSupport(pDev);
+
+ if (A_SUCCESS(status)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("AR6K: virtual scatter transfers enabled (max scatter items:%d: maxlen:%d) \n",
+ DEV_GET_MAX_MSG_PER_BUNDLE(pDev), DEV_GET_MAX_BUNDLE_LENGTH(pDev)));
+ }
+
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("AR6K: HIF layer supports scatter requests (max scatter items:%d: maxlen:%d) \n",
+ DEV_GET_MAX_MSG_PER_BUNDLE(pDev), DEV_GET_MAX_BUNDLE_LENGTH(pDev)));
+ }
+
+ if (A_SUCCESS(status)) {
+ /* for the recv path, the maximum number of bytes per recv bundle is just limited
+ * by the maximum transfer size at the HIF layer */
+ pDev->MaxRecvBundleSize = pDev->HifScatterInfo.MaxTransferSizePerScatterReq;
+
+ if (pDev->MailBoxInfo.MboxBusIFType == MBOX_BUS_IF_SPI) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_WARN, ("AR6K : SPI bus requires TX bundling disabled\n"));
+ pDev->MaxSendBundleSize = 0;
+ } else {
+ /* for the send path, the max transfer size is limited by the existence and size of
+ * the extended mailbox address range */
+ if (pDev->MailBoxInfo.MboxProp[0].ExtendedAddress != 0) {
+ pDev->MaxSendBundleSize = pDev->MailBoxInfo.MboxProp[0].ExtendedSize;
+ } else {
+ /* legacy */
+ pDev->MaxSendBundleSize = AR6K_LEGACY_MAX_WRITE_LENGTH;
+ }
+
+ if (pDev->MaxSendBundleSize > pDev->HifScatterInfo.MaxTransferSizePerScatterReq) {
+ /* limit send bundle size to what the HIF can support for scatter requests */
+ pDev->MaxSendBundleSize = pDev->HifScatterInfo.MaxTransferSizePerScatterReq;
+ }
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_ANY,
+ ("AR6K: max recv: %d max send: %d \n",
+ DEV_GET_MAX_BUNDLE_RECV_LENGTH(pDev), DEV_GET_MAX_BUNDLE_SEND_LENGTH(pDev)));
+
+ }
+ return status;
+}
+
+A_STATUS DevSubmitScatterRequest(AR6K_DEVICE *pDev, HIF_SCATTER_REQ *pScatterReq, A_BOOL Read, A_BOOL Async)
+{
+ A_STATUS status;
+
+ if (Read) {
+ /* read operation */
+ pScatterReq->Request = (Async) ? HIF_RD_ASYNC_BLOCK_FIX : HIF_RD_SYNC_BLOCK_FIX;
+ pScatterReq->Address = pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX];
+ A_ASSERT(pScatterReq->TotalLength <= (A_UINT32)DEV_GET_MAX_BUNDLE_RECV_LENGTH(pDev));
+ } else {
+ A_UINT32 mailboxWidth;
+
+ /* write operation */
+ pScatterReq->Request = (Async) ? HIF_WR_ASYNC_BLOCK_INC : HIF_WR_SYNC_BLOCK_INC;
+ A_ASSERT(pScatterReq->TotalLength <= (A_UINT32)DEV_GET_MAX_BUNDLE_SEND_LENGTH(pDev));
+ if (pScatterReq->TotalLength > AR6K_LEGACY_MAX_WRITE_LENGTH) {
+ /* for large writes use the extended address */
+ pScatterReq->Address = pDev->MailBoxInfo.MboxProp[HTC_MAILBOX].ExtendedAddress;
+ mailboxWidth = pDev->MailBoxInfo.MboxProp[HTC_MAILBOX].ExtendedSize;
+ } else {
+ pScatterReq->Address = pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX];
+ mailboxWidth = AR6K_LEGACY_MAX_WRITE_LENGTH;
+ }
+
+ if (!pDev->ScatterIsVirtual) {
+ /* we are passing this scatter list down to the HIF layer' scatter request handler, fixup the address
+ * so that the last byte falls on the EOM, we do this for those HIFs that support the
+ * scatter API */
+ pScatterReq->Address += (mailboxWidth - pScatterReq->TotalLength);
+ }
+
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_RECV | ATH_DEBUG_SEND,
+ ("DevSubmitScatterRequest, Entries: %d, Total Length: %d Mbox:0x%X (mode: %s : %s)\n",
+ pScatterReq->ValidScatterEntries,
+ pScatterReq->TotalLength,
+ pScatterReq->Address,
+ Async ? "ASYNC" : "SYNC",
+ (Read) ? "RD" : "WR"));
+
+ status = DEV_PREPARE_SCATTER_OPERATION(pScatterReq);
+
+ if (A_FAILED(status)) {
+ if (Async) {
+ pScatterReq->CompletionStatus = status;
+ pScatterReq->CompletionRoutine(pScatterReq);
+ return A_OK;
+ }
+ return status;
+ }
+
+ status = pDev->HifScatterInfo.pReadWriteScatterFunc(pDev->ScatterIsVirtual ? pDev : pDev->HIFDevice,
+ pScatterReq);
+ if (!Async) {
+ /* in sync mode, we can touch the scatter request */
+ pScatterReq->CompletionStatus = status;
+ DEV_FINISH_SCATTER_OPERATION(pScatterReq);
+ } else {
+ if (status == A_PENDING) {
+ status = A_OK;
+ }
+ }
+
+ return status;
+}
+
+
+#ifdef MBOXHW_UNIT_TEST
+
+
+/* This is a mailbox hardware unit test that must be called in a schedulable context
+ * This test is very simple, it will send a list of buffers with a counting pattern
+ * and the target will invert the data and send the message back
+ *
+ * the unit test has the following constraints:
+ *
+ * The target has at least 8 buffers of 256 bytes each. The host will send
+ * the following pattern of buffers in rapid succession :
+ *
+ * 1 buffer - 128 bytes
+ * 1 buffer - 256 bytes
+ * 1 buffer - 512 bytes
+ * 1 buffer - 1024 bytes
+ *
+ * The host will send the buffers to one mailbox and wait for buffers to be reflected
+ * back from the same mailbox. The target sends the buffers FIFO order.
+ * Once the final buffer has been received for a mailbox, the next mailbox is tested.
+ *
+ *
+ * Note: To simplifythe test , we assume that the chosen buffer sizes
+ * will fall on a nice block pad
+ *
+ * It is expected that higher-order tests will be written to stress the mailboxes using
+ * a message-based protocol (with some performance timming) that can create more
+ * randomness in the packets sent over mailboxes.
+ *
+ * */
+
+#define A_ROUND_UP_PWR2(x, align) (((int) (x) + ((align)-1)) & ~((align)-1))
+
+#define BUFFER_BLOCK_PAD 128
+
+#if 0
+#define BUFFER1 128
+#define BUFFER2 256
+#define BUFFER3 512
+#define BUFFER4 1024
+#endif
+
+#if 1
+#define BUFFER1 80
+#define BUFFER2 200
+#define BUFFER3 444
+#define BUFFER4 800
+#endif
+
+#define TOTAL_BYTES (A_ROUND_UP_PWR2(BUFFER1,BUFFER_BLOCK_PAD) + \
+ A_ROUND_UP_PWR2(BUFFER2,BUFFER_BLOCK_PAD) + \
+ A_ROUND_UP_PWR2(BUFFER3,BUFFER_BLOCK_PAD) + \
+ A_ROUND_UP_PWR2(BUFFER4,BUFFER_BLOCK_PAD) )
+
+#define TEST_BYTES (BUFFER1 + BUFFER2 + BUFFER3 + BUFFER4)
+
+#define TEST_CREDITS_RECV_TIMEOUT 100
+
+static A_UINT8 g_Buffer[TOTAL_BYTES];
+static A_UINT32 g_MailboxAddrs[AR6K_MAILBOXES];
+static A_UINT32 g_BlockSizes[AR6K_MAILBOXES];
+
+#define BUFFER_PROC_LIST_DEPTH 4
+
+typedef struct _BUFFER_PROC_LIST{
+ A_UINT8 *pBuffer;
+ A_UINT32 length;
+}BUFFER_PROC_LIST;
+
+
+#define PUSH_BUFF_PROC_ENTRY(pList,len,pCurrpos) \
+{ \
+ (pList)->pBuffer = (pCurrpos); \
+ (pList)->length = (len); \
+ (pCurrpos) += (len); \
+ (pList)++; \
+}
+
+/* a simple and crude way to send different "message" sizes */
+static void AssembleBufferList(BUFFER_PROC_LIST *pList)
+{
+ A_UINT8 *pBuffer = g_Buffer;
+
+#if BUFFER_PROC_LIST_DEPTH < 4
+#error "Buffer processing list depth is not deep enough!!"
+#endif
+
+ PUSH_BUFF_PROC_ENTRY(pList,BUFFER1,pBuffer);
+ PUSH_BUFF_PROC_ENTRY(pList,BUFFER2,pBuffer);
+ PUSH_BUFF_PROC_ENTRY(pList,BUFFER3,pBuffer);
+ PUSH_BUFF_PROC_ENTRY(pList,BUFFER4,pBuffer);
+
+}
+
+#define FILL_ZERO TRUE
+#define FILL_COUNTING FALSE
+static void InitBuffers(A_BOOL Zero)
+{
+ A_UINT16 *pBuffer16 = (A_UINT16 *)g_Buffer;
+ int i;
+
+ /* fill buffer with 16 bit counting pattern or zeros */
+ for (i = 0; i < (TOTAL_BYTES / 2) ; i++) {
+ if (!Zero) {
+ pBuffer16[i] = (A_UINT16)i;
+ } else {
+ pBuffer16[i] = 0;
+ }
+ }
+}
+
+
+static A_BOOL CheckOneBuffer(A_UINT16 *pBuffer16, int Length)
+{
+ int i;
+ A_UINT16 startCount;
+ A_BOOL success = TRUE;
+
+ /* get the starting count */
+ startCount = pBuffer16[0];
+ /* invert it, this is the expected value */
+ startCount = ~startCount;
+ /* scan the buffer and verify */
+ for (i = 0; i < (Length / 2) ; i++,startCount++) {
+ /* target will invert all the data */
+ if ((A_UINT16)pBuffer16[i] != (A_UINT16)~startCount) {
+ success = FALSE;
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Invalid Data Got:0x%X, Expecting:0x%X (offset:%d, total:%d) \n",
+ pBuffer16[i], ((A_UINT16)~startCount), i, Length));
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("0x%X 0x%X 0x%X 0x%X \n",
+ pBuffer16[i], pBuffer16[i + 1], pBuffer16[i + 2],pBuffer16[i+3]));
+ break;
+ }
+ }
+
+ return success;
+}
+
+static A_BOOL CheckBuffers(void)
+{
+ int i;
+ A_BOOL success = TRUE;
+ BUFFER_PROC_LIST checkList[BUFFER_PROC_LIST_DEPTH];
+
+ /* assemble the list */
+ AssembleBufferList(checkList);
+
+ /* scan the buffers and verify */
+ for (i = 0; i < BUFFER_PROC_LIST_DEPTH ; i++) {
+ success = CheckOneBuffer((A_UINT16 *)checkList[i].pBuffer, checkList[i].length);
+ if (!success) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Buffer : 0x%X, Length:%d failed verify \n",
+ (A_UINT32)checkList[i].pBuffer, checkList[i].length));
+ break;
+ }
+ }
+
+ return success;
+}
+
+ /* find the end marker for the last buffer we will be sending */
+static A_UINT16 GetEndMarker(void)
+{
+ A_UINT8 *pBuffer;
+ BUFFER_PROC_LIST checkList[BUFFER_PROC_LIST_DEPTH];
+
+ /* fill up buffers with the normal counting pattern */
+ InitBuffers(FILL_COUNTING);
+
+ /* assemble the list we will be sending down */
+ AssembleBufferList(checkList);
+ /* point to the last 2 bytes of the last buffer */
+ pBuffer = &(checkList[BUFFER_PROC_LIST_DEPTH - 1].pBuffer[(checkList[BUFFER_PROC_LIST_DEPTH - 1].length) - 2]);
+
+ /* the last count in the last buffer is the marker */
+ return (A_UINT16)pBuffer[0] | ((A_UINT16)pBuffer[1] << 8);
+}
+
+#define ATH_PRINT_OUT_ZONE ATH_DEBUG_ERR
+
+/* send the ordered buffers to the target */
+static A_STATUS SendBuffers(AR6K_DEVICE *pDev, int mbox)
+{
+ A_STATUS status = A_OK;
+ A_UINT32 request = HIF_WR_SYNC_BLOCK_INC;
+ BUFFER_PROC_LIST sendList[BUFFER_PROC_LIST_DEPTH];
+ int i;
+ int totalBytes = 0;
+ int paddedLength;
+ int totalwPadding = 0;
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Sending buffers on mailbox : %d \n",mbox));
+
+ /* fill buffer with counting pattern */
+ InitBuffers(FILL_COUNTING);
+
+ /* assemble the order in which we send */
+ AssembleBufferList(sendList);
+
+ for (i = 0; i < BUFFER_PROC_LIST_DEPTH; i++) {
+
+ /* we are doing block transfers, so we need to pad everything to a block size */
+ paddedLength = (sendList[i].length + (g_BlockSizes[mbox] - 1)) &
+ (~(g_BlockSizes[mbox] - 1));
+
+ /* send each buffer synchronously */
+ status = HIFReadWrite(pDev->HIFDevice,
+ g_MailboxAddrs[mbox],
+ sendList[i].pBuffer,
+ paddedLength,
+ request,
+ NULL);
+ if (status != A_OK) {
+ break;
+ }
+ totalBytes += sendList[i].length;
+ totalwPadding += paddedLength;
+ }
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Sent %d bytes (%d padded bytes) to mailbox : %d \n",totalBytes,totalwPadding,mbox));
+
+ return status;
+}
+
+/* poll the mailbox credit counter until we get a credit or timeout */
+static A_STATUS GetCredits(AR6K_DEVICE *pDev, int mbox, int *pCredits)
+{
+ A_STATUS status = A_OK;
+ int timeout = TEST_CREDITS_RECV_TIMEOUT;
+ A_UINT8 credits = 0;
+ A_UINT32 address;
+
+ while (TRUE) {
+
+ /* Read the counter register to get credits, this auto-decrements */
+ address = COUNT_DEC_ADDRESS + (AR6K_MAILBOXES + mbox) * 4;
+ status = HIFReadWrite(pDev->HIFDevice, address, &credits, sizeof(credits),
+ HIF_RD_SYNC_BYTE_FIX, NULL);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
+ ("Unable to decrement the command credit count register (mbox=%d)\n",mbox));
+ status = A_ERROR;
+ break;
+ }
+
+ if (credits) {
+ break;
+ }
+
+ timeout--;
+
+ if (timeout <= 0) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
+ (" Timeout reading credit registers (mbox=%d, address:0x%X) \n",mbox,address));
+ status = A_ERROR;
+ break;
+ }
+
+ /* delay a little, target may not be ready */
+ A_MDELAY(1000);
+
+ }
+
+ if (status == A_OK) {
+ *pCredits = credits;
+ }
+
+ return status;
+}
+
+
+/* wait for the buffers to come back */
+static A_STATUS RecvBuffers(AR6K_DEVICE *pDev, int mbox)
+{
+ A_STATUS status = A_OK;
+ A_UINT32 request = HIF_RD_SYNC_BLOCK_INC;
+ BUFFER_PROC_LIST recvList[BUFFER_PROC_LIST_DEPTH];
+ int curBuffer;
+ int credits;
+ int i;
+ int totalBytes = 0;
+ int paddedLength;
+ int totalwPadding = 0;
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Waiting for buffers on mailbox : %d \n",mbox));
+
+ /* zero the buffers */
+ InitBuffers(FILL_ZERO);
+
+ /* assemble the order in which we should receive */
+ AssembleBufferList(recvList);
+
+ curBuffer = 0;
+
+ while (curBuffer < BUFFER_PROC_LIST_DEPTH) {
+
+ /* get number of buffers that have been completed, this blocks
+ * until we get at least 1 credit or it times out */
+ status = GetCredits(pDev, mbox, &credits);
+
+ if (status != A_OK) {
+ break;
+ }
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Got %d messages on mailbox : %d \n",credits, mbox));
+
+ /* get all the buffers that are sitting on the queue */
+ for (i = 0; i < credits; i++) {
+ A_ASSERT(curBuffer < BUFFER_PROC_LIST_DEPTH);
+ /* recv the current buffer synchronously, the buffers should come back in
+ * order... with padding applied by the target */
+ paddedLength = (recvList[curBuffer].length + (g_BlockSizes[mbox] - 1)) &
+ (~(g_BlockSizes[mbox] - 1));
+
+ status = HIFReadWrite(pDev->HIFDevice,
+ g_MailboxAddrs[mbox],
+ recvList[curBuffer].pBuffer,
+ paddedLength,
+ request,
+ NULL);
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to read %d bytes on mailbox:%d : address:0x%X \n",
+ recvList[curBuffer].length, mbox, g_MailboxAddrs[mbox]));
+ break;
+ }
+
+ totalwPadding += paddedLength;
+ totalBytes += recvList[curBuffer].length;
+ curBuffer++;
+ }
+
+ if (status != A_OK) {
+ break;
+ }
+ /* go back and get some more */
+ credits = 0;
+ }
+
+ if (totalBytes != TEST_BYTES) {
+ A_ASSERT(FALSE);
+ } else {
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Got all buffers on mbox:%d total recv :%d (w/Padding : %d) \n",
+ mbox, totalBytes, totalwPadding));
+ }
+
+ return status;
+
+
+}
+
+static A_STATUS DoOneMboxHWTest(AR6K_DEVICE *pDev, int mbox)
+{
+ A_STATUS status;
+
+ do {
+ /* send out buffers */
+ status = SendBuffers(pDev,mbox);
+
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Sending buffers Failed : %d mbox:%d\n",status,mbox));
+ break;
+ }
+
+ /* go get them, this will block */
+ status = RecvBuffers(pDev, mbox);
+
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Recv buffers Failed : %d mbox:%d\n",status,mbox));
+ break;
+ }
+
+ /* check the returned data patterns */
+ if (!CheckBuffers()) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Buffer Verify Failed : mbox:%d\n",mbox));
+ status = A_ERROR;
+ break;
+ }
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" Send/Recv success! mailbox : %d \n",mbox));
+
+ } while (FALSE);
+
+ return status;
+}
+
+/* here is where the test starts */
+A_STATUS DoMboxHWTest(AR6K_DEVICE *pDev)
+{
+ int i;
+ A_STATUS status;
+ int credits = 0;
+ A_UINT8 params[4];
+ int numBufs;
+ int bufferSize;
+ A_UINT16 temp;
+
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest START - \n"));
+
+ do {
+ /* get the addresses for all 4 mailboxes */
+ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_ADDR,
+ g_MailboxAddrs, sizeof(g_MailboxAddrs));
+
+ if (status != A_OK) {
+ A_ASSERT(FALSE);
+ break;
+ }
+
+ /* get the block sizes */
+ status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
+ g_BlockSizes, sizeof(g_BlockSizes));
+
+ if (status != A_OK) {
+ A_ASSERT(FALSE);
+ break;
+ }
+
+ /* note, the HIF layer usually reports mbox 0 to have a block size of
+ * 1, but our test wants to run in block-mode for all mailboxes, so we treat all mailboxes
+ * the same. */
+ g_BlockSizes[0] = g_BlockSizes[1];
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Block Size to use: %d \n",g_BlockSizes[0]));
+
+ if (g_BlockSizes[1] > BUFFER_BLOCK_PAD) {
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("%d Block size is too large for buffer pad %d\n",
+ g_BlockSizes[1], BUFFER_BLOCK_PAD));
+ break;
+ }
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Waiting for target.... \n"));
+
+ /* the target lets us know it is ready by giving us 1 credit on
+ * mailbox 0 */
+ status = GetCredits(pDev, 0, &credits);
+
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to wait for target ready \n"));
+ break;
+ }
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Target is ready ...\n"));
+
+ /* read the first 4 scratch registers */
+ status = HIFReadWrite(pDev->HIFDevice,
+ SCRATCH_ADDRESS,
+ params,
+ 4,
+ HIF_RD_SYNC_BYTE_INC,
+ NULL);
+
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to wait get parameters \n"));
+ break;
+ }
+
+ numBufs = params[0];
+ bufferSize = (int)(((A_UINT16)params[2] << 8) | (A_UINT16)params[1]);
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE,
+ ("Target parameters: bufs per mailbox:%d, buffer size:%d bytes (total space: %d, minimum required space (w/padding): %d) \n",
+ numBufs, bufferSize, (numBufs * bufferSize), TOTAL_BYTES));
+
+ if ((numBufs * bufferSize) < TOTAL_BYTES) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Not Enough buffer space to run test! need:%d, got:%d \n",
+ TOTAL_BYTES, (numBufs*bufferSize)));
+ status = A_ERROR;
+ break;
+ }
+
+ temp = GetEndMarker();
+
+ status = HIFReadWrite(pDev->HIFDevice,
+ SCRATCH_ADDRESS + 4,
+ (A_UINT8 *)&temp,
+ 2,
+ HIF_WR_SYNC_BYTE_INC,
+ NULL);
+
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to write end marker \n"));
+ break;
+ }
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("End Marker: 0x%X \n",temp));
+
+ temp = (A_UINT16)g_BlockSizes[1];
+ /* convert to a mask */
+ temp = temp - 1;
+ status = HIFReadWrite(pDev->HIFDevice,
+ SCRATCH_ADDRESS + 6,
+ (A_UINT8 *)&temp,
+ 2,
+ HIF_WR_SYNC_BYTE_INC,
+ NULL);
+
+ if (status != A_OK) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to write block mask \n"));
+ break;
+ }
+
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Set Block Mask: 0x%X \n",temp));
+
+ /* execute the test on each mailbox */
+ for (i = 0; i < AR6K_MAILBOXES; i++) {
+ status = DoOneMboxHWTest(pDev, i);
+ if (status != A_OK) {
+ break;
+ }
+ }
+
+ } while (FALSE);
+
+ if (status == A_OK) {
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest DONE - SUCCESS! - \n"));
+ } else {
+ AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest DONE - FAILED! - \n"));
+ }
+ /* don't let HTC_Start continue, the target is actually not running any HTC code */
+ return A_ERROR;
+}
+#endif
+
+
+
diff --git a/drivers/staging/ath6kl/htc2/AR6000/ar6k.h b/drivers/staging/ath6kl/htc2/AR6000/ar6k.h
new file mode 100644
index 00000000000..b30fd877aeb
--- /dev/null
+++ b/drivers/staging/ath6kl/htc2/AR6000/ar6k.h
@@ -0,0 +1,398 @@
+//------------------------------------------------------------------------------
+// <copyright file="ar6k.h" company="Atheros">
+// Copyright (c) 2007-2010 Atheros Corporation. All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+// AR6K device layer that handles register level I/O
+//
+// Author(s): ="Atheros"
+//==============================================================================
+#ifndef AR6K_H_
+#define AR6K_H_
+
+#include "hci_transport_api.h"
+#include "../htc_debug.h"
+
+#define AR6K_MAILBOXES 4
+
+/* HTC runs over mailbox 0 */
+#define HTC_MAILBOX 0
+
+#define AR6K_TARGET_DEBUG_INTR_MASK 0x01
+
+#define OTHER_INTS_ENABLED (INT_STATUS_ENABLE_ERROR_MASK | \
+ INT_STATUS_ENABLE_CPU_MASK | \
+ INT_STATUS_ENABLE_COUNTER_MASK)
+
+
+//#define MBOXHW_UNIT_TEST 1
+
+#include "athstartpack.h"
+typedef PREPACK struct _AR6K_IRQ_PROC_REGISTERS {
+ A_UINT8 host_int_status;
+ A_UINT8 cpu_int_status;
+ A_UINT8 error_int_status;
+ A_UINT8 counter_int_status;
+ A_UINT8 mbox_frame;
+ A_UINT8 rx_lookahead_valid;
+ A_UINT8 host_int_status2;
+ A_UINT8 gmbox_rx_avail;
+ A_UINT32 rx_lookahead[2];
+ A_UINT32 rx_gmbox_lookahead_alias[2];
+} POSTPACK AR6K_IRQ_PROC_REGISTERS;
+
+#define AR6K_IRQ_PROC_REGS_SIZE sizeof(AR6K_IRQ_PROC_REGISTERS)
+
+typedef PREPACK struct _AR6K_IRQ_ENABLE_REGISTERS {
+ A_UINT8 int_status_enable;
+ A_UINT8 cpu_int_status_enable;
+ A_UINT8 error_status_enable;
+ A_UINT8 counter_int_status_enable;
+} POSTPACK AR6K_IRQ_ENABLE_REGISTERS;
+
+typedef PREPACK struct _AR6K_GMBOX_CTRL_REGISTERS {
+ A_UINT8 int_status_enable;
+} POSTPACK AR6K_GMBOX_CTRL_REGISTERS;
+
+#include "athendpack.h"
+
+#define AR6K_IRQ_ENABLE_REGS_SIZE sizeof(AR6K_IRQ_ENABLE_REGISTERS)
+
+#define AR6K_REG_IO_BUFFER_SIZE 32
+#define AR6K_MAX_REG_IO_BUFFERS 8
+#define FROM_DMA_BUFFER TRUE
+#define TO_DMA_BUFFER FALSE
+#define AR6K_SCATTER_ENTRIES_PER_REQ 16
+#define AR6K_MAX_TRANSFER_SIZE_PER_SCATTER 16*1024
+#define AR6K_SCATTER_REQS 4
+#define AR6K_LEGACY_MAX_WRITE_LENGTH 2048
+
+#ifndef A_CACHE_LINE_PAD
+#define A_CACHE_LINE_PAD 128
+#endif
+#define AR6K_MIN_SCATTER_ENTRIES_PER_REQ 2
+#define AR6K_MIN_TRANSFER_SIZE_PER_SCATTER 4*1024
+
+/* buffers for ASYNC I/O */
+typedef struct AR6K_ASYNC_REG_IO_BUFFER {
+ HTC_PACKET HtcPacket; /* we use an HTC packet as a wrapper for our async register-based I/O */
+ A_UINT8 _Pad1[A_CACHE_LINE_PAD];
+ A_UINT8 Buffer[AR6K_REG_IO_BUFFER_SIZE]; /* cache-line safe with pads around */
+ A_UINT8 _Pad2[A_CACHE_LINE_PAD];
+} AR6K_ASYNC_REG_IO_BUFFER;
+
+typedef struct _AR6K_GMBOX_INFO {
+ void *pProtocolContext;
+ A_STATUS (*pMessagePendingCallBack)(void *pContext, A_UINT8 LookAheadBytes[], int ValidBytes);
+ A_STATUS (*pCreditsPendingCallback)(void *pContext, int NumCredits, A_BOOL CreditIRQEnabled);
+ void (*pTargetFailureCallback)(void *pContext, A_STATUS Status);
+ void (*pStateDumpCallback)(void *pContext);
+ A_BOOL CreditCountIRQEnabled;
+} AR6K_GMBOX_INFO;
+
+typedef struct _AR6K_DEVICE {
+ A_MUTEX_T Lock;
+ A_UINT8 _Pad1[A_CACHE_LINE_PAD];
+ AR6K_IRQ_PROC_REGISTERS IrqProcRegisters; /* cache-line safe with pads around */
+ A_UINT8 _Pad2[A_CACHE_LINE_PAD];
+ AR6K_IRQ_ENABLE_REGISTERS IrqEnableRegisters; /* cache-line safe with pads around */
+ A_UINT8 _Pad3[A_CACHE_LINE_PAD];
+ void *HIFDevice;
+ A_UINT32 BlockSize;
+ A_UINT32 BlockMask;
+ HIF_DEVICE_MBOX_INFO MailBoxInfo;
+ HIF_PENDING_EVENTS_FUNC GetPendingEventsFunc;
+ void *HTCContext;
+ HTC_PACKET_QUEUE RegisterIOList;
+ AR6K_ASYNC_REG_IO_BUFFER RegIOBuffers[AR6K_MAX_REG_IO_BUFFERS];
+ void (*TargetFailureCallback)(void *Context);
+ A_STATUS (*MessagePendingCallback)(void *Context,
+ A_UINT32 LookAheads[],
+ int NumLookAheads,
+ A_BOOL *pAsyncProc,
+ int *pNumPktsFetched);
+ HIF_DEVICE_IRQ_PROCESSING_MODE HifIRQProcessingMode;
+ HIF_MASK_UNMASK_RECV_EVENT HifMaskUmaskRecvEvent;
+ A_BOOL HifAttached;
+ HIF_DEVICE_IRQ_YIELD_PARAMS HifIRQYieldParams;
+ A_BOOL DSRCanYield;
+ int CurrentDSRRecvCount;
+ HIF_DEVICE_SCATTER_SUPPORT_INFO HifScatterInfo;
+ DL_LIST ScatterReqHead;
+ A_BOOL ScatterIsVirtual;
+ int MaxRecvBundleSize;
+ int MaxSendBundleSize;
+ AR6K_GMBOX_INFO GMboxInfo;
+ A_BOOL GMboxEnabled;
+ AR6K_GMBOX_CTRL_REGISTERS GMboxControlRegisters;
+ int RecheckIRQStatusCnt;
+} AR6K_DEVICE;
+
+#define LOCK_AR6K(p) A_MUTEX_LOCK(&(p)->Lock);
+#define UNLOCK_AR6K(p) A_MUTEX_UNLOCK(&(p)->Lock);
+#define REF_IRQ_STATUS_RECHECK(p) (p)->RecheckIRQStatusCnt = 1 /* note: no need to lock this, it only gets set */
+
+A_STATUS DevSetup(AR6K_DEVICE *pDev);
+void DevCleanup(AR6K_DEVICE *pDev);
+A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev);
+A_STATUS DevMaskInterrupts(AR6K_DEVICE *pDev);
+A_STATUS DevPollMboxMsgRecv(AR6K_DEVICE *pDev,
+ A_UINT32 *pLookAhead,
+ int TimeoutMS);
+A_STATUS DevRWCompletionHandler(void *context, A_STATUS status);
+A_STATUS DevDsrHandler(void *context);
+A_STATUS DevCheckPendingRecvMsgsAsync(void *context);
+void DevAsyncIrqProcessComplete(AR6K_DEVICE *pDev);
+void DevDumpRegisters(AR6K_DEVICE *pDev,
+ AR6K_IRQ_PROC_REGISTERS *pIrqProcRegs,
+ AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs);
+
+#define DEV_STOP_RECV_ASYNC TRUE
+#define DEV_STOP_RECV_SYNC FALSE
+#define DEV_ENABLE_RECV_ASYNC TRUE
+#define DEV_ENABLE_RECV_SYNC FALSE
+A_STATUS DevStopRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode);
+A_STATUS DevEnableRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode);
+A_STATUS DevEnableInterrupts(AR6K_DEVICE *pDev);
+A_STATUS DevDisableInterrupts(AR6K_DEVICE *pDev);
+A_STATUS DevWaitForPendingRecv(AR6K_DEVICE *pDev,A_UINT32 TimeoutInMs,A_BOOL *pbIsRecvPending);
+
+#define DEV_CALC_RECV_PADDED_LEN(pDev, length) (((length) + (pDev)->BlockMask) & (~((pDev)->BlockMask)))
+#define DEV_CALC_SEND_PADDED_LEN(pDev, length) DEV_CALC_RECV_PADDED_LEN(pDev,length)
+#define DEV_IS_LEN_BLOCK_ALIGNED(pDev, length) (((length) % (pDev)->BlockSize) == 0)
+
+static INLINE A_STATUS DevSendPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 SendLength) {
+ A_UINT32 paddedLength;
+ A_BOOL sync = (pPacket->Completion == NULL) ? TRUE : FALSE;
+ A_STATUS status;
+
+ /* adjust the length to be a multiple of block size if appropriate */
+ paddedLength = DEV_CALC_SEND_PADDED_LEN(pDev, SendLength);
+
+#if 0
+ if (paddedLength > pPacket->BufferLength) {
+ A_ASSERT(FALSE);
+ if (pPacket->Completion != NULL) {
+ COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
+ return A_OK;
+ }
+ return A_EINVAL;
+ }
+#endif
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
+ ("DevSendPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n",
+ paddedLength,
+ pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX],
+ sync ? "SYNC" : "ASYNC"));
+
+ status = HIFReadWrite(pDev->HIFDevice,
+ pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX],
+ pPacket->pBuffer,
+ paddedLength, /* the padded length */
+ sync ? HIF_WR_SYNC_BLOCK_INC : HIF_WR_ASYNC_BLOCK_INC,
+ sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */
+
+ if (sync) {
+ pPacket->Status = status;
+ } else {
+ if (status == A_PENDING) {
+ status = A_OK;
+ }
+ }
+
+ return status;
+}
+
+static INLINE A_STATUS DevRecvPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 RecvLength) {
+ A_UINT32 paddedLength;
+ A_STATUS status;
+ A_BOOL sync = (pPacket->Completion == NULL) ? TRUE : FALSE;
+
+ /* adjust the length to be a multiple of block size if appropriate */
+ paddedLength = DEV_CALC_RECV_PADDED_LEN(pDev, RecvLength);
+
+ if (paddedLength > pPacket->BufferLength) {
+ A_ASSERT(FALSE);
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
+ ("DevRecvPacket, Not enough space for padlen:%d recvlen:%d bufferlen:%d \n",
+ paddedLength,RecvLength,pPacket->BufferLength));
+ if (pPacket->Completion != NULL) {
+ COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
+ return A_OK;
+ }
+ return A_EINVAL;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
+ ("DevRecvPacket (0x%lX : hdr:0x%X) Padded Length: %d Mbox:0x%X (mode:%s)\n",
+ (unsigned long)pPacket, pPacket->PktInfo.AsRx.ExpectedHdr,
+ paddedLength,
+ pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX],
+ sync ? "SYNC" : "ASYNC"));
+
+ status = HIFReadWrite(pDev->HIFDevice,
+ pDev->MailBoxInfo.MboxAddresses[HTC_MAILBOX],
+ pPacket->pBuffer,
+ paddedLength,
+ sync ? HIF_RD_SYNC_BLOCK_FIX : HIF_RD_ASYNC_BLOCK_FIX,
+ sync ? NULL : pPacket); /* pass the packet as the context to the HIF request */
+
+ if (sync) {
+ pPacket->Status = status;
+ }
+
+ return status;
+}
+
+#define DEV_CHECK_RECV_YIELD(pDev) \
+ ((pDev)->CurrentDSRRecvCount >= (pDev)->HifIRQYieldParams.RecvPacketYieldCount)
+
+#define IS_DEV_IRQ_PROC_SYNC_MODE(pDev) (HIF_DEVICE_IRQ_SYNC_ONLY == (pDev)->HifIRQProcessingMode)
+#define IS_DEV_IRQ_PROCESSING_ASYNC_ALLOWED(pDev) ((pDev)->HifIRQProcessingMode != HIF_DEVICE_IRQ_SYNC_ONLY)
+
+/**************************************************/
+/****** Scatter Function and Definitions
+ *
+ *
+ */
+
+A_STATUS DevCopyScatterListToFromDMABuffer(HIF_SCATTER_REQ *pReq, A_BOOL FromDMA);
+
+ /* copy any READ data back into scatter list */
+#define DEV_FINISH_SCATTER_OPERATION(pR) \
+ if (A_SUCCESS((pR)->CompletionStatus) && \
+ !((pR)->Request & HIF_WRITE) && \
+ ((pR)->ScatterMethod == HIF_SCATTER_DMA_BOUNCE)) { \
+ (pR)->CompletionStatus = DevCopyScatterListToFromDMABuffer((pR),FROM_DMA_BUFFER); \
+ }
+
+ /* copy any WRITE data to bounce buffer */
+static INLINE A_STATUS DEV_PREPARE_SCATTER_OPERATION(HIF_SCATTER_REQ *pReq) {
+ if ((pReq->Request & HIF_WRITE) && (pReq->ScatterMethod == HIF_SCATTER_DMA_BOUNCE)) {
+ return DevCopyScatterListToFromDMABuffer(pReq,TO_DMA_BUFFER);
+ } else {
+ return A_OK;
+ }
+}
+
+
+A_STATUS DevSetupMsgBundling(AR6K_DEVICE *pDev, int MaxMsgsPerTransfer);
+
+#define DEV_GET_MAX_MSG_PER_BUNDLE(pDev) (pDev)->HifScatterInfo.MaxScatterEntries
+#define DEV_GET_MAX_BUNDLE_LENGTH(pDev) (pDev)->HifScatterInfo.MaxTransferSizePerScatterReq
+#define DEV_ALLOC_SCATTER_REQ(pDev) \
+ (pDev)->HifScatterInfo.pAllocateReqFunc((pDev)->ScatterIsVirtual ? (pDev) : (pDev)->HIFDevice)
+
+#define DEV_FREE_SCATTER_REQ(pDev,pR) \
+ (pDev)->HifScatterInfo.pFreeReqFunc((pDev)->ScatterIsVirtual ? (pDev) : (pDev)->HIFDevice,(pR))
+
+#define DEV_GET_MAX_BUNDLE_RECV_LENGTH(pDev) (pDev)->MaxRecvBundleSize
+#define DEV_GET_MAX_BUNDLE_SEND_LENGTH(pDev) (pDev)->MaxSendBundleSize
+
+#define DEV_SCATTER_READ TRUE
+#define DEV_SCATTER_WRITE FALSE
+#define DEV_SCATTER_ASYNC TRUE
+#define DEV_SCATTER_SYNC FALSE
+A_STATUS DevSubmitScatterRequest(AR6K_DEVICE *pDev, HIF_SCATTER_REQ *pScatterReq, A_BOOL Read, A_BOOL Async);
+
+#ifdef MBOXHW_UNIT_TEST
+A_STATUS DoMboxHWTest(AR6K_DEVICE *pDev);
+#endif
+
+ /* completely virtual */
+typedef struct _DEV_SCATTER_DMA_VIRTUAL_INFO {
+ A_UINT8 *pVirtDmaBuffer; /* dma-able buffer - CPU accessible address */
+ A_UINT8 DataArea[1]; /* start of data area */
+} DEV_SCATTER_DMA_VIRTUAL_INFO;
+
+
+
+void DumpAR6KDevState(AR6K_DEVICE *pDev);
+
+/**************************************************/
+/****** GMBOX functions and definitions
+ *
+ *
+ */
+
+#ifdef ATH_AR6K_ENABLE_GMBOX
+
+void DevCleanupGMbox(AR6K_DEVICE *pDev);
+A_STATUS DevSetupGMbox(AR6K_DEVICE *pDev);
+A_STATUS DevCheckGMboxInterrupts(AR6K_DEVICE *pDev);
+void DevNotifyGMboxTargetFailure(AR6K_DEVICE *pDev);
+
+#else
+
+ /* compiled out */
+#define DevCleanupGMbox(p)
+#define DevCheckGMboxInterrupts(p) A_OK
+#define DevNotifyGMboxTargetFailure(p)
+
+static INLINE A_STATUS DevSetupGMbox(AR6K_DEVICE *pDev) {
+ pDev->GMboxEnabled = FALSE;
+ return A_OK;
+}
+
+#endif
+
+#ifdef ATH_AR6K_ENABLE_GMBOX
+
+ /* GMBOX protocol modules must expose each of these internal APIs */
+HCI_TRANSPORT_HANDLE GMboxAttachProtocol(AR6K_DEVICE *pDev, HCI_TRANSPORT_CONFIG_INFO *pInfo);
+A_STATUS GMboxProtocolInstall(AR6K_DEVICE *pDev);
+void GMboxProtocolUninstall(AR6K_DEVICE *pDev);
+
+ /* API used by GMBOX protocol modules */
+AR6K_DEVICE *HTCGetAR6KDevice(void *HTCHandle);
+#define DEV_GMBOX_SET_PROTOCOL(pDev,recv_callback,credits_pending,failure,statedump,context) \
+{ \
+ (pDev)->GMboxInfo.pProtocolContext = (context); \
+ (pDev)->GMboxInfo.pMessagePendingCallBack = (recv_callback); \
+ (pDev)->GMboxInfo.pCreditsPendingCallback = (credits_pending); \
+ (pDev)->GMboxInfo.pTargetFailureCallback = (failure); \
+ (pDev)->GMboxInfo.pStateDumpCallback = (statedump); \
+}
+
+#define DEV_GMBOX_GET_PROTOCOL(pDev) (pDev)->GMboxInfo.pProtocolContext
+
+A_STATUS DevGMboxWrite(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 WriteLength);
+A_STATUS DevGMboxRead(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 ReadLength);
+
+#define PROC_IO_ASYNC TRUE
+#define PROC_IO_SYNC FALSE
+typedef enum GMBOX_IRQ_ACTION_TYPE {
+ GMBOX_ACTION_NONE = 0,
+ GMBOX_DISABLE_ALL,
+ GMBOX_ERRORS_IRQ_ENABLE,
+ GMBOX_RECV_IRQ_ENABLE,
+ GMBOX_RECV_IRQ_DISABLE,
+ GMBOX_CREDIT_IRQ_ENABLE,
+ GMBOX_CREDIT_IRQ_DISABLE,
+} GMBOX_IRQ_ACTION_TYPE;
+
+A_STATUS DevGMboxIRQAction(AR6K_DEVICE *pDev, GMBOX_IRQ_ACTION_TYPE, A_BOOL AsyncMode);
+A_STATUS DevGMboxReadCreditCounter(AR6K_DEVICE *pDev, A_BOOL AsyncMode, int *pCredits);
+A_STATUS DevGMboxReadCreditSize(AR6K_DEVICE *pDev, int *pCreditSize);
+A_STATUS DevGMboxRecvLookAheadPeek(AR6K_DEVICE *pDev, A_UINT8 *pLookAheadBuffer, int *pLookAheadBytes);
+A_STATUS DevGMboxSetTargetInterrupt(AR6K_DEVICE *pDev, int SignalNumber, int AckTimeoutMS);
+
+#endif
+
+#endif /*AR6K_H_*/
diff --git a/drivers/staging/ath6kl/htc2/AR6000/ar6k_events.c b/drivers/staging/ath6kl/htc2/AR6000/ar6k_events.c
new file mode 100644
index 00000000000..920123b9ba1
--- /dev/null
+++ b/drivers/staging/ath6kl/htc2/AR6000/ar6k_events.c
@@ -0,0 +1,784 @@
+//------------------------------------------------------------------------------
+// <copyright file="ar6k_events.c" company="Atheros">
+// Copyright (c) 2007-2010 Atheros Corporation. All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+// AR6K Driver layer event handling (i.e. interrupts, message polling)
+//
+// Author(s): ="Atheros"
+//==============================================================================
+
+#include "a_config.h"
+#include "athdefs.h"
+#include "a_types.h"
+#include "AR6002/hw2.0/hw/mbox_host_reg.h"
+#include "a_osapi.h"
+#include "../htc_debug.h"
+#include "hif.h"
+#include "htc_packet.h"
+#include "ar6k.h"
+
+extern void AR6KFreeIOPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket);
+extern HTC_PACKET *AR6KAllocIOPacket(AR6K_DEVICE *pDev);
+
+static A_STATUS DevServiceDebugInterrupt(AR6K_DEVICE *pDev);
+
+#define DELAY_PER_INTERVAL_MS 10 /* 10 MS delay per polling interval */
+
+/* completion routine for ALL HIF layer async I/O */
+A_STATUS DevRWCompletionHandler(void *context, A_STATUS status)
+{
+ HTC_PACKET *pPacket = (HTC_PACKET *)context;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
+ ("+DevRWCompletionHandler (Pkt:0x%lX) , Status: %d \n",
+ (unsigned long)pPacket,
+ status));
+
+ COMPLETE_HTC_PACKET(pPacket,status);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
+ ("-DevRWCompletionHandler\n"));
+
+ return A_OK;
+}
+
+/* mailbox recv message polling */
+A_STATUS DevPollMboxMsgRecv(AR6K_DEVICE *pDev,
+ A_UINT32 *pLookAhead,
+ int TimeoutMS)
+{
+ A_STATUS status = A_OK;
+ int timeout = TimeoutMS/DELAY_PER_INTERVAL_MS;
+
+ A_ASSERT(timeout > 0);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+DevPollMboxMsgRecv \n"));
+
+ while (TRUE) {
+
+ if (pDev->GetPendingEventsFunc != NULL) {
+
+ HIF_PENDING_EVENTS_INFO events;
+
+#ifdef THREAD_X
+ events.Polling =1;
+#endif
+
+ /* the HIF layer uses a special mechanism to get events, do this
+ * synchronously */
+ status = pDev->GetPendingEventsFunc(pDev->HIFDevice,
+ &events,
+ NULL);
+ if (A_FAILED(status))
+ {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Failed to get pending events \n"));
+ break;
+ }
+
+ if (events.Events & HIF_RECV_MSG_AVAIL)
+ {
+ /* there is a message available, the lookahead should be valid now */
+ *pLookAhead = events.LookAhead;
+
+ break;
+ }
+ } else {
+
+ /* this is the standard HIF way.... */
+ /* load the register table */
+ status = HIFReadWrite(pDev->HIFDevice,
+ HOST_INT_STATUS_ADDRESS,
+ (A_UINT8 *)&pDev->IrqProcRegisters,
+ AR6K_IRQ_PROC_REGS_SIZE,
+ HIF_RD_SYNC_BYTE_INC,
+ NULL);
+
+ if (A_FAILED(status)){
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Failed to read register table \n"));
+ break;
+ }
+
+ /* check for MBOX data and valid lookahead */
+ if (pDev->IrqProcRegisters.host_int_status & (1 << HTC_MAILBOX)) {
+ if (pDev->IrqProcRegisters.rx_lookahead_valid & (1 << HTC_MAILBOX))
+ {
+ /* mailbox has a message and the look ahead is valid */
+ *pLookAhead = pDev->IrqProcRegisters.rx_lookahead[HTC_MAILBOX];
+ break;
+ }
+ }
+
+ }
+
+ timeout--;
+
+ if (timeout <= 0) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" Timeout waiting for recv message \n"));
+ status = A_ERROR;
+
+ /* check if the target asserted */
+ if ( pDev->IrqProcRegisters.counter_int_status & AR6K_TARGET_DEBUG_INTR_MASK) {
+ /* target signaled an assert, process this pending interrupt
+ * this will call the target failure handler */
+ DevServiceDebugInterrupt(pDev);
+ }
+
+ break;
+ }
+
+ /* delay a little */
+ A_MDELAY(DELAY_PER_INTERVAL_MS);
+ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,(" Retry Mbox Poll : %d \n",timeout));
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-DevPollMboxMsgRecv \n"));
+
+ return status;
+}
+
+static A_STATUS DevServiceCPUInterrupt(AR6K_DEVICE *pDev)
+{
+ A_STATUS status;
+ A_UINT8 cpu_int_status;
+ A_UINT8 regBuffer[4];
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("CPU Interrupt\n"));
+ cpu_int_status = pDev->IrqProcRegisters.cpu_int_status &
+ pDev->IrqEnableRegisters.cpu_int_status_enable;
+ A_ASSERT(cpu_int_status);
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
+ ("Valid interrupt source(s) in CPU_INT_STATUS: 0x%x\n",
+ cpu_int_status));
+
+ /* Clear the interrupt */
+ pDev->IrqProcRegisters.cpu_int_status &= ~cpu_int_status; /* W1C */
+
+ /* set up the register transfer buffer to hit the register 4 times , this is done
+ * to make the access 4-byte aligned to mitigate issues with host bus interconnects that
+ * restrict bus transfer lengths to be a multiple of 4-bytes */
+
+ /* set W1C value to clear the interrupt, this hits the register first */
+ regBuffer[0] = cpu_int_status;
+ /* the remaining 4 values are set to zero which have no-effect */
+ regBuffer[1] = 0;
+ regBuffer[2] = 0;
+ regBuffer[3] = 0;
+
+ status = HIFReadWrite(pDev->HIFDevice,
+ CPU_INT_STATUS_ADDRESS,
+ regBuffer,
+ 4,
+ HIF_WR_SYNC_BYTE_FIX,
+ NULL);
+
+ A_ASSERT(status == A_OK);
+ return status;
+}
+
+
+static A_STATUS DevServiceErrorInterrupt(AR6K_DEVICE *pDev)
+{
+ A_STATUS status;
+ A_UINT8 error_int_status;
+ A_UINT8 regBuffer[4];
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error Interrupt\n"));
+ error_int_status = pDev->IrqProcRegisters.error_int_status & 0x0F;
+ A_ASSERT(error_int_status);
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
+ ("Valid interrupt source(s) in ERROR_INT_STATUS: 0x%x\n",
+ error_int_status));
+
+ if (ERROR_INT_STATUS_WAKEUP_GET(error_int_status)) {
+ /* Wakeup */
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error : Wakeup\n"));
+ }
+
+ if (ERROR_INT_STATUS_RX_UNDERFLOW_GET(error_int_status)) {
+ /* Rx Underflow */
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Rx Underflow\n"));
+ }
+
+ if (ERROR_INT_STATUS_TX_OVERFLOW_GET(error_int_status)) {
+ /* Tx Overflow */
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Tx Overflow\n"));
+ }
+
+ /* Clear the interrupt */
+ pDev->IrqProcRegisters.error_int_status &= ~error_int_status; /* W1C */
+
+ /* set up the register transfer buffer to hit the register 4 times , this is done
+ * to make the access 4-byte aligned to mitigate issues with host bus interconnects that
+ * restrict bus transfer lengths to be a multiple of 4-bytes */
+
+ /* set W1C value to clear the interrupt, this hits the register first */
+ regBuffer[0] = error_int_status;
+ /* the remaining 4 values are set to zero which have no-effect */
+ regBuffer[1] = 0;
+ regBuffer[2] = 0;
+ regBuffer[3] = 0;
+
+ status = HIFReadWrite(pDev->HIFDevice,
+ ERROR_INT_STATUS_ADDRESS,
+ regBuffer,
+ 4,
+ HIF_WR_SYNC_BYTE_FIX,
+ NULL);
+
+ A_ASSERT(status == A_OK);
+ return status;
+}
+
+static A_STATUS DevServiceDebugInterrupt(AR6K_DEVICE *pDev)
+{
+ A_UINT32 dummy;
+ A_STATUS status;
+
+ /* Send a target failure event to the application */
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Target debug interrupt\n"));
+
+ if (pDev->TargetFailureCallback != NULL) {
+ pDev->TargetFailureCallback(pDev->HTCContext);
+ }
+
+ if (pDev->GMboxEnabled) {
+ DevNotifyGMboxTargetFailure(pDev);
+ }
+
+ /* clear the interrupt , the debug error interrupt is
+ * counter 0 */
+ /* read counter to clear interrupt */
+ status = HIFReadWrite(pDev->HIFDevice,
+ COUNT_DEC_ADDRESS,
+ (A_UINT8 *)&dummy,
+ 4,
+ HIF_RD_SYNC_BYTE_INC,
+ NULL);
+
+ A_ASSERT(status == A_OK);
+ return status;
+}
+
+static A_STATUS DevServiceCounterInterrupt(AR6K_DEVICE *pDev)
+{
+ A_UINT8 counter_int_status;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Counter Interrupt\n"));
+
+ counter_int_status = pDev->IrqProcRegisters.counter_int_status &
+ pDev->IrqEnableRegisters.counter_int_status_enable;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
+ ("Valid interrupt source(s) in COUNTER_INT_STATUS: 0x%x\n",
+ counter_int_status));
+
+ /* Check if the debug interrupt is pending
+ * NOTE: other modules like GMBOX may use the counter interrupt for
+ * credit flow control on other counters, we only need to check for the debug assertion
+ * counter interrupt */
+ if (counter_int_status & AR6K_TARGET_DEBUG_INTR_MASK) {
+ return DevServiceDebugInterrupt(pDev);
+ }
+
+ return A_OK;
+}
+
+/* callback when our fetch to get interrupt status registers completes */
+static void DevGetEventAsyncHandler(void *Context, HTC_PACKET *pPacket)
+{
+ AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
+ A_UINT32 lookAhead = 0;
+ A_BOOL otherInts = FALSE;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevGetEventAsyncHandler: (dev: 0x%lX)\n", (unsigned long)pDev));
+
+ do {
+
+ if (A_FAILED(pPacket->Status)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
+ (" GetEvents I/O request failed, status:%d \n", pPacket->Status));
+ /* bail out, don't unmask HIF interrupt */
+ break;
+ }
+
+ if (pDev->GetPendingEventsFunc != NULL) {
+ /* the HIF layer collected the information for us */
+ HIF_PENDING_EVENTS_INFO *pEvents = (HIF_PENDING_EVENTS_INFO *)pPacket->pBuffer;
+ if (pEvents->Events & HIF_RECV_MSG_AVAIL) {
+ lookAhead = pEvents->LookAhead;
+ if (0 == lookAhead) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" DevGetEventAsyncHandler1, lookAhead is zero! \n"));
+ }
+ }
+ if (pEvents->Events & HIF_OTHER_EVENTS) {
+ otherInts = TRUE;
+ }
+ } else {
+ /* standard interrupt table handling.... */
+ AR6K_IRQ_PROC_REGISTERS *pReg = (AR6K_IRQ_PROC_REGISTERS *)pPacket->pBuffer;
+ A_UINT8 host_int_status;
+
+ host_int_status = pReg->host_int_status & pDev->IrqEnableRegisters.int_status_enable;
+
+ if (host_int_status & (1 << HTC_MAILBOX)) {
+ host_int_status &= ~(1 << HTC_MAILBOX);
+ if (pReg->rx_lookahead_valid & (1 << HTC_MAILBOX)) {
+ /* mailbox has a message and the look ahead is valid */
+ lookAhead = pReg->rx_lookahead[HTC_MAILBOX];
+ if (0 == lookAhead) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" DevGetEventAsyncHandler2, lookAhead is zero! \n"));
+ }
+ }
+ }
+
+ if (host_int_status) {
+ /* there are other interrupts to handle */
+ otherInts = TRUE;
+ }
+ }
+
+ if (otherInts || (lookAhead == 0)) {
+ /* if there are other interrupts to process, we cannot do this in the async handler so
+ * ack the interrupt which will cause our sync handler to run again
+ * if however there are no more messages, we can now ack the interrupt */
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
+ (" Acking interrupt from DevGetEventAsyncHandler (otherints:%d, lookahead:0x%X)\n",
+ otherInts, lookAhead));
+ HIFAckInterrupt(pDev->HIFDevice);
+ } else {
+ int fetched = 0;
+ A_STATUS status;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
+ (" DevGetEventAsyncHandler : detected another message, lookahead :0x%X \n",
+ lookAhead));
+ /* lookahead is non-zero and there are no other interrupts to service,
+ * go get the next message */
+ status = pDev->MessagePendingCallback(pDev->HTCContext, &lookAhead, 1, NULL, &fetched);
+
+ if (A_SUCCESS(status) && !fetched) {
+ /* HTC layer could not pull out messages due to lack of resources, stop IRQ processing */
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("MessagePendingCallback did not pull any messages, force-ack \n"));
+ DevAsyncIrqProcessComplete(pDev);
+ }
+ }
+
+ } while (FALSE);
+
+ /* free this IO packet */
+ AR6KFreeIOPacket(pDev,pPacket);
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevGetEventAsyncHandler \n"));
+}
+
+/* called by the HTC layer when it wants us to check if the device has any more pending
+ * recv messages, this starts off a series of async requests to read interrupt registers */
+A_STATUS DevCheckPendingRecvMsgsAsync(void *context)
+{
+ AR6K_DEVICE *pDev = (AR6K_DEVICE *)context;
+ A_STATUS status = A_OK;
+ HTC_PACKET *pIOPacket;
+
+ /* this is called in an ASYNC only context, we may NOT block, sleep or call any apis that can
+ * cause us to switch contexts */
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevCheckPendingRecvMsgsAsync: (dev: 0x%lX)\n", (unsigned long)pDev));
+
+ do {
+
+ if (HIF_DEVICE_IRQ_SYNC_ONLY == pDev->HifIRQProcessingMode) {
+ /* break the async processing chain right here, no need to continue.
+ * The DevDsrHandler() will handle things in a loop when things are driven
+ * synchronously */
+ break;
+ }
+
+ /* an optimization to bypass reading the IRQ status registers unecessarily which can re-wake
+ * the target, if upper layers determine that we are in a low-throughput mode, we can
+ * rely on taking another interrupt rather than re-checking the status registers which can
+ * re-wake the target */
+ if (pDev->RecheckIRQStatusCnt == 0) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("Bypassing IRQ Status re-check, re-acking HIF interrupts\n"));
+ /* ack interrupt */
+ HIFAckInterrupt(pDev->HIFDevice);
+ break;
+ }
+
+ /* first allocate one of our HTC packets we created for async I/O
+ * we reuse HTC packet definitions so that we can use the completion mechanism
+ * in DevRWCompletionHandler() */
+ pIOPacket = AR6KAllocIOPacket(pDev);
+
+ if (NULL == pIOPacket) {
+ /* there should be only 1 asynchronous request out at a time to read these registers
+ * so this should actually never happen */
+ status = A_NO_MEMORY;
+ A_ASSERT(FALSE);
+ break;
+ }
+
+ /* stick in our completion routine when the I/O operation completes */
+ pIOPacket->Completion = DevGetEventAsyncHandler;
+ pIOPacket->pContext = pDev;
+
+ if (pDev->GetPendingEventsFunc) {
+ /* HIF layer has it's own mechanism, pass the IO to it.. */
+ status = pDev->GetPendingEventsFunc(pDev->HIFDevice,
+ (HIF_PENDING_EVENTS_INFO *)pIOPacket->pBuffer,
+ pIOPacket);
+
+ } else {
+ /* standard way, read the interrupt register table asynchronously again */
+ status = HIFReadWrite(pDev->HIFDevice,
+ HOST_INT_STATUS_ADDRESS,
+ pIOPacket->pBuffer,
+ AR6K_IRQ_PROC_REGS_SIZE,
+ HIF_RD_ASYNC_BYTE_INC,
+ pIOPacket);
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,(" Async IO issued to get interrupt status...\n"));
+ } while (FALSE);
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevCheckPendingRecvMsgsAsync \n"));
+
+ return status;
+}
+
+void DevAsyncIrqProcessComplete(AR6K_DEVICE *pDev)
+{
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("DevAsyncIrqProcessComplete - forcing HIF IRQ ACK \n"));
+ HIFAckInterrupt(pDev->HIFDevice);
+}
+
+/* process pending interrupts synchronously */
+static A_STATUS ProcessPendingIRQs(AR6K_DEVICE *pDev, A_BOOL *pDone, A_BOOL *pASyncProcessing)
+{
+ A_STATUS status = A_OK;
+ A_UINT8 host_int_status = 0;
+ A_UINT32 lookAhead = 0;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+ProcessPendingIRQs: (dev: 0x%lX)\n", (unsigned long)pDev));
+
+ /*** NOTE: the HIF implementation guarantees that the context of this call allows
+ * us to perform SYNCHRONOUS I/O, that is we can block, sleep or call any API that
+ * can block or switch thread/task ontexts.
+ * This is a fully schedulable context.
+ * */
+ do {
+
+ if (pDev->IrqEnableRegisters.int_status_enable == 0) {
+ /* interrupt enables have been cleared, do not try to process any pending interrupts that
+ * may result in more bus transactions. The target may be unresponsive at this
+ * point. */
+ break;
+ }
+
+ if (pDev->GetPendingEventsFunc != NULL) {
+ HIF_PENDING_EVENTS_INFO events;
+
+#ifdef THREAD_X
+ events.Polling= 0;
+#endif
+ /* the HIF layer uses a special mechanism to get events
+ * get this synchronously */
+ status = pDev->GetPendingEventsFunc(pDev->HIFDevice,
+ &events,
+ NULL);
+
+ if (A_FAILED(status)) {
+ break;
+ }
+
+ if (events.Events & HIF_RECV_MSG_AVAIL) {
+ lookAhead = events.LookAhead;
+ if (0 == lookAhead) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" ProcessPendingIRQs1 lookAhead is zero! \n"));
+ }
+ }
+
+ if (!(events.Events & HIF_OTHER_EVENTS) ||
+ !(pDev->IrqEnableRegisters.int_status_enable & OTHER_INTS_ENABLED)) {
+ /* no need to read the register table, no other interesting interrupts.
+ * Some interfaces (like SPI) can shadow interrupt sources without
+ * requiring the host to do a full table read */
+ break;
+ }
+
+ /* otherwise fall through and read the register table */
+ }
+
+ /*
+ * Read the first 28 bytes of the HTC register table. This will yield us
+ * the value of different int status registers and the lookahead
+ * registers.
+ * length = sizeof(int_status) + sizeof(cpu_int_status) +
+ * sizeof(error_int_status) + sizeof(counter_int_status) +
+ * sizeof(mbox_frame) + sizeof(rx_lookahead_valid) +
+ * sizeof(hole) + sizeof(rx_lookahead) +
+ * sizeof(int_status_enable) + sizeof(cpu_int_status_enable) +
+ * sizeof(error_status_enable) +
+ * sizeof(counter_int_status_enable);
+ *
+ */
+#ifdef CONFIG_MMC_SDHCI_S3C
+ pDev->IrqProcRegisters.host_int_status = 0;
+ pDev->IrqProcRegisters.rx_lookahead_valid = 0;
+ pDev->IrqProcRegisters.host_int_status2 = 0;
+ pDev->IrqProcRegisters.rx_lookahead[0] = 0;
+ pDev->IrqProcRegisters.rx_lookahead[1] = 0xaaa5555;
+#endif /* CONFIG_MMC_SDHCI_S3C */
+ status = HIFReadWrite(pDev->HIFDevice,
+ HOST_INT_STATUS_ADDRESS,
+ (A_UINT8 *)&pDev->IrqProcRegisters,
+ AR6K_IRQ_PROC_REGS_SIZE,
+ HIF_RD_SYNC_BYTE_INC,
+ NULL);
+
+ if (A_FAILED(status)) {
+ break;
+ }
+
+#ifdef ATH_DEBUG_MODULE
+ if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_IRQ)) {
+ DevDumpRegisters(pDev,
+ &pDev->IrqProcRegisters,
+ &pDev->IrqEnableRegisters);
+ }
+#endif
+
+ /* Update only those registers that are enabled */
+ host_int_status = pDev->IrqProcRegisters.host_int_status &
+ pDev->IrqEnableRegisters.int_status_enable;
+
+ if (NULL == pDev->GetPendingEventsFunc) {
+ /* only look at mailbox status if the HIF layer did not provide this function,
+ * on some HIF interfaces reading the RX lookahead is not valid to do */
+ if (host_int_status & (1 << HTC_MAILBOX)) {
+ /* mask out pending mailbox value, we use "lookAhead" as the real flag for
+ * mailbox processing below */
+ host_int_status &= ~(1 << HTC_MAILBOX);
+ if (pDev->IrqProcRegisters.rx_lookahead_valid & (1 << HTC_MAILBOX)) {
+ /* mailbox has a message and the look ahead is valid */
+ lookAhead = pDev->IrqProcRegisters.rx_lookahead[HTC_MAILBOX];
+ if (0 == lookAhead) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" ProcessPendingIRQs2, lookAhead is zero! \n"));
+ }
+ }
+ }
+ } else {
+ /* not valid to check if the HIF has another mechanism for reading mailbox pending status*/
+ host_int_status &= ~(1 << HTC_MAILBOX);
+ }
+
+ if (pDev->GMboxEnabled) {
+ /*call GMBOX layer to process any interrupts of interest */
+ status = DevCheckGMboxInterrupts(pDev);
+ }
+
+ } while (FALSE);
+
+
+ do {
+
+ /* did the interrupt status fetches succeed? */
+ if (A_FAILED(status)) {
+ break;
+ }
+
+ if ((0 == host_int_status) && (0 == lookAhead)) {
+ /* nothing to process, the caller can use this to break out of a loop */
+ *pDone = TRUE;
+ break;
+ }
+
+ if (lookAhead != 0) {
+ int fetched = 0;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("Pending mailbox message, LookAhead: 0x%X\n",lookAhead));
+ /* Mailbox Interrupt, the HTC layer may issue async requests to empty the
+ * mailbox...
+ * When emptying the recv mailbox we use the async handler above called from the
+ * completion routine of the callers read request. This can improve performance
+ * by reducing context switching when we rapidly pull packets */
+ status = pDev->MessagePendingCallback(pDev->HTCContext, &lookAhead, 1, pASyncProcessing, &fetched);
+ if (A_FAILED(status)) {
+ break;
+ }
+
+ if (!fetched) {
+ /* HTC could not pull any messages out due to lack of resources */
+ /* force DSR handler to ack the interrupt */
+ *pASyncProcessing = FALSE;
+ pDev->RecheckIRQStatusCnt = 0;
+ }
+ }
+
+ /* now handle the rest of them */
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
+ (" Valid interrupt source(s) for OTHER interrupts: 0x%x\n",
+ host_int_status));
+
+ if (HOST_INT_STATUS_CPU_GET(host_int_status)) {
+ /* CPU Interrupt */
+ status = DevServiceCPUInterrupt(pDev);
+ if (A_FAILED(status)){
+ break;
+ }
+ }
+
+ if (HOST_INT_STATUS_ERROR_GET(host_int_status)) {
+ /* Error Interrupt */
+ status = DevServiceErrorInterrupt(pDev);
+ if (A_FAILED(status)){
+ break;
+ }
+ }
+
+ if (HOST_INT_STATUS_COUNTER_GET(host_int_status)) {
+ /* Counter Interrupt */
+ status = DevServiceCounterInterrupt(pDev);
+ if (A_FAILED(status)){
+ break;
+ }
+ }
+
+ } while (FALSE);
+
+ /* an optimization to bypass reading the IRQ status registers unecessarily which can re-wake
+ * the target, if upper layers determine that we are in a low-throughput mode, we can
+ * rely on taking another interrupt rather than re-checking the status registers which can
+ * re-wake the target.
+ *
+ * NOTE : for host interfaces that use the special GetPendingEventsFunc, this optimization cannot
+ * be used due to possible side-effects. For example, SPI requires the host to drain all
+ * messages from the mailbox before exiting the ISR routine. */
+ if (!(*pASyncProcessing) && (pDev->RecheckIRQStatusCnt == 0) && (pDev->GetPendingEventsFunc == NULL)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("Bypassing IRQ Status re-check, forcing done \n"));
+ *pDone = TRUE;
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-ProcessPendingIRQs: (done:%d, async:%d) status=%d \n",
+ *pDone, *pASyncProcessing, status));
+
+ return status;
+}
+
+
+/* Synchronousinterrupt handler, this handler kicks off all interrupt processing.*/
+A_STATUS DevDsrHandler(void *context)
+{
+ AR6K_DEVICE *pDev = (AR6K_DEVICE *)context;
+ A_STATUS status = A_OK;
+ A_BOOL done = FALSE;
+ A_BOOL asyncProc = FALSE;
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevDsrHandler: (dev: 0x%lX)\n", (unsigned long)pDev));
+
+ /* reset the recv counter that tracks when we need to yield from the DSR */
+ pDev->CurrentDSRRecvCount = 0;
+ /* reset counter used to flag a re-scan of IRQ status registers on the target */
+ pDev->RecheckIRQStatusCnt = 0;
+
+ while (!done) {
+ status = ProcessPendingIRQs(pDev, &done, &asyncProc);
+ if (A_FAILED(status)) {
+ break;
+ }
+
+ if (HIF_DEVICE_IRQ_SYNC_ONLY == pDev->HifIRQProcessingMode) {
+ /* the HIF layer does not allow async IRQ processing, override the asyncProc flag */
+ asyncProc = FALSE;
+ /* this will cause us to re-enter ProcessPendingIRQ() and re-read interrupt status registers.
+ * this has a nice side effect of blocking us until all async read requests are completed.
+ * This behavior is required on some HIF implementations that do not allow ASYNC
+ * processing in interrupt handlers (like Windows CE) */
+
+ if (pDev->DSRCanYield && DEV_CHECK_RECV_YIELD(pDev)) {
+ /* ProcessPendingIRQs() pulled enough recv messages to satisfy the yield count, stop
+ * checking for more messages and return */
+ break;
+ }
+ }
+
+ if (asyncProc) {
+ /* the function performed some async I/O for performance, we
+ need to exit the ISR immediately, the check below will prevent the interrupt from being
+ Ack'd while we handle it asynchronously */
+ break;
+ }
+
+ }
+
+ if (A_SUCCESS(status) && !asyncProc) {
+ /* Ack the interrupt only if :
+ * 1. we did not get any errors in processing interrupts
+ * 2. there are no outstanding async processing requests */
+ if (pDev->DSRCanYield) {
+ /* if the DSR can yield do not ACK the interrupt, there could be more pending messages.
+ * The HIF layer must ACK the interrupt on behalf of HTC */
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,(" Yield in effect (cur RX count: %d) \n", pDev->CurrentDSRRecvCount));
+ } else {
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,(" Acking interrupt from DevDsrHandler \n"));
+ HIFAckInterrupt(pDev->HIFDevice);
+ }
+ }
+
+ AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevDsrHandler \n"));
+ return status;
+}
+
+#ifdef ATH_DEBUG_MODULE
+void DumpAR6KDevState(AR6K_DEVICE *pDev)
+{
+ A_STATUS status;
+ AR6K_IRQ_ENABLE_REGISTERS regs;
+ AR6K_IRQ_PROC_REGISTERS procRegs;
+
+ LOCK_AR6K(pDev);
+ /* copy into our temp area */
+ A_MEMCPY(&regs,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
+ UNLOCK_AR6K(pDev);
+
+ /* load the register table from the device */
+ status = HIFReadWrite(pDev->HIFDevice,
+ HOST_INT_STATUS_ADDRESS,
+ (A_UINT8 *)&procRegs,
+ AR6K_IRQ_PROC_REGS_SIZE,
+ HIF_RD_SYNC_BYTE_INC,
+ NULL);
+
+ if (A_FAILED(status)) {
+ AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
+ ("DumpAR6KDevState : Failed to read register table (%d) \n",status));
+ return;
+ }
+
+ DevDumpRegisters(pDev,&procRegs,&regs);
+
+ if (pDev->GMboxInfo.pStateDumpCallback != NULL) {
+ pDev->GMboxInfo.pStateDumpCallback(pDev->GMboxInfo.pProtocolContext);
+ }
+
+ /* dump any bus state at the HIF layer */
+ HIFConfigureDevice(pDev->HIFDevice,HIF_DEVICE_DEBUG_BUS_STATE,NULL,0);
+
+}
+#endif
+
+
diff --git a/drivers/staging/ath6kl/htc2/AR6000/ar6k_gmbox.c b/drivers/staging/ath6kl/htc2/AR6000/ar6k_gmbox.c
new file mode 100644
index 00000000000..e3d270d1d62
--- /dev/null
+++ b/drivers/staging/ath6kl/htc2/AR6000/ar6k_gmbox.c
@@ -0,0 +1,756 @@
+//------------------------------------------------------------------------------
+// <copyright file="ar6k_gmbox.c" company="Atheros">
+// Copyright (c) 2007-2010 Atheros Corporation. All rights reserved.
+//
+//
+// Permission to use, copy, modify, and/or distribute this software for any
+// purpose with or without fee is hereby granted, provided that the above
+// copyright notice and this permission notice appear in all copies.
+//
+// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+//
+//
+//------------------------------------------------------------------------------
+//==============================================================================
+// Generic MBOX API implementation
+//
+// Author(s): ="Atheros"
+//==============================================================================
+#include "a_config.h"
+#include "athdefs.h"
+#include "a_types.h"
+#include "a_osapi.h"
+#include "../htc_debug.h"
+#include "hif.h"
+#include "htc_packet.h"
+#include "ar6k.h"
+#include "hw/mbox_host_reg.h"
+#include "gmboxif.h"
+
+/*
+ * This file provides management functions and a toolbox for GMBOX protocol modules.