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authorMichael Hennerich <michael.hennerich@analog.com>2010-10-22 02:01:48 -0400
committerGrant Likely <grant.likely@secretlab.ca>2010-10-22 01:26:46 -0600
commit782a895693a52fd8b288c33bdd7e98357888fc1f (patch)
treec1deb3d7b5e6555973cf06ee7ec58a3b839255bc
parent2b9603a0d7e395fb844af90fba71448bc8019077 (diff)
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spi/bfin_spi: handle error/status changes after data interrupts
The error interrupt on the BF537 SIC cannot be enabled on a per-peripheral basis. Once the error interrupt is enabled for one peripheral, it is automatically enabled for all. So in the Blackfin on-chip SPI driver, we need to clear out these known errors in the data interrupt once we've successfully finished processing all of the pending data. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
-rw-r--r--drivers/spi/spi_bfin5xx.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index ab483a0ec6d..d3da41d3f92 100644
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -504,6 +504,15 @@ static irqreturn_t bfin_spi_dma_irq_handler(int irq, void *dev_id)
"in dma_irq_handler dmastat:0x%x spistat:0x%x\n",
dmastat, spistat);
+ if (drv_data->rx != NULL) {
+ u16 cr = read_CTRL(drv_data);
+ /* discard old RX data and clear RXS */
+ bfin_spi_dummy_read(drv_data);
+ write_CTRL(drv_data, cr & ~BIT_CTL_ENABLE); /* Disable SPI */
+ write_CTRL(drv_data, cr & ~BIT_CTL_TIMOD); /* Restore State */
+ write_STAT(drv_data, BIT_STAT_CLR); /* Clear Status */
+ }
+
clear_dma_irqstat(drv_data->dma_channel);
/*