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authorHari Kanigeri <h-kanigeri2@ti.com>2010-08-20 13:50:18 +0000
committerTony Lindgren <tony@atomide.com>2010-10-05 10:22:13 -0700
commit0fa035e52373386381fcdfbd506e32eac0c662f0 (patch)
tree54096bf2eaa7f9d9ffa55c05a63711ee7f063900
parent3c729087d4312a4a1fa1a8b674fd9c8050cfc3db (diff)
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omap: iommu-load cam register before flushing the entry
The flush_iotlb_page is not loading the cam register before flushing the cam entry. This causes wrong entry to be flushed out from the TLB, and if the entry happens to be a locked TLB entry it would lead to MMU faults. The fix is to load the cam register with the address to be flushed before flushing the TLB entry. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/plat-omap/iommu.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index a202a2ce6e3..6cd151b31bc 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -320,6 +320,7 @@ void flush_iotlb_page(struct iommu *obj, u32 da)
if ((start <= da) && (da < start + bytes)) {
dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n",
__func__, start, da, bytes);
+ iotlb_load_cr(obj, &cr);
iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
}
}