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authorGuillem Jover <guillem@hadrons.org>2010-09-17 17:24:11 +0200
committerJean Delvare <khali@linux-fr.org>2010-09-17 17:24:11 +0200
commit96f3640894012be7dd15a384566bfdc18297bc6c (patch)
treea39f2474004a25dd46b3add0aeb3a1f0429045a3
parent9e012c1acc1fd617a708c00ff1fdaa847f9faf67 (diff)
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hwmon: (f75375s) Shift control mode to the correct bit position
The spec notes that fan0 and fan1 control mode bits are located in bits 7-6 and 5-4 respectively, but the FAN_CTRL_MODE macro was making the bits shift by 5 instead of by 4. Signed-off-by: Guillem Jover <guillem@hadrons.org> Cc: Riku Voipio <riku.voipio@iki.fi> Cc: stable@kernel.org Signed-off-by: Jean Delvare <khali@linux-fr.org>
-rw-r--r--drivers/hwmon/f75375s.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/hwmon/f75375s.c b/drivers/hwmon/f75375s.c
index 0f58ecc5334..e5828c009d9 100644
--- a/drivers/hwmon/f75375s.c
+++ b/drivers/hwmon/f75375s.c
@@ -79,7 +79,7 @@ enum chips { f75373, f75375 };
#define F75375_REG_PWM2_DROP_DUTY 0x6C
#define FAN_CTRL_LINEAR(nr) (4 + nr)
-#define FAN_CTRL_MODE(nr) (5 + ((nr) * 2))
+#define FAN_CTRL_MODE(nr) (4 + ((nr) * 2))
/*
* Data structures and manipulation thereof