# Copyright (C) 1991-2005 Altera Corporation # Any megafunction design, and related netlist (encrypted or decrypted), # support information, device programming or simulation file, and any other # associated documentation or information provided by Altera or a partner # under Altera's Megafunction Partnership Program may be used only # to program PLD devices (but not masked PLD devices) from Altera. Any # other use of such megafunction design, netlist, support information, # device programming or simulation file, or any other related documentation # or information is prohibited for any other purpose, including, but not # limited to modification, reverse engineering, de-compiling, or use with # any other silicon devices, unless such use is explicitly licensed under # a separate agreement with Altera or a megafunction partner. Title to the # intellectual property, including patents, copyrights, trademarks, trade # secrets, or maskworks, embodied in any such megafunction design, netlist, # support information, device programming or simulation file, or any other # related documentation or information provided by Altera or a megafunction # partner, remains with Altera, the megafunction partner, or their respective # licensors. No other licenses, including any licenses needed under any third # party's intellectual property, are provided herein. # The default values for assignments are stored in the file # abc80_assignment_defaults.qdf # If this file doesn't exist, and for assignments not listed, see file # assignment_defaults.qdf # Altera recommends that you do not modify this file. This # file is updated automatically by the Quartus II software # and any changes you make may be lost or overwritten. # Project-Wide Assignments # ======================== set_global_assignment -name SMART_RECOMPILE ON set_global_assignment -name ORIGINAL_QUARTUS_VERSION 2.2 set_global_assignment -name PROJECT_CREATION_TIME_DATE "23:24:24 AUGUST 26, 2004" set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" # Pin & Location Assignments # ========================== set_location_assignment PIN_A13 -to gpio_0[0] set_location_assignment PIN_B13 -to gpio_0[1] set_location_assignment PIN_A14 -to gpio_0[2] set_location_assignment PIN_B14 -to gpio_0[3] set_location_assignment PIN_A15 -to gpio_0[4] set_location_assignment PIN_B15 -to gpio_0[5] set_location_assignment PIN_A16 -to gpio_0[6] set_location_assignment PIN_B16 -to gpio_0[7] set_location_assignment PIN_A17 -to gpio_0[8] set_location_assignment PIN_B17 -to gpio_0[9] set_location_assignment PIN_A18 -to gpio_0[10] set_location_assignment PIN_B18 -to gpio_0[11] set_location_assignment PIN_A19 -to gpio_0[12] set_location_assignment PIN_B19 -to gpio_0[13] set_location_assignment PIN_A20 -to gpio_0[14] set_location_assignment PIN_B20 -to gpio_0[15] set_location_assignment PIN_C21 -to gpio_0[16] set_location_assignment PIN_C22 -to gpio_0[17] set_location_assignment PIN_D21 -to gpio_0[18] set_location_assignment PIN_D22 -to gpio_0[19] set_location_assignment PIN_E21 -to gpio_0[20] set_location_assignment PIN_E22 -to gpio_0[21] set_location_assignment PIN_F21 -to gpio_0[22] set_location_assignment PIN_F22 -to gpio_0[23] set_location_assignment PIN_G21 -to gpio_0[24] set_location_assignment PIN_G22 -to gpio_0[25] set_location_assignment PIN_J21 -to gpio_0[26] set_location_assignment PIN_J22 -to gpio_0[27] set_location_assignment PIN_K21 -to gpio_0[28] set_location_assignment PIN_K22 -to gpio_0[29] set_location_assignment PIN_J19 -to gpio_0[30] set_location_assignment PIN_J20 -to gpio_0[31] set_location_assignment PIN_J18 -to gpio_0[32] set_location_assignment PIN_K20 -to gpio_0[33] set_location_assignment PIN_L19 -to gpio_0[34] set_location_assignment PIN_L18 -to gpio_0[35] set_location_assignment PIN_H12 -to gpio_1[0] set_location_assignment PIN_H13 -to gpio_1[1] set_location_assignment PIN_H14 -to gpio_1[2] set_location_assignment PIN_G15 -to gpio_1[3] set_location_assignment PIN_E14 -to gpio_1[4] set_location_assignment PIN_E15 -to gpio_1[5] set_location_assignment PIN_F15 -to gpio_1[6] set_location_assignment PIN_G16 -to gpio_1[7] set_location_assignment PIN_F12 -to gpio_1[8] set_location_assignment PIN_F13 -to gpio_1[9] set_location_assignment PIN_C14 -to gpio_1[10] set_location_assignment PIN_D14 -to gpio_1[11] set_location_assignment PIN_D15 -to gpio_1[12] set_location_assignment PIN_D16 -to gpio_1[13] set_location_assignment PIN_C17 -to gpio_1[14] set_location_assignment PIN_C18 -to gpio_1[15] set_location_assignment PIN_C19 -to gpio_1[16] set_location_assignment PIN_C20 -to gpio_1[17] set_location_assignment PIN_D19 -to gpio_1[18] set_location_assignment PIN_D20 -to gpio_1[19] set_location_assignment PIN_E20 -to gpio_1[20] set_location_assignment PIN_F20 -to gpio_1[21] set_location_assignment PIN_E19 -to gpio_1[22] set_location_assignment PIN_E18 -to gpio_1[23] set_location_assignment PIN_G20 -to gpio_1[24] set_location_assignment PIN_G18 -to gpio_1[25] set_location_assignment PIN_G17 -to gpio_1[26] set_location_assignment PIN_H17 -to gpio_1[27] set_location_assignment PIN_J15 -to gpio_1[28] set_location_assignment PIN_H18 -to gpio_1[29] set_location_assignment PIN_N22 -to gpio_1[30] set_location_assignment PIN_N21 -to gpio_1[31] set_location_assignment PIN_P15 -to gpio_1[32] set_location_assignment PIN_N15 -to gpio_1[33] set_location_assignment PIN_P17 -to gpio_1[34] set_location_assignment PIN_P18 -to gpio_1[35] set_location_assignment PIN_L22 -to sw[0] set_location_assignment PIN_L21 -to sw[1] set_location_assignment PIN_M22 -to sw[2] set_location_assignment PIN_V12 -to sw[3] set_location_assignment PIN_W12 -to sw[4] set_location_assignment PIN_U12 -to sw[5] set_location_assignment PIN_U11 -to sw[6] set_location_assignment PIN_M2 -to sw[7] set_location_assignment PIN_M1 -to sw[8] set_location_assignment PIN_L2 -to sw[9] set_location_assignment PIN_J2 -to s7_0[0] set_location_assignment PIN_J1 -to s7_0[1] set_location_assignment PIN_H2 -to s7_0[2] set_location_assignment PIN_H1 -to s7_0[3] set_location_assignment PIN_F2 -to s7_0[4] set_location_assignment PIN_F1 -to s7_0[5] set_location_assignment PIN_E2 -to s7_0[6] set_location_assignment PIN_E1 -to s7_1[0] set_location_assignment PIN_H6 -to s7_1[1] set_location_assignment PIN_H5 -to s7_1[2] set_location_assignment PIN_H4 -to s7_1[3] set_location_assignment PIN_G3 -to s7_1[4] set_location_assignment PIN_D2 -to s7_1[5] set_location_assignment PIN_D1 -to s7_1[6] set_location_assignment PIN_G5 -to s7_2[0] set_location_assignment PIN_G6 -to s7_2[1] set_location_assignment PIN_C2 -to s7_2[2] set_location_assignment PIN_C1 -to s7_2[3] set_location_assignment PIN_E3 -to s7_2[4] set_location_assignment PIN_E4 -to s7_2[5] set_location_assignment PIN_D3 -to s7_2[6] set_location_assignment PIN_F4 -to s7_3[0] set_location_assignment PIN_D5 -to s7_3[1] set_location_assignment PIN_D6 -to s7_3[2] set_location_assignment PIN_J4 -to s7_3[3] set_location_assignment PIN_L8 -to s7_3[4] set_location_assignment PIN_F3 -to s7_3[5] set_location_assignment PIN_D4 -to s7_3[6] set_location_assignment PIN_R22 -to key_n[0] set_location_assignment PIN_R21 -to key_n[1] set_location_assignment PIN_T22 -to key_n[2] set_location_assignment PIN_T21 -to key_n[3] set_location_assignment PIN_R20 -to ledr[0] set_location_assignment PIN_R19 -to ledr[1] set_location_assignment PIN_U19 -to ledr[2] set_location_assignment PIN_Y19 -to ledr[3] set_location_assignment PIN_T18 -to ledr[4] set_location_assignment PIN_V19 -to ledr[5] set_location_assignment PIN_Y18 -to ledr[6] set_location_assignment PIN_U18 -to ledr[7] set_location_assignment PIN_R18 -to ledr[8] set_location_assignment PIN_R17 -to ledr[9] set_location_assignment PIN_U22 -to ledg[0] set_location_assignment PIN_U21 -to ledg[1] set_location_assignment PIN_V22 -to ledg[2] set_location_assignment PIN_V21 -to ledg[3] set_location_assignment PIN_W22 -to ledg[4] set_location_assignment PIN_W21 -to ledg[5] set_location_assignment PIN_Y22 -to ledg[6] set_location_assignment PIN_Y21 -to ledg[7] set_location_assignment PIN_D12 -to clock_27[0] set_location_assignment PIN_E12 -to clock_27[1] set_location_assignment PIN_B12 -to clock_24[0] set_location_assignment PIN_A12 -to clock_24[1] set_location_assignment PIN_L1 -to clock_50 set_location_assignment PIN_M21 -to ext_clock set_location_assignment PIN_H15 -to ps2_clk set_location_assignment PIN_J14 -to ps2_dat set_location_assignment PIN_F14 -to uart_rxd set_location_assignment PIN_G12 -to uart_txd set_location_assignment PIN_E8 -to tdi set_location_assignment PIN_D8 -to tcs set_location_assignment PIN_C7 -to tck set_location_assignment PIN_D7 -to tdo set_location_assignment PIN_D9 -to vga_r[0] set_location_assignment PIN_C9 -to vga_r[1] set_location_assignment PIN_A7 -to vga_r[2] set_location_assignment PIN_B7 -to vga_r[3] set_location_assignment PIN_B8 -to vga_g[0] set_location_assignment PIN_C10 -to vga_g[1] set_location_assignment PIN_B9 -to vga_g[2] set_location_assignment PIN_A8 -to vga_g[3] set_location_assignment PIN_A9 -to vga_b[0] set_location_assignment PIN_D11 -to vga_b[1] set_location_assignment PIN_A10 -to vga_b[2] set_location_assignment PIN_B10 -to vga_b[3] set_location_assignment PIN_A11 -to vga_hs set_location_assignment PIN_B11 -to vga_vs set_location_assignment PIN_A3 -to i2c_scl set_location_assignment PIN_B3 -to i2c_sda set_location_assignment PIN_A6 -to aud_adclrck set_location_assignment PIN_B6 -to aud_adcdat set_location_assignment PIN_A5 -to aud_daclrck set_location_assignment PIN_B5 -to aud_dacdat set_location_assignment PIN_B4 -to aud_xck set_location_assignment PIN_A4 -to aud_bclk set_location_assignment PIN_W4 -to dram_a[0] set_location_assignment PIN_W5 -to dram_a[1] set_location_assignment PIN_Y3 -to dram_a[2] set_location_assignment PIN_Y4 -to dram_a[3] set_location_assignment PIN_R6 -to dram_a[4] set_location_assignment PIN_R5 -to dram_a[5] set_location_assignment PIN_P6 -to dram_a[6] set_location_assignment PIN_P5 -to dram_a[7] set_location_assignment PIN_P3 -to dram_a[8] set_location_assignment PIN_N4 -to dram_a[9] set_location_assignment PIN_W3 -to dram_a[10] set_location_assignment PIN_N6 -to dram_a[11] set_location_assignment PIN_U3 -to dram_ba[0] set_location_assignment PIN_V4 -to dram_ba[1] set_location_assignment PIN_T3 -to dram_cas_n set_location_assignment PIN_N3 -to dram_cke set_location_assignment PIN_U4 -to dram_clk set_location_assignment PIN_T6 -to dram_cs_n set_location_assignment PIN_U1 -to dram_dq[0] set_location_assignment PIN_U2 -to dram_dq[1] set_location_assignment PIN_V1 -to dram_dq[2] set_location_assignment PIN_V2 -to dram_dq[3] set_location_assignment PIN_W1 -to dram_dq[4] set_location_assignment PIN_W2 -to dram_dq[5] set_location_assignment PIN_Y1 -to dram_dq[6] set_location_assignment PIN_Y2 -to dram_dq[7] set_location_assignment PIN_N1 -to dram_dq[8] set_location_assignment PIN_N2 -to dram_dq[9] set_location_assignment PIN_P1 -to dram_dq[10] set_location_assignment PIN_P2 -to dram_dq[11] set_location_assignment PIN_R1 -to dram_dq[12] set_location_assignment PIN_R2 -to dram_dq[13] set_location_assignment PIN_T1 -to dram_dq[14] set_location_assignment PIN_T2 -to dram_dq[15] set_location_assignment PIN_R7 -to dram_dqm[0] set_location_assignment PIN_T5 -to dram_ras_n set_location_assignment PIN_M5 -to dram_dqm[1] set_location_assignment PIN_R8 -to dram_we_n set_location_assignment PIN_AB20 -to fl_a[0] set_location_assignment PIN_AA14 -to fl_a[1] set_location_assignment PIN_Y16 -to fl_a[2] set_location_assignment PIN_R15 -to fl_a[3] set_location_assignment PIN_T15 -to fl_a[4] set_location_assignment PIN_U15 -to fl_a[5] set_location_assignment PIN_V15 -to fl_a[6] set_location_assignment PIN_W15 -to fl_a[7] set_location_assignment PIN_R14 -to fl_a[8] set_location_assignment PIN_Y13 -to fl_a[9] set_location_assignment PIN_R12 -to fl_a[10] set_location_assignment PIN_T12 -to fl_a[11] set_location_assignment PIN_AB14 -to fl_a[12] set_location_assignment PIN_AA13 -to fl_a[13] set_location_assignment PIN_AB13 -to fl_a[14] set_location_assignment PIN_AA12 -to fl_a[15] set_location_assignment PIN_AB12 -to fl_a[16] set_location_assignment PIN_AA20 -to fl_a[17] set_location_assignment PIN_U14 -to fl_a[18] set_location_assignment PIN_V14 -to fl_a[19] set_location_assignment PIN_U13 -to fl_a[20] set_location_assignment PIN_R13 -to fl_a[21] set_location_assignment PIN_AB16 -to fl_dq[0] set_location_assignment PIN_AA16 -to fl_dq[1] set_location_assignment PIN_AB17 -to fl_dq[2] set_location_assignment PIN_AA17 -to fl_dq[3] set_location_assignment PIN_AB18 -to fl_dq[4] set_location_assignment PIN_AA18 -to fl_dq[5] set_location_assignment PIN_AB19 -to fl_dq[6] set_location_assignment PIN_AA19 -to fl_dq[7] set_location_assignment PIN_AA15 -to fl_oe_n set_location_assignment PIN_W14 -to fl_rst_n set_location_assignment PIN_Y14 -to fl_we_n set_location_assignment PIN_AB15 -to fl_ce_n set_location_assignment PIN_AA3 -to sram_a[0] set_location_assignment PIN_AB3 -to sram_a[1] set_location_assignment PIN_AA4 -to sram_a[2] set_location_assignment PIN_AB4 -to sram_a[3] set_location_assignment PIN_AA5 -to sram_a[4] set_location_assignment PIN_AB10 -to sram_a[5] set_location_assignment PIN_AA11 -to sram_a[6] set_location_assignment PIN_AB11 -to sram_a[7] set_location_assignment PIN_V11 -to sram_a[8] set_location_assignment PIN_W11 -to sram_a[9] set_location_assignment PIN_R11 -to sram_a[10] set_location_assignment PIN_T11 -to sram_a[11] set_location_assignment PIN_Y10 -to sram_a[12] set_location_assignment PIN_U10 -to sram_a[13] set_location_assignment PIN_R10 -to sram_a[14] set_location_assignment PIN_T7 -to sram_a[15] set_location_assignment PIN_Y6 -to sram_a[16] set_location_assignment PIN_Y5 -to sram_a[17] set_location_assignment PIN_AB5 -to sram_ce_n set_location_assignment PIN_AA6 -to sram_dq[0] set_location_assignment PIN_AB6 -to sram_dq[1] set_location_assignment PIN_AA7 -to sram_dq[2] set_location_assignment PIN_AB7 -to sram_dq[3] set_location_assignment PIN_AA8 -to sram_dq[4] set_location_assignment PIN_AB8 -to sram_dq[5] set_location_assignment PIN_AA9 -to sram_dq[6] set_location_assignment PIN_AB9 -to sram_dq[7] set_location_assignment PIN_Y9 -to sram_dq[8] set_location_assignment PIN_W9 -to sram_dq[9] set_location_assignment PIN_V9 -to sram_dq[10] set_location_assignment PIN_U9 -to sram_dq[11] set_location_assignment PIN_R9 -to sram_dq[12] set_location_assignment PIN_W8 -to sram_dq[13] set_location_assignment PIN_V8 -to sram_dq[14] set_location_assignment PIN_U8 -to sram_dq[15] set_location_assignment PIN_Y7 -to sram_be_n[0] set_location_assignment PIN_T8 -to sram_oe_n set_location_assignment PIN_W7 -to sram_be_n[1] set_location_assignment PIN_AA10 -to sram_we_n set_location_assignment PIN_V20 -to sd_clk set_location_assignment PIN_Y20 -to sd_cmd set_location_assignment PIN_W20 -to sd_dat0 set_location_assignment PIN_U20 -to sd_dat3 # Timing Assignments # ================== set_global_assignment -name CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS ON set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF # Analysis & Synthesis Assignments # ================================ set_global_assignment -name SAVE_DISK_SPACE OFF set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "" set_global_assignment -name FAMILY "Cyclone II" set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS ON set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED set_global_assignment -name AUTO_ROM_RECOGNITION ON set_global_assignment -name AUTO_RAM_RECOGNITION ON set_global_assignment -name AUTO_RESOURCE_SHARING ON set_global_assignment -name ALLOW_ANY_SHIFT_REGISTER_SIZE_FOR_RECOGNITION ON set_global_assignment -name TOP_LEVEL_ENTITY abc80 set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF set_global_assignment -name AUTO_ENABLE_SMART_COMPILE ON # Fitter Assignments # ================== set_global_assignment -name DEVICE EP2C20F484C7 set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "PASSIVE SERIAL" set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH WEAK PULL-UP" set_global_assignment -name AUTO_GLOBAL_MEMORY_CONTROLS ON set_global_assignment -name AUTO_PACKED_REGISTERS_CYCLONE AUTO set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON set_global_assignment -name FITTER_EFFORT "AUTO FIT" set_global_assignment -name INC_PLC_MODE OFF set_global_assignment -name ROUTING_BACK_ANNOTATION_MODE OFF set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 # Timing Analysis Assignments # =========================== set_global_assignment -name NUMBER_OF_PATHS_TO_REPORT 2000 set_global_assignment -name MAX_SCC_SIZE 50 # EDA Netlist Writer Assignments # ============================== set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)" set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL "" set_global_assignment -name EDA_BOARD_DESIGN_TOOL "" set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL "" set_global_assignment -name EDA_RESYNTHESIS_TOOL "" # Assembler Assignments # ===================== set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION OFF set_global_assignment -name APEX20K_CONFIGURATION_DEVICE EPC2 set_global_assignment -name EXCALIBUR_CONFIGURATION_DEVICE EPC2 set_global_assignment -name MERCURY_CONFIGURATION_DEVICE EPC2 set_global_assignment -name FLEX6K_CONFIGURATION_DEVICE EPC1 set_global_assignment -name FLEX10K_CONFIGURATION_DEVICE EPC2 set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE AUTO set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS4 set_global_assignment -name GENERATE_HEX_FILE ON set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF # Design Assistant Assignments # ============================ set_global_assignment -name DRC_REPORT_TOP_FANOUT OFF set_global_assignment -name DRC_REPORT_FANOUT_EXCEEDING OFF set_global_assignment -name ASSG_CAT OFF set_global_assignment -name ASSG_RULE_MISSING_FMAX OFF set_global_assignment -name ASSG_RULE_MISSING_TIMING OFF set_global_assignment -name SIGNALRACE_RULE_TRISTATE OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_ASYN_RAM OFF set_global_assignment -name CLK_CAT OFF set_global_assignment -name CLK_RULE_COMB_CLOCK OFF set_global_assignment -name CLK_RULE_INV_CLOCK OFF set_global_assignment -name CLK_RULE_INPINS_CLKNET OFF set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES OFF set_global_assignment -name CLK_RULE_MIX_EDGES OFF set_global_assignment -name RESET_CAT OFF set_global_assignment -name RESET_RULE_INPINS_RESETNET OFF set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET OFF set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET OFF set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET OFF set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN OFF set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN OFF set_global_assignment -name TIMING_CAT OFF set_global_assignment -name TIMING_RULE_SHIFT_REG OFF set_global_assignment -name TIMING_RULE_COIN_CLKEDGE OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE OFF set_global_assignment -name NONSYNCHSTRUCT_CAT OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH OFF set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED OFF set_global_assignment -name SIGNALRACE_CAT OFF set_global_assignment -name ACLK_CAT OFF set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN OFF set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN OFF set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN OFF set_global_assignment -name HCPY_CAT ON set_global_assignment -name HCPY_VREF_PINS OFF # Programmer Assignments # ====================== set_global_assignment -name GENERATE_JAM_FILE ON # SignalTap II Assignments # ======================== set_global_assignment -name ENABLE_SIGNALTAP OFF # LogicLock Region Assignments # ============================ set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF # ------------------ # start CLOCK(clkin) # Timing Assignments # ================== # end CLOCK(clkin) # ---------------- # ---------------------- # start CLOCK(pld_clkfb) # Timing Assignments # ================== # end CLOCK(pld_clkfb) # -------------------- # ----------------------------------------- # start EDA_TOOL_SETTINGS(eda_board_design) # EDA Netlist Writer Assignments # ============================== set_global_assignment -name EDA_GENERATE_SDF_OUTPUT_FILE ON -section_id eda_board_design # end EDA_TOOL_SETTINGS(eda_board_design) # --------------------------------------- # ------------------------------------------------ # start EDA_TOOL_SETTINGS(eda_formal_verification) # EDA Netlist Writer Assignments # ============================== set_global_assignment -name EDA_GENERATE_SDF_OUTPUT_FILE ON -section_id eda_formal_verification # end EDA_TOOL_SETTINGS(eda_formal_verification) # ---------------------------------------------- # ----------------------------------- # start EDA_TOOL_SETTINGS(eda_palace) # EDA Netlist Writer Assignments # ============================== set_global_assignment -name EDA_GENERATE_SDF_OUTPUT_FILE ON -section_id eda_palace # end EDA_TOOL_SETTINGS(eda_palace) # --------------------------------- # --------------------------------------- # start EDA_TOOL_SETTINGS(eda_simulation) # EDA Netlist Writer Assignments # ============================== set_global_assignment -name EDA_GENERATE_SDF_OUTPUT_FILE ON -section_id eda_simulation # end EDA_TOOL_SETTINGS(eda_simulation) # ------------------------------------- # -------------------------------------------- # start EDA_TOOL_SETTINGS(eda_timing_analysis) # EDA Netlist Writer Assignments # ============================== set_global_assignment -name EDA_GENERATE_SDF_OUTPUT_FILE ON -section_id eda_timing_analysis # end EDA_TOOL_SETTINGS(eda_timing_analysis) # ------------------------------------------ # ------------------- # start ENTITY(abc80) # Timing Assignments # ================== # Fitter Assignments # ================== # end ENTITY(abc80) # ----------------- set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region" set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region" set_global_assignment -name VERILOG_INPUT_VERSION VERILOG_2001 set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED" set_global_assignment -name FMAX_REQUIREMENT "50 MHz" -section_id clock_50 set_instance_assignment -name CLOCK_SETTINGS clock_50 -to clock_50 set_global_assignment -name FMAX_REQUIREMENT "27 MHz" -section_id clock_27 set_instance_assignment -name CLOCK_SETTINGS clock_27 -to clock_27[0] set_instance_assignment -name CLOCK_SETTINGS clock_27 -to clock_27[1] set_global_assignment -name FMAX_REQUIREMENT "24 MHz" -section_id clock_24 set_instance_assignment -name CLOCK_SETTINGS clock_24 -to clock_24[0] set_instance_assignment -name CLOCK_SETTINGS clock_24 -to clock_24[1] set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top set_global_assignment -name USE_SIGNALTAP_FILE stp2.stp set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR" set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON set_global_assignment -name PARALLEL_SYNTHESIS ON set_global_assignment -name ENABLE_DA_RULE "C101, C102, C103, C104, C105, C106, R101, R102, R103, R104, R105, A101, A102, A103, A104, A105, A106, A107, A108, S101, S102, S103, S104, D101, D102, D103" set_global_assignment -name DISABLE_DA_RULE "T101, T102, A109, A110" set_global_assignment -name ENABLE_DRC_SETTINGS ON set_global_assignment -name FLOW_ENABLE_RTL_VIEWER ON set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION ON set_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION ON set_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION ON set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO PATHS AND MINIMUM TPD PATHS" set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON set_global_assignment -name WEAK_PULL_UP_RESISTOR ON set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL OFF set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to clock_* set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to sw set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to ext_clock set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA ON set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA ON set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 2.0 set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 2.0 set_global_assignment -name ECO_OPTIMIZE_TIMING ON set_global_assignment -name AUTO_DELAY_CHAINS_FOR_HIGH_FANOUT_INPUT_PINS ON set_global_assignment -name TIMEQUEST_DO_REPORT_TIMING ON set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation set_global_assignment -name SLD_FILE "/home/hpa/abc80/abc80-de1/stp2_auto_stripped.stp" set_global_assignment -name VERILOG_FILE mega/revrom.v set_global_assignment -name VERILOG_FILE mega/fgfifo.v set_global_assignment -name VERILOG_FILE sync.v set_global_assignment -name VERILOG_FILE mega/bgram.v set_global_assignment -name VERILOG_FILE enc28j60.v set_global_assignment -name VERILOG_FILE mega/fgcolrom.v set_global_assignment -name MIF_FILE data/fgcol.mif set_global_assignment -name VERILOG_FILE mega/pll2.v set_global_assignment -name VERILOG_FILE mega/serrxfifo.v set_global_assignment -name VERILOG_FILE i2c.v set_global_assignment -name MIF_FILE data/sddrom.mif set_global_assignment -name VERILOG_FILE mega/sddrom.v set_global_assignment -name VERILOG_FILE mega/sddram.v set_global_assignment -name VERILOG_FILE mega/ddio_out.v set_global_assignment -name VERILOG_FILE sddisk.v set_global_assignment -name VERILOG_FILE sound.v set_global_assignment -name VHDL_FILE t80/T80_Pack.vhd set_global_assignment -name VHDL_FILE t80/T80_ALU.vhd set_global_assignment -name VHDL_FILE t80/T80_MCode.vhd set_global_assignment -name VHDL_FILE t80/T80_Reg.vhd set_global_assignment -name VHDL_FILE t80/T80.vhd set_global_assignment -name VHDL_FILE t80/T80s.vhd set_global_assignment -name VHDL_FILE t80/T80se.vhd set_global_assignment -name MIF_FILE data/videoram.mif set_global_assignment -name MIF_FILE data/chargen.mif set_global_assignment -name MIF_FILE data/keyboard.mif set_global_assignment -name MIF_FILE data/mmu.mif set_global_assignment -name VERILOG_FILE mega/chargen.v set_global_assignment -name VERILOG_FILE mega/pll1.v set_global_assignment -name VERILOG_FILE mega/mmuram.v set_global_assignment -name VERILOG_FILE mega/videoram.v set_global_assignment -name VERILOG_FILE mega/kbdram.v set_global_assignment -name VERILOG_FILE t80pio/t80pio.v set_global_assignment -name VERILOG_FILE debounce.v set_global_assignment -name VERILOG_FILE display.v set_global_assignment -name VERILOG_FILE printer.v set_global_assignment -name VERILOG_FILE keyboard.v set_global_assignment -name VERILOG_FILE hexled.v set_global_assignment -name VERILOG_FILE hexascii.v set_global_assignment -name VERILOG_FILE abc80.v set_global_assignment -name SDC_FILE abc80.sdc set_global_assignment -name SOURCE_FILE db/abc80.cmp.rdb set_global_assignment -name SIGNALTAP_FILE stp2.stp set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:data/revrom.tcl" set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING "PACK ALL IO REGISTERS" set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS set_global_assignment -name AUTO_PACKED_REGISTERS_STRATIXII "SPARSE AUTO" set_global_assignment -name RTLV_GROUP_RELATED_NODES_TMV ON set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top