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* bin2bac: use GOSUB as a much cleaner way to hijack BASICHEADde1H. Peter Anvin2018-09-103-26/+20
| | | | | | | | | Instead of doing self-modifying BASIC code, use a GOSUB statement to push the BASIC instruction pointer onto the stack, where it can be modified if the user so wishes. See updated bye800.asm for how to use it. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* bin2bac: for ABC800, allow the assembly program to hijack BASICH. Peter Anvin2018-09-104-11/+93
| | | | | | | | Add a dummy GOTO statement to the assembly prefix. It can be used to redirect to different BASIC bytecode, e.g. to execute a CHAIN statement instead of END. See bye800.asm for how to use. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* bin2bac: for ABC800, support reserving memory at BOTMH. Peter Anvin2018-09-102-21/+35
| | | | | | | | | | | To install modules on an ABC800, it is common to want to do so at BOTM. This is where BASIC-II stores COMMON variables, so we can easily reserve memory there by setting the size of the COMMON variable area in the header. Then the installer can move BOTM to reserve memory permanently, which can be less than the amount of memory reserved in the header. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* bin2bac.pl: don't require a 0 entry point argument, ABC800 fixesH. Peter Anvin2018-09-101-3/+3
| | | | | | | - If no entry point argument is given, entry point is 0 - Minor fixes to the ABC800 file generation (header size, padding) Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* bin2bac.pl: use undef in list assignment for values to be droppedH. Peter Anvin2018-09-101-2/+1
| | | | | | | This is a bit clearer way to define that only certain elements of the list are ones we care about. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* bin2bac: add support for ABC800H. Peter Anvin2018-09-102-15/+209
| | | | | | Add support for generating relocatable .bac files for ABC800/BASIC II. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* bin2bac: don't create variables, use STOP rather than ENDH. Peter Anvin2018-04-241-6/+9
| | | | | | | | Use PRINT instead of Z%= so we don't create any variables on the heap. The PRINT never actually executes so that is OK. Terminate with STOP rather than END. If this ever executes, something is seriously wrong so an error message is appropriate.
* abcprint.txt: update protocolH. Peter Anvin2018-01-031-1/+1
| | | | FF FF was changed to FF 01
* bin2bac.pl: fix undefined variable and add commentsH. Peter Anvin2018-01-031-1/+3
* neopixel.v: WS2813 actually wants a 300 µs resetH. Peter Anvin2016-12-271-5/+5
| | | | Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* neopixel: extend the reset period to handle WS2813H. Peter Anvin2016-12-271-3/+19
| | | | | | | WS2813 extends the reset spec to 250 µs; this generates a 288 µs reset pulse. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* abc80.v: fix pattern replace in assignment of io_selH. Peter Anvin2016-11-171-1/+1
| | | | | | io_sel can't be computed from io_sel... Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* revrom.pl: put the text string at the end, with a pointerH. Peter Anvin2016-11-171-3/+4
| | | | | | | | | The current text string is more than 128 characters long. However, we could shorten it in the future if we need to include more information. Thus, put it at the end, and leave a pointer to its address instead of hard-coding the address. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* abc80.v: fix typoH. Peter Anvin2016-11-171-1/+1
| | | | Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Move fgram back to 64K, move RAM BASIC80 to 80KH. Peter Anvin2016-11-172-2/+2
| | | | | | | For backwards compatibility, move the fgram default page back to 64K. Swap it with the BASIC80 RAM region, now at 80K. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* abc80.v: advance npled address on read/write, cleanupsH. Peter Anvin2016-11-171-18/+39
| | | | | | | | When we access the npled config memory via port 157, advance the address pointer. This reduces the number of operations, and allows INIR/OTIR access to this memory. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* revrom: move the text string to offset 128H. Peter Anvin2016-11-171-1/+1
| | | | | | | Move the text string to offset 128, so we get more space to encode binary information should it be necessary. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* neopixel.v: document the official timing for various neopixelsH. Peter Anvin2016-11-171-3/+13
| | | | | | | | List the official timings for WS2811, WS2812, WS2812B and SK6812 neopixels. Note that the timing for WS2811 may be barely met in high speed mode; it will not work in low speed mode. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Quartus insists on a different netlist configuration...H. Peter Anvin2016-11-151-1/+1
* neopixel: compute SRAM address instead of putting it in RAMH. Peter Anvin2016-11-152-45/+41
| | | | | | | | | | Half the npstatram is occupied by the current pointer address, but we can compute that from conf_addr and stat_pctr. The cost turns out to be relatively minimal (approx 1 LE!) in terms of logic and saves half the RAM. This may become more important if this design is scaled to 32 bits or even higher. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* neopixel: simplify the design by offsetting pulsesnpledH. Peter Anvin2016-11-151-56/+27
| | | | | | | | It makes the design quite a bit simpler to not try to synchronize all the pulse starts together. Futhermore, it reduces the number of I/O pins toggling at the same time, which is good for noise reduction. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* neopixel: latch the data in the right cycle and it works...H. Peter Anvin2016-11-153-44/+15
| | | | | | We only need one clock cycle before reading the SRAM data, not two. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* neopixel: now works for the first pixel...H. Peter Anvin2016-11-155-74/+439
| | | | However, we seem to fail on subseqent ones...
* Initial code for Neopixel (WB2812 programmable LED) driverH. Peter Anvin2016-11-142-0/+451
| | | | Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Fix OUT 7 to the memory map: it was blocked by ~intio_selsramshareH. Peter Anvin2016-11-121-19/+15
| | | | | | Obviously, iotio_sel will be zero for OUT 7. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Clear abc_out_7_q on resetH. Peter Anvin2016-11-121-0/+1
* Avoid latch in video_width; allow flipping sw9 at runtimeH. Peter Anvin2016-11-121-2/+11
| | | | | | | | Avoid latching video_width. Also track sw[9] and allow it to set the video_width at runtime by flipping the switch (it may or may not change the width based on previous state.) Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* OUT 7 needs a strobe just like intio_selH. Peter Anvin2016-11-121-2/+4
| | | | | | OUT 7 is functionally part of intio; treat it as such Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Improve sdram timing by enabling I/O cell packing; fgpage 5H. Peter Anvin2016-11-113-30/+80
| | | | | | | | | | Further improve SRAM timing by using the flipflops in the I/O cells for input, too. Change the default fgpage to 5 so it doesn't conflict with the default location for the 80-character BASIC in RAM. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* revrom: mark if the working tree is modifiedH. Peter Anvin2016-11-101-1/+1
| | | | | | | If the working tree doesn't match git, add a suffix. -dirty seems unnecessarily offensive, so use (mod) Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Disable revrom poking via JTAG; adds an unnecessary JTAB moduleH. Peter Anvin2016-11-101-3/+3
* Create a revision ID ROM which can be read from ABCH. Peter Anvin2016-11-106-17/+265
| | | | | | | | Create a revision ID ROM readable from ABC (via I/O ports 136 and 137) so we have a hope of not getting ourselves confused about which revision of ABC80-DE1 we are currently running. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Finally: a functional version of the 200 MHz SRAMH. Peter Anvin2016-11-1011-296/+348
| | | | | | The 200 MHz SRAM seems to finally work. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* The address is available one CPU cycle before MREQ#, use thatH. Peter Anvin2016-11-091-139/+0
| | | | | | | To do that, we have to remove the read/write mmu map select, however. While we're at it, drop the ugly "basic patch" hack and instead have separate memory maps for 48 and 80 col.
* Current status of SRAM sharingH. Peter Anvin2016-11-087-318/+365
* sync.v: work around Quartus problem with generate ifH. Peter Anvin2016-11-051-39/+49
| | | | | | | | | | | Apparently generate if statements with declarations in both branches can make Quartus II think that the register is unused (duplicate?) Thus drop it and (suboptimally) always disable design rule D104. It would still be possible to fix this by duplicating the synchronizer code, but that's for later. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* display.v: use the stabilizer for fgctl_qH. Peter Anvin2016-11-041-9/+5
| | | | | | Now when we have a generic stabilizer, use it to stabilize fgctl_q. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* sync.v: remove unused altera_attributeH. Peter Anvin2016-11-041-2/+2
| | | | | | | | No need to have a filter that will only used for a synchronizer at the top level, now when synchronizer should only be used from the synchronize wrapper module. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* sync.v: include both synchronizer and stabilizer supportH. Peter Anvin2016-11-041-14/+104
| | | | | | | Add appropriate modules for both synchronizer and stabilizer, with the appropriate attribute magic for both. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* SRAM: implement the new 200 MHz shared state machineH. Peter Anvin2016-10-311-51/+116
| | | | | | | Implement the new SRAM state machine, complete with dual access per cpu_clk cycle. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* display.v: rename fgpixels to fgpixelH. Peter Anvin2016-10-311-3/+3
| | | | | | Change the name to fgpixel now when we only have one. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Minor video fixesH. Peter Anvin2016-10-312-2/+2
| | | | | | Allow amber monitor, don't invert output in test pattern. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* WIP: adjust SRAM timing to be able to share with another deviceH. Peter Anvin2016-10-3110-1006/+1414
| | | | | | | | | | | | | Infrastructure for changing the SRAM timing to add another shared device (intended to be the Neopixel driver.) This means upping the SRAM state machine clock to 200 MHz; move video_clk to pll2 to be able to generate that output. It actually gets closer to proper VGA timing, but at the expense of needing a synchronizing FIFO for the fg unit. This also clears a lot of timing warnings. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* sddisk.v: remove expression that turns into a latchH. Peter Anvin2016-10-311-2/+1
| | | | | | | Fix an expression that turns into a latch; the FPGA has flipflops, not latches. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Add support for using the GPIO 0 header as, well, GPIOs.H. Peter Anvin2016-10-232-32/+148
| | | | | It is sometimes useful to be able to control the GPIO header pins as, well, GPIOs. Make it so. No interrupt support or anything like that.
* abc80.qsf: add mega/bgram.vH. Peter Anvin2016-10-231-0/+1
* keyboard.txt: convert to UTF-8H. Peter Anvin2016-10-151-8/+8
| | | | | | For some reason this file was still in Latin-1. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Add color block graphics unitH. Peter Anvin2016-10-146-114/+420
| | | | | | Add a completely invented color block graphics unit; it should hopefully be fun for kids to play with using the equivalent method to using characters for groups of normal block pixels.
* Merge branch 'de1' of ssh://terminus.zytor.com/pub/git/fpga/abc80/abc80 into de1H. Peter Anvin2016-10-132-12/+41
| * bin2bac: find the entrypoint in the .def fileH. Peter Anvin2016-10-111-3/+24
| | | | | | | | Make it possible to find a symbolic entry point in the .def file.