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authorH. Peter Anvin <hpa@zytor.com>2003-09-22 06:53:52 +0000
committerH. Peter Anvin <hpa@zytor.com>2003-09-22 06:53:52 +0000
commitf1d1ae8b271185d1aae4ecbf332babeb1aa38c32 (patch)
tree12d9470e1595e9e7c15bfc69c69bdba0830c68d5 /t80pio
parent69b6dbbe2b42d44d814acd9bd48dcf677ba5733c (diff)
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Make Mode 3 interrupt edge-triggered
Diffstat (limited to 't80pio')
-rw-r--r--t80pio/t80pio.v13
1 files changed, 8 insertions, 5 deletions
diff --git a/t80pio/t80pio.v b/t80pio/t80pio.v
index ff992ea..2b9691c 100644
--- a/t80pio/t80pio.v
+++ b/t80pio/t80pio.v
@@ -42,7 +42,7 @@ module T80PIO (
input BSTB_n;
output BRDY;
- reg [7:1] V; // Interrupt vector
+ reg [6:0] V; // Interrupt vector
reg [1:0] M; // Operating mode (1's hot)
reg [7:0] IO; // Mode 3 direction mask
reg [3:0] ICW; // Interrupt control word
@@ -54,7 +54,8 @@ module T80PIO (
reg i_data_flag; // Have input data
reg o_data_flag; // Have input data
reg ASTB_n_old; // Previous ASTB_n
-
+ reg irq_cond_old; // Previous irq_cond
+
reg [7:0] data_in; // Latched input data (Di)
// Data as it would be read by the CPU
@@ -122,6 +123,7 @@ module T80PIO (
intak <= 0;
servicing_irq <= 0;
ASTB_n_old <= ASTB_n;
+ irq_cond_old <= 0;
end
else
begin
@@ -158,7 +160,7 @@ module T80PIO (
begin
casex ( Di[3:0] )
4'bxxx0:
- V[7:1] <= Di[7:1];
+ V <= Di[7:1];
4'b1111:
begin
M[1:0] <= Di[7:6];
@@ -187,7 +189,7 @@ module T80PIO (
// Mode 3 interrupt control
if ( M == 2'b11 )
begin
- if ( ICW[3] & irq_cond )
+ if ( ICW[3] & irq_cond & ~irq_cond_old )
need_irq <= 1;
end
// Input strobe detect (mode != 3)
@@ -202,8 +204,9 @@ module T80PIO (
i_data_flag <= 1; // Data received, now full
end
- // Delayed ASTB# for edge detection
+ // Delayed ASTB# and irq_cond for edge detection
ASTB_n_old <= ASTB_n;
+ irq_cond_old <= irq_cond;
// Actual interrupt-generating logic. We have two
// possible states to be in; both can be active: