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authorH. Peter Anvin <hpa@zytor.com>2003-09-20 03:17:55 +0000
committerH. Peter Anvin <hpa@zytor.com>2003-09-20 03:17:55 +0000
commit387cd12025c873b8cd0993923b9346180e4ba472 (patch)
treebebcce04a4e9e56d38a30b1187abb7e7c799661e /t80pio
parent1da2e5be08fe82285e69d844986bd6ceb01f62fd (diff)
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Provide output data "immediately" instead of on a clock
Diffstat (limited to 't80pio')
-rw-r--r--t80pio/t80pio.v13
1 files changed, 6 insertions, 7 deletions
diff --git a/t80pio/t80pio.v b/t80pio/t80pio.v
index 5243fa1..ff992ea 100644
--- a/t80pio/t80pio.v
+++ b/t80pio/t80pio.v
@@ -48,7 +48,6 @@ module T80PIO (
reg [3:0] ICW; // Interrupt control word
reg [7:0] MB; // Interrupt mask
reg [7:0] D; // Output direction data register
- reg [7:0] Do_q; // Data out to CPU
reg io_next; // Next control word is I/O mask
reg mb_next; // Next control word is interrupt mask
@@ -65,8 +64,11 @@ module T80PIO (
(M == 2'b10) ? data_in :
/* (M == 2'b11) */ (D & ~IO) | (data_in & IO);
- // It seems we can't afford a one-cycle delay in responding to INTAK
- assign Do = ( ~M1_n & ~IORQ_n & (my_irq | intak) ) ? { V, 1'b0 } : Do_q;
+ // Data out
+ assign Do =
+ ( ~M1_n & ~IORQ_n & (my_irq | intak) ) ? { V, 1'b0 } :
+ ( M1_n & ~IORQ_n & ~CE_n & ~RD_n & ~CDsel ) ? read_data :
+ 8'hFF; // Return FF if not selected
// Output data word (note: pins which would be tristated on Z80PIO
// we feed back the input.)
@@ -120,19 +122,16 @@ module T80PIO (
intak <= 0;
servicing_irq <= 0;
ASTB_n_old <= ASTB_n;
- Do_q <= 8'hFF;
end
else
begin
- Do_q <= 8'hFF;
-
if ( M1_n & ~IORQ_n & ~CE_n )
begin
case ( { RD_n, CDsel } )
2'b00: // Data Read
begin
+ // Do handled above
i_data_flag <= 0;
- Do_q <= read_data;
end
2'b01: // Control read