*** empty log message ***

1 files changed, 14 insertions, 14 deletions

diff --git a/t80pio/t80pio.v b/t80pio/t80pio.v
index db5a4cd..900f50e 100644
--- a/t80pio/t80pio.v
+++ b/t80pio/t80pio.v
@@ -97,13 +97,13 @@ module T80PIO (
    assign INT_n = ~( need_irq & IEI );
    assign IEO   = IEI & ~need_irq & ~intak & ~servicing_irq;
 
-   // Useful variables for the interrupt code
+   // This computes the mode 3 interrupt condition
    wire [7:0] xor_mask = ICW[1] ? 8'hFF : 8'h00;
    wire       irq_cond = ICW[2] ?
 	      // "AND" mode
-	      !((read_data ^ xor_mask) & MB) :
+	      (((read_data ^ xor_mask) & MB) == 0):
 	      // "OR" mode
-	      ((read_data ^ ~xor_mask) & MB);
+	      (((read_data ^ ~xor_mask) & MB) != 0);
 		  
    always @(posedge CLK_n or negedge RESET_n)
      begin
@@ -185,27 +185,27 @@ module T80PIO (
 	       if ( latch_in )
 		 data_in <= Ai;
 
-	     // Input strobe detect
-	     if ( ASTB_n & ~ASTB_n_old ) // ASTB_n rising edge
+	     // Mode 3 interrupt control
+	     if ( M == 2'b11 )
+	       begin
+		  if ( ICW[3] & irq_cond )
+		    need_irq <= 1;
+	       end
+	     // Input strobe detect (mode != 3)
+	     else if ( ASTB_n & ~ASTB_n_old ) // ASTB_n rising edge
 	       begin
+		  if ( ICW[3] )
+		    need_irq <= 1;
+		  
 		  if ( M[0] == 1'b0 ) // Output or Bidir modes
 		    o_data_flag <= 0; // Data sent, now empty
 		  else if ( M == 2'b01 ) // Input mode
 		    i_data_flag <= 1; // Data received, now full
-
-		  if ( M[0] != 2'b11 && ICW[3] )
-		    need_irq <= 1;
 	       end
 
 	     // Delayed ASTB# for edge detection
 	     ASTB_n_old <= ASTB_n;
 
-	     // Mode 3 interrupt control
-	     if ( M == 2'b11 && ICW[3] )
-	       begin
-		  need_irq <= need_irq | irq_cond;
-	       end // if ( M == 2'b11 && ICW[3] )
-
 	     // Actual interrupt-generating logic.  We have two
 	     // possible states to be in; both can be active:
 	     // need_irq (INT# -> INTAK) and servicing_irq (INTAK -> RETI).