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| author | H. Peter Anvin <hpa@zytor.com> | 2016-11-15 00:41:21 -0800 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2016-11-15 00:41:21 -0800 |
| commit | 58001a2749e4c18f8167c808c384a5255c0bb125 (patch) | |
| tree | 563661d579be5f6e2ca47147ee81a8431c58fc6c /README | |
| parent | c82eafb59f3f18021b29d145d5ddc4fa88442cf0 (diff) | |
| download | abc80-58001a2749e4c18f8167c808c384a5255c0bb125.tar.gz abc80-58001a2749e4c18f8167c808c384a5255c0bb125.tar.xz abc80-58001a2749e4c18f8167c808c384a5255c0bb125.zip | |
neopixel: latch the data in the right cycle and it works...
We only need one clock cycle before reading the SRAM data, not two.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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