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authorH. Peter Anvin <hpa@zytor.com>2006-03-11 23:13:18 +0000
committerH. Peter Anvin <hpa@zytor.com>2006-03-11 23:13:18 +0000
commit83031fd8844ca7595274d8e40d8b6444d63d617c (patch)
treed4f586788726b70f8404f3fdb0e18231291f9ba2
parent1f37a2560a81e39ea8613e57b6f3f5e1be0f727b (diff)
downloadabc80-83031fd8844ca7595274d8e40d8b6444d63d617c.tar.gz
abc80-83031fd8844ca7595274d8e40d8b6444d63d617c.tar.xz
abc80-83031fd8844ca7595274d8e40d8b6444d63d617c.zip
Document that CHANGES might be more current.
-rw-r--r--README3
1 files changed, 2 insertions, 1 deletions
diff --git a/README b/README
index 7b8934a..9241bc4 100644
--- a/README
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@@ -1,5 +1,6 @@
This is an implementation of ABC80 in an FPGA by H. Peter Anvin
-<hpa@zytor.com>.
+<hpa@zytor.com>. Some of this information may be out of date; check
+the CHANGES file.
This version uses an "Altera Nios Development Kit, Cyclone Edition"
combined with a "AleaRep Lancelot" daughtercard (for