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| author | H. Peter Anvin <hpa@zytor.com> | 2007-06-10 00:13:19 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2007-06-10 00:13:19 -0700 |
| commit | 8643b4f97e287c8e133c6dc68f9601f53a3f6d02 (patch) | |
| tree | 412a83657c0b1f45928d76b515a120f5b2103712 | |
| parent | 3bf05ad6c6cc4b95097bc1b7104914090f3c5f77 (diff) | |
| download | abc80-tv80.tar.gz abc80-tv80.tar.xz abc80-tv80.zip | |
Document (eventual) switch to TV80tv80
| -rw-r--r-- | CHANGES | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -1,3 +1,7 @@ +Changes in release ??: +---------------------- +* Switch from the T80 CPU (VHDL) to the TV80 CPU (Verilog). + Changes in release 18: ---------------------- * Cleanups to it synthesizes correctly under Quartus II 5.1 SP2. |