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authorH. Peter Anvin <hpa@zytor.com>2014-05-08 07:20:50 -0700
committerH. Peter Anvin <hpa@zytor.com>2014-05-08 07:23:22 -0700
commit497749ec787feb4d03fe66bde6c94e338afbac14 (patch)
tree1e7a1819aa7101399bda720827a8268536c6bba0
parent28bd60b9a39865b193fe094ca12ed616cc37bd01 (diff)
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abc80.v: remove (useless) support for X MMU; allow NMI disable
The X-select in the MMU never worked (the M1 phase is only for the actual opcode fetch, not immediates) so remove it. Allow bit 2 in port 7 to disable NMI; this is needed for CP/M and seems like an entirely reasonable addition to Mikrodatorn's 64K extension mod. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
-rw-r--r--abc80.v19
1 files changed, 11 insertions, 8 deletions
diff --git a/abc80.v b/abc80.v
index 9791e23..f27dca6 100644
--- a/abc80.v
+++ b/abc80.v
@@ -1,6 +1,6 @@
// -----------------------------------------------------------------------
//
-// Copyright 2003-2010 H. Peter Anvin - All Rights Reserved
+// Copyright 2003-2014 H. Peter Anvin - All Rights Reserved
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
@@ -488,11 +488,10 @@ module abc80 (
wire mmu_wr_e; // MMU write enable
wire [15:0] mmu_rd_data; // Read data output from MMU
- reg [5:0] mmu_map_sel; // XXWWRR
+ reg [3:0] mmu_map_sel; // WWRR
wire [1:0] mmu_map;
assign mmu_map =
- ~cpu_m1_n ? mmu_map_sel[5:4] :
~cpu_wr_n ? mmu_map_sel[3:2] :
mmu_map_sel[1:0];
@@ -900,7 +899,8 @@ module abc80 (
reg [7:0] intio_do; // Data out from MMU I/O ports
reg turbo_set;
-
+ reg nmi_dis;
+
assign mmu_wr_e = intio_sel & ~cpu_wr_n & (cpu_a[5:0] == 5'b00011);
always @(negedge rst_n or posedge fast_clk)
@@ -911,6 +911,8 @@ module abc80 (
mmu_mod_data <= 0;
mmu_map_sel <= 0;
+ nmi_dis <= 0;
+
turbo_set <= 0;
prog_led_ctl <= 0;
@@ -938,7 +940,7 @@ module abc80 (
5'b00010:
mmu_mod_data <= cpu_do[7:0];
5'b001xx:
- mmu_map_sel <= cpu_do[5:0];
+ mmu_map_sel <= cpu_do[3:0];
5'b100xx:
turbo_set <= 1;
5'b10100:
@@ -958,7 +960,8 @@ module abc80 (
else if ( ~abc_out_n[7] )
begin
// For compatibility with Mikrodatorn's 64K hack
- mmu_map_sel <= { cpu_do[1:0], cpu_do[1:0], cpu_do[1:0] };
+ mmu_map_sel <= { cpu_do[1:0], cpu_do[1:0] };
+ nmi_dis <= cpu_do[2];
end
else if ( intio_sel & ~cpu_rd_n )
begin
@@ -972,7 +975,7 @@ module abc80 (
5'b00011:
intio_do <= mmu_rd_data[15:8];
5'b001xx:
- intio_do <= { 2'b0, mmu_map_sel };
+ intio_do <= { 4'b0, mmu_map_sel };
5'b100xx:
intio_do <= { 6'b0, cpu_turbo };
5'b10100:
@@ -1042,7 +1045,7 @@ module abc80 (
// ------------------------------------------------------------------------
assign cpu_int_n = pioa_int_n & piob_int_n;
- assign cpu_nmi_n = ctr_20ms;
+ assign cpu_nmi_n = ctr_20ms | nmi_dis;
wire cpu_wait_n = 1'b1; // See cpu_clk_en
wire cpu_clk_en;