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authorH. Peter Anvin <hpa@zytor.com>2014-05-08 07:07:38 -0700
committerH. Peter Anvin <hpa@zytor.com>2014-05-08 07:07:38 -0700
commit28bd60b9a39865b193fe094ca12ed616cc37bd01 (patch)
tree6c00f47881229d4cf7c2ef905a447ec8d148e21a
parentcd24d9d376201784108e17b5bd7612d2e10c4a9c (diff)
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sddrom: Add CP/M mode (128-byte sectors)
Add a mode for CP/M compatibility (128-byte logical sectors, instead of 256.) This is signalled by setting bit 5 in command byte K1 (normally unused except for special commands.) Bit 4 is used as bit 0 of the 128-byte sector number, to avoid deducing the capacity and to make the code changes smaller. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
-rw-r--r--data/sddrom.asm20
1 files changed, 15 insertions, 5 deletions
diff --git a/data/sddrom.asm b/data/sddrom.asm
index e901c78..c13960d 100644
--- a/data/sddrom.asm
+++ b/data/sddrom.asm
@@ -338,11 +338,18 @@ data_error:
;
bufsetup:
ld hl,sd_buf/2
- ld bc,256 ; 256 bytes
- ld a,(iy+3) ; Sector
+ ld a,(iy+3) ; 256-byte sector
rrca
rl h ; HL -> proper half of SD buffer
ld de,(abc_buf)
+ ld bc,256 ; 256 bytes
+ bit 5,(iy+1) ; CP/M?
+ ret z
+ ; CP/M mode (128-byte sectors)
+ ld bc,128 ; 128 bytes
+ bit 4,(iy+1) ; Odd 128-byte sector?
+ ret z
+ ld l,c ; L <- 128
ret
;:
@@ -355,9 +362,12 @@ transfer:
out (0x04),a
ld a,(iy+13) ; High byte of addressed controller buffer
out (c),a
- xor a
- out (0x03),a ; 256 bytes
- inc a ; A = 01h (READY)
+ ld a,(iy+1) ; Bit 5 of K1 = CP/M mode
+ add a
+ add a
+ and 80h
+ out (0x03),a ; 256 bytes if ABC, 128 bytes if CP/M
+ ld a,01h ; A = 01h (READY)
out (0x00),a
tr_wait:
in a,(0x00) ; DMA engine status